A Survey on Temporal Logics
Total Page:16
File Type:pdf, Size:1020Kb
Load more
Recommended publications
-
Reasoning in the Temporal Logic of Actions Basic Research in Computer Science
BRICS BRICS DS-96-1 U. Engberg: Reasoning in the Temporal Logic of Actions Basic Research in Computer Science Reasoning in the Temporal Logic of Actions The design and implementation of an interactive computer system Urban Engberg BRICS Dissertation Series DS-96-1 ISSN 1396-7002 August 1996 Copyright c 1996, BRICS, Department of Computer Science University of Aarhus. All rights reserved. Reproduction of all or part of this work is permitted for educational or research use on condition that this copyright notice is included in any copy. See back inner page for a list of recent publications in the BRICS Dissertation Series. Copies may be obtained by contacting: BRICS Department of Computer Science University of Aarhus Ny Munkegade, building 540 DK - 8000 Aarhus C Denmark Telephone: +45 8942 3360 Telefax: +45 8942 3255 Internet: [email protected] BRICS publications are in general accessible through WWW and anonymous FTP: http://www.brics.dk/ ftp ftp.brics.dk (cd pub/BRICS) Reasoning in the Temporal Logic of Actions The design and implementation of an interactive computer system Urban Engberg Ph.D. Dissertation Department of Computer Science University of Aarhus Denmark Reasoning in the Temporal Logic of Actions The design and implementation of an interactive computer system A Dissertation Presented to the Faculty of Science of the University of Aarhus in Partial Fulfillment of the Requirements for the Ph.D. Degree by Urban Engberg September 1995 Abstract Reasoning about algorithms stands out as an essential challenge of computer science. Much work has been put into the development of formal methods, within recent years focusing especially on concurrent algorithms. -
The Rise and Fall of LTL
The Rise and Fall of LTL Moshe Y. Vardi Rice University Monadic Logic Monadic Class: First-order logic with = and monadic predicates – captures syllogisms. • (∀x)P (x), (∀x)(P (x) → Q(x)) |=(∀x)Q(x) [Lowenheim¨ , 1915]: The Monadic Class is decidable. • Proof: Bounded-model property – if a sentence is satisfiable, it is satisfiable in a structure of bounded size. • Proof technique: quantifier elimination. Monadic Second-Order Logic: Allow second- order quantification on monadic predicates. [Skolem, 1919]: Monadic Second-Order Logic is decidable – via bounded-model property and quantifier elimination. Question: What about <? 1 Nondeterministic Finite Automata A = (Σ,S,S0,ρ,F ) • Alphabet: Σ • States: S • Initial states: S0 ⊆ S • Nondeterministic transition function: ρ : S × Σ → 2S • Accepting states: F ⊆ S Input word: a0, a1,...,an−1 Run: s0,s1,...,sn • s0 ∈ S0 • si+1 ∈ ρ(si, ai) for i ≥ 0 Acceptance: sn ∈ F Recognition: L(A) – words accepted by A. 1 - - Example: • • – ends with 1’s 6 0 6 ¢0¡ ¢1¡ Fact: NFAs define the class Reg of regular languages. 2 Logic of Finite Words View finite word w = a0,...,an−1 over alphabet Σ as a mathematical structure: • Domain: 0,...,n − 1 • Binary relation: < • Unary relations: {Pa : a ∈ Σ} First-Order Logic (FO): • Unary atomic formulas: Pa(x) (a ∈ Σ) • Binary atomic formulas: x < y Example: (∃x)((∀y)(¬(x < y)) ∧ Pa(x)) – last letter is a. Monadic Second-Order Logic (MSO): • Monadic second-order quantifier: ∃Q • New unary atomic formulas: Q(x) 3 NFA vs. MSO Theorem [B¨uchi, Elgot, Trakhtenbrot, 1957-8 (independently)]: MSO ≡ NFA • Both MSO and NFA define the class Reg. -
Formal Specification and Runtime Verification of Parallel
Formal Specification and Runtime Verification of Parallel Systems using Interval Temporal Logic (ITL) PhD Thesis Nayef Hmoud Alshammari This thesis is submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy Software Technology Research Laboratory De Montfort University Leicester - United Kingdom 2018 Declaration of Authorship I declare that the work described in this thesis is original work undertaken by me for the degree of Doctor of Philosophy at the Software Technology Research Laboratory (STRL), at De Montfort University, United Kingdom. No part of the material described in this thesis has been submitted for any award of any other degree or qualification in this or any other university or college of advanced education. This thesis is written by me and produced using LATEX. I To my mother’s soul, Helalah bint Hujailan Alshammari (April 21st, 2016). May she rest in peace ... II Acknowledgement Firstly, I would like to express my sincere gratitude to my first supervisor Dr. Francois Seiwe and second supervisor Dr. Antonio Cau for their continuous support of my PhD study and related research, and for their patience, motivation, and immense knowledge. Their guidance helped me during the time of my research and writing of this thesis. I could not have had more qualified supervisors for my PhD study. Also, I would like to express my great appreciation to Dr. Antonio Cau for the remarkable theoretical and practical support which he offered during the study of my PhD. I would also like to thank my former supervisors Dr. Ben Moszkowski and Dr. Jordan Dimitrov for their roles during my PhD. -
Model Checking with Mbeddr
Model Checking for State Machines with mbeddr and NuSMV 1 Abstract State machines are a powerful tool for modelling software. Particularly in the field of embedded software development where parts of a system can be abstracted as state machine. Temporal logic languages can be used to formulate desired behaviour of a state machine. NuSMV allows to automatically proof whether a state machine complies with properties given as temporal logic formulas. mbedder is an integrated development environment for the C programming language. It enhances C with a special syntax for state machines. Furthermore, it can automatically translate the code into the input language for NuSMV. Thus, it is possible to make use of state-of-the-art mathematical proofing technologies without the need of error prone and time consuming manual translation. This paper gives an introduction to the subject of model checking state machines and how it can be done with mbeddr. It starts with an explanation of temporal logic languages. Afterwards, some features of mbeddr regarding state machines and their verification are discussed, followed by a short description of how NuSMV works. Author: Christoph Rosenberger Supervising Tutor: Peter Sommerlad Lecture: Seminar Program Analysis and Transformation Term: Spring 2013 School: HSR, Hochschule für Technik Rapperswil Model Checking with mbeddr 2 Introduction Model checking In the words of Cavada et al.: „The main purpose of a model checker is to verify that a model satisfies a set of desired properties specified by the user.” [1] mbeddr As Ratiu et al. state in their paper “Language Engineering as an Enabler for Incrementally Defined Formal Analyses” [2], the semantic gap between general purpose programming languages and input languages for formal verification tools is too big. -
Interval Temporal Logic
Interval Temporal Logic Antonio Cau and Ben Moszkowski 2021-04-09 HTML version of the ITL home page Abstract Interval Temporal Logic (ITL) is a flexible notation for both propositional and first-order reasoning about periods of time found in descriptions of hardware and software systems. Unlike most temporal logics, ITL can handle both sequential and parallel composition and offers powerful and extensible specification and proof techniques for reasoning about properties involving safety, liveness and pro- jected time [134]. Timing constraints are expressible and furthermore most imperative programming constructs can be viewed as formulas in a slightly modified version of ITL [125]. Tempura provides an executable framework for developing and experimenting with suitable ITL specifications. In addi- tion, ITL and its mature executable subset Tempura [157] have been extensively used to specify the properties of real-time systems where the primitive circuits can directly be represented by a set of simple temporal formulae. In addition, Tempura has been applied to hardware simulation and other areas where timing is important. 1 Contents 1 Finite Interval Temporal Logic3 1.1 Syntax............................................3 1.2 Semantics..........................................3 1.3 Derived Constructs......................................5 1.4 Propositional proof system..................................7 1.5 First order proof system...................................7 2 Finite and Infinite Interval Temporal Logic8 2.1 Syntax............................................8 -
The Complexity of Generalized Satisfiability for Linear Temporal Logic
Logical Methods in Computer Science Vol. 5 (1:1) 2009, pp. 1–1–21 Submitted Mar. 28, 2008 www.lmcs-online.org Published Jan. 26, 2009 THE COMPLEXITY OF GENERALIZED SATISFIABILITY FOR LINEAR TEMPORAL LOGIC MICHAEL BAULAND a, THOMAS SCHNEIDER b, HENNING SCHNOOR c, ILKA SCHNOOR d, AND HERIBERT VOLLMER e a Knipp GmbH, Martin-Schmeißer-Weg 9, 44227 Dortmund, Germany e-mail address: [email protected] b School of Computer Science, University of Manchester, Oxford Road, Manchester M13 9PL, UK e-mail address: [email protected] c Inst. f¨ur Informatik, Christian-Albrechts-Universit¨at zu Kiel, 24098 Kiel, Germany e-mail address: [email protected] d Inst. f¨ur Theoretische Informatik, Universit¨at zu L¨ubeck, Ratzeburger Allee 160, 23538 L¨ubeck, Germany e-mail address: [email protected] e Inst. f¨ur Theoretische Informatik, Universit¨at Hannover, Appelstr. 4, 30167 Hannover, Germany e-mail address: [email protected] Abstract. In a seminal paper from 1985, Sistla and Clarke showed that satisfiability for Linear Temporal Logic (LTL) is either NP-complete or PSPACE-complete, depending on the set of temporal operators used. If, in contrast, the set of propositional operators is restricted, the complexity may decrease. This paper undertakes a systematic study of satisfiability for LTL formulae over restricted sets of propositional and temporal opera- tors. Since every propositional operator corresponds to a Boolean function, there exist infinitely many propositional operators. In order to systematically cover all possible sets of them, we use Post’s lattice. With its help, we determine the computational complexity of LTL satisfiability for all combinations of temporal operators and all but two classes of propositional functions. -
Interval Temporal Logic
Interval Temporal Logic Antonio Cau, Ben Moszkowski and Hussein Zedan Software Technology Research Laboratory December 6, 2007 HTML version of the ITL home page ITL-course: A not so short introduction to ITL Abstract Interval Temporal Logic (ITL) is a flexible notation for both propositional and first-order reasoning about periods of time found in descriptions of hardware and software systems. Unlike most temporal logics, ITL can handle both sequential and parallel composition and offers powerful and extensible specification and proof techniques for reasoning about properties involving safety, liveness and projected time[15]. Timing constraints are expressible and furthermore most imperative pro- gramming constructs can be viewed as formulas in a slightly modified version of ITL [25]. Tempura provides an executable framework for developing and experimenting with suitable ITL specifications. In addition, ITL and its mature executable subset Tempura [9] have been extensively used to specify the properties of real-time systems where the primitive circuits can directly be represented by a set of simple tempo- ral formulae. In addition, various researchers have applied Tempura to hardware simulation and other areas where timing is important. 1 Syntax The key notion of ITL is an interval. An interval σ is considered to be a (in)finite sequence of states σ0; σ1 :::, where a state σi is a mapping from the set of variables Var to the set of values V al. The length jσj of an interval σ0 : : : σn is equal to n (one less than the number of states in the interval (this has always been a convention in ITL), i.e., a one state interval has length 0). -
On Finite Domains in First-Order Linear Temporal Logic Denis Kuperberg, Julien Brunel, David Chemouil
On Finite Domains in First-Order Linear Temporal Logic Denis Kuperberg, Julien Brunel, David Chemouil To cite this version: Denis Kuperberg, Julien Brunel, David Chemouil. On Finite Domains in First-Order Linear Temporal Logic. 14th International Symposium on Automated Technology for Verification and Analysis, Oct 2016, Chiba, Japan. 10.1007/978-3-319-46520-3_14. hal-01343197 HAL Id: hal-01343197 https://hal.archives-ouvertes.fr/hal-01343197 Submitted on 7 Jul 2016 HAL is a multi-disciplinary open access L’archive ouverte pluridisciplinaire HAL, est archive for the deposit and dissemination of sci- destinée au dépôt et à la diffusion de documents entific research documents, whether they are pub- scientifiques de niveau recherche, publiés ou non, lished or not. The documents may come from émanant des établissements d’enseignement et de teaching and research institutions in France or recherche français ou étrangers, des laboratoires abroad, or from public or private research centers. publics ou privés. On Finite Domains in First-Order Linear Temporal Logic? Denis Kuperberg1, Julien Brunel2, and David Chemouil2 1 TU Munich, Germany 2 DTIM, Université fédérale de Toulouse, ONERA, France Abstract. We consider First-Order Linear Temporal Logic (FO-LTL) over linear time. Inspired by the success of formal approaches based upon finite-model finders, such as Alloy, we focus on finding models with finite first-order domains for FO-LTL formulas, while retaining an infinite time domain. More precisely, we investigate the complexity of the following problem: given a formula ' and an integer n, is there a model of ' with domain of cardinality at most n? We show that depending on the logic considered (FO or FO-LTL) and on the precise encoding of the problem, the problem is either NP-complete, NEXPTIME-complete, PSPACE- complete or EXPSPACE-complete. -
Formal Requirement Elicitation and Debugging for Testing and Verification of Cyber-Physical Systems
Formal Requirement Elicitation and Debugging for Testing and Verification of Cyber-Physical Systems Adel Dokhanchi∗, Bardh Hoxhay, and Georgios Fainekos∗ ∗School of Computing, Informatics and Decision Systems Arizona State University, Tempe, AZ, U.S.A. Email: fadokhanc,[email protected] yDepartment of Computer Science, Southern Illinois University, Carbondale, IL, U.S.A. Email: [email protected] Abstract A framework for the elicitation and debugging of formal specifications for Cyber-Physical Systems is presented. The elicitation of specifications is handled through a graphical interface. Two debugging algorithms are presented. The first checks for erroneous or incomplete temporal logic specifications without considering the system. The second can be utilized for the analysis of reactive requirements with respect to system test traces. The specification debugging framework is applied on a number of formal specifications collected through a user study. The user study establishes that requirement errors are common and that the debugging framework can resolve many insidious specification errors1. I. INTRODUCTION Testing and verification of Cyber-Physical Systems (CPS) is important due to the safety critical applications of CPS such as medical devices and transportation systems. It has been shown that utilizing formal specifications can lead to improved testing and verification [24], [32], [45], [33]. However, developing formal specifications using logics is a challenging and error prone task even for experts who have formal mathematical training. Therefore, in practice, system engineers usually define specifications in natural language. Natural language is convenient to use in many stages of system development, but its inherent ambiguity, inaccuracy and inconsistency make it unsuitable for use in defining specifications. -
Reversibility of Executable Interval Temporal Logic Specifications
REVERSIBILITY OF EXECUTABLE INTERVAL TEMPORAL LOGIC SPECIFICATIONS ∗ APREPRINT Antonio Cau Stefan Kuhn Cyber Technology Institute, Cyber Technology Institute, School of Computer Science and Informatics, School of Computer Science and Informatics, Faculty of Computing, Engineering and Media Faculty of Computing, Engineering and Media De Montfort University, Leicester, UK De Montfort University, Leicester, UK [email protected] [email protected] James Hoey School of Informatics, University of Leicester, Leicester, UK [email protected] May 10, 2021 ABSTRACT In this paper the reversibility of executable Interval Temporal Logic (ITL) specifications is investi- gated. ITL allows for the reasoning about systems in terms of behaviours which are represented as non-empty sequences of states. It allows for the specification of systems at different levels of ab- straction. At a high level this specification is in terms of properties, for instance safety and liveness properties. At concrete level one can specify a system in terms of programming constructs. One can execute these concrete specification, i.e., test and simulate the behaviour of the system. In this paper we will formalise this notion of executability of ITL specifications. ITL also has a reflection operator which allows for the reasoning about reversed behaviours. We will investigate the reversibility of executable ITL specifications, i.e., how one can use this reflection operator to reverse the concrete behaviour of a particular system. Keywords Interval Temporal Logic · Time Reversion · Program Reversion · Reversible Computing. 1 Introduction Formal methods have been used in computer science to verify desirable and undesirable properties of programs. One arXiv:2105.03375v1 [cs.FL] 7 May 2021 type of formalism introduced is temporal logic. -
Formal Specification of Scientific Applications Using Interval
5 Formal Specification of Scientific Applications Using Interval Temporal Logic BOJANA KOTESKA and ANASTAS MISHEV, University SS. Cyril and Methodius, Faculty of Computer Science and Engineering, Skopje LJUPCO PEJOV, University SS. Cyril and Methodius, Faculty of Natural Science and Mathematics, Skopje Scientific applications simulate any natural phenomena in different scientific domains. Moreover, the problems they solve are usually represented by mathematical models. Taking that in advance, these problems can be described by using specific formal notation and mathematical formulas. Scientific applications are usually created by the scientists without using any software development engineering practices. Our main goal is to include formal methods in the testing process of scientific applications. In this paper, we adapt Interval Temporal Logic (ITL) as a flexible notation for describing software applications. We use Tempura framework and Ana Tempura tool for specifying the properties of the scientific software system. The correctness of the code is verified by comparing the results from the program output and functions written in Tempura. This process is especially important when some code changes or optimizations are made. To verify this concept we made a formal description of the code for calculating bound states of the Morse oscillator well. Categories and Subject Descriptors: D.2.4 [Software Engineering]: Software/Program Verification —Validation, Formal Meth- ods; G.4 [Mathematics of Computing]: Mathematical Software—Certification and testing, Documentation, Verification General Terms: Verification Additional Key Words and Phrases: Scientific application, Formal Specification, Interval Temporal Logic, Ana Tempura, Morse Oscillator 1. INTRODUCTION Scientific applications are widely used nowadays in different scientific domains. Numerical simulations performed by scientific applications can solve problems in many research fields such as: computational chemistry, physics, engineering, mathematics, mechanics, informatics, bioinformatics, etc. -
CMPSC 267 Class Notes Introduction to Temporal Logic and Model Checking
CMPSC 267 Class Notes Introduction to Temporal Logic and Model Checking Tevfik Bultan Department of Computer Science University of California, Santa Barbara Chapter 1 Introduction Static analysis techniques uncover properties of computer systems with the goal of im- proving them. A system can be improved in two ways using static analysis (1) improving its performance and (2) improving its correctness by eliminating bugs. As an example, consider the static analysis techniques used in compilers. Data flow analysis finds the relationships between the definitions and the uses of variables, then this information is used to generate more efficient executable code to improve the performance. On the other hand, type checking determines the types of the expressions in the source code, which is used to find type errors. Model checking is a static analysis technique used for improving the correctness of computer systems. I refer to model checking as a static analysis technique because it is a technique used to find errors before run-time. For example, run-time checking of assertions is not a static analysis technique, it only reports an assertion failure at run- time, after it occurs. In model checking the goal is more ambitious, we try to verify that the assertions hold on every possible execution of a system (or program or protocol or whatever you call the thing you are verifying). Given its ambitious nature, model checking is computationally expensive. (Actually, it is an uncomputable problem for most types of infinite state systems.) Model checkers have been used in checking correctness of high level specifications of both hardware [CK96] and software [CAB+98] systems.