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Journal of Integrated Circuits and Systems, vol. 13 , n. 2, 2018 1 A High-Efficiency CMOS Rectifier for RF Using Bulk Biasing Control Circuit 1 2 3 T. O. Moraes Junior , R. C. S. Freire , and C. P. Souza 1Department of Electrical Engineering, Mauricio de Nassau University Center, Campina Grande, Brazil 2 Department of Electrical Engineering, Federal University of Campina Grande, Campina Grande, Brazil 3 Department of Electrical Engineering, Federal University of Paraíba, João Pessoa, Brazil, e-mail: [email protected] the source and drain terminals of the CMOS transistors are Abstract— In MOSFET-transistor based rectifier circuits, clearly not continuous and, consequently, a positive poten- leakage currents occur through both source-bulk and drain- tial difference appear across the drain-bulk junction and bulk connections of their transistors causing some power dissi- across source-bulk junction causing leakage current through pation decreasing their efficiency. Such a scenario is more the respective bulk due to the appearance of parasitic di- worrying in ultra-low power circuits as those used in energy harvesting. As a solution, in this work it is proposed a control odes. circuit of transistor bulk biasing that switches the bulk bias in In order to reduce or eliminate such leakage currents, it is an efficient way assuring adequate inversion of the source-bulk shown some half-wave rectifiers in [11] and [12] that uses a and drain-bulk junctions. The rectifier based on the proposed scheme of switching the bulk terminals of the diode- bulk biasing control circuit shows to be a high-efficiency one connected transistors in order to reduce the threshold volt- capable of reducing the leakage currents. To obtain experi- age and the leakage current. In [11], as the bulk terminals mental results, the circuit was fabricated in a 130 nm CMOS process and tested on a micromanipulator. The results were are connected directly to terminals of the alternating power compared with other works where it is observed that the effi- supply, the bulk biasing voltage is not constant allowing ciency of our proposal reaches up to 72.5% or 5% higher that conduction through the drain-bulk or source-bulk junctions the best previous one. decreasing the achieved PCE. In [12] the bulk biasing is carried out by an external power supply provided by a mi- Index Terms— CMOS rectifier; bulk biasing; power con- croprobe that is unviable where such a power supply is not version efficiency. possible in practice. In [13], four additional transistors are used to bias the bulk of the bridged p-type transistors of a I. INTRODUCTION conventional full-wave rectifier to eliminate leakage cur- Ultra-low power CMOS rectifiers are applied to RFID rents (for the n-type transistors, there is no bulk biasing). [1], energy harvesting systems, biomedical instrumentation However, those additional transistors degrade the efficiency [2][3], or any electronic device that energy consumption is of the rectifier because they generate even more leakage critical. In general, researching of CMOS rectifier topolo- currents. In [14] the bulk biasing technique is applied in a gies aims to reduce voltage drop of the constituent transis- charge-pump based DC-DC converter that requires an ex- tors and to improve the power conversion efficiency (PCE) ternal clock generator for bulk biasing making it unfeasible [4-7] for energy harvesting. Some topologies of rectifier are based on: (I) Vt cancella- As an alternative to overcome these drawbacks, in this tion techniques [1][7]; (II) circuits with active-diode using work it is introduced a high efficiency low-power full-wave operational amplifiers [6][10]; (III) bridgeless AC-DC con- CMOS bridge rectifier using a proposed bulk biasing con- verters [6]; (IV) conventional AC-DC rectifier using transis- trol circuit (BBCC) that avoids the appearance of parasitic tors instead of diodes [9][10]. diodes and consequently leakage currents. The proposed In rectifier topologies based on Vt cancellation tech- BBCC is composed of only four additional transistors ar- nique, it is aimed to decrease the voltage drop through the ranged in a simple and innovative way and the BBCC-based rectifier to obtain larger output voltage levels across the rectifier shows to achieve a high PCE. The BBCC does not load [1][7]. However, these techniques reduce the PCE of use neither operational amplifier nor Vt cancellation tech- the rectifier, since the involved leakage currents are in- niques and, unlike the schemes of [11-14] its additional creased due to the transistors operate near the linear region transistors provide a continuous bulk voltage for self- when they are in cut-off state. Rectifiers with active-diode biasing the n-type and p-type transistors of the bridge, based on operational amplifiers [4][8] increase the energy avoiding appearance of parasitic diodes in the drain-bulk consumption since the operational amplifiers needs to be and source- bulk junctions. Plus, the proposed circuit does powered with some external power supply, which is not fea- not depend on any external power supply for bulk biasing, sible for energy harvesting, for example. Bridgeless AC-DC operating exclusively with the input alternate voltage. converters [6] use inductors that show to increase energy An integrated BBCC-based rectifier circuit was fabricat- consumption decreasing PCE. ed with a 130 nm CMOS process with its components fully In the conventional CMOS rectifier, for instance the di- integrated. Experimental results were obtained using a test ode bridge full-wave one [9], the voltage levels applied to bench containing a RF generator, a micromanipulator with microprobes and an oscilloscope. Additionally, post-layout Digital Object Identifier 10.29292/jics.v13i2.3510.29292/jics.vXXiX.X 2 MORAES JUNIOR et al.: A High-Efficiency CMOS Rectifier for RF Using Bulk Biasing Control Circuit simulations were performed in Virtuoso/Cadence software p-type conduction and its results were compared with the experimental ones. 0.8 Finally, an experimental comparative study with other cir- 0.6 0.4 p-type bulk (V ) cuits was carried out to demonstrate the efficiency of our out T T drain (V ) proposition. 0.2 N0 P0 A 0 n-type bulk II. CONVENTIONAL RECTIFIER 20 20.5 21 21.5 22 22.5 23 23.5 24 24.5 25 n-type conduction The proposed BBCC-based rectifier circuit is based on a Voltage (V) Vin conventional full-wave CMOS rectifier, shown in Fig. 1, 0.5 which consists of two p-type transistors, TP0 and TP1, and 0 two n-type transistors, TN0 e TN1. In this circuit, when -0.5 and , TP0 and TN1 are conducting (ON) while TP1 and TN0 are cut-off (OFF), interconnecting the load 20 20.5 21 21.5 22 22.5 23 23.5 24 24.5 25 time (ns) to through TN1 and TP0. Similarly, when and , TN1 and TP0 are OFF while TP1 and TN0 are ON, and Fig. 2. Conduction of the drain-bulk junctions of the conventional Full- Wave CMOS rectifier. is interconnected to through TP1 and TN0. As in all situations the higher potential is interconnected to the load, on the capacitor . the voltage across in relation to ground is always positive Then, , because and . Therefore, [1]. can be expressed as (1) the sum of the current in the triode It is important to observe that the bulk biasing of the region and the current in the drain-bulk junction according transistors in ON state should be in such a way that the pn to [15][16]: junctions between source-bulk and drain-bulk of the transis- tors must be reversed. This biasing prevents leakage current, Wp 1 2 and transistor body-effect take places. i Cv V v v I evDB nV T 1 , (1) d p oxL GS t DS2 DS S In order that the threshold voltage has not large varia- p tions, the bulk (B) is connected to the source (S) terminal, where represents the aspect ratio of the p-type tran- ( =0), as shown in Fig. 1. On the other hand, when sistor; the transconductance parameter; the thresh- , the drain-bulk voltage and parasite diode and leakage current appear. Therefore, in a rectifier circuit it old voltage; the saturation current of the drain-bulk junc- is important to ensure that the both source-bulk and drain- tion diode; n the ideality factor; the thermal voltage. bulk junctions are always reverse preventing leakage cur- In Fig. 1, when and , TP0 and TN1 are ON rent and unneeded power dissipation. For example, when while TP1 and TN0 are cut-off, thus the circuit current can the drain voltage ( of TP0 in Fig. 1, is equal to and its be computed based on (1) considering and bulk voltage is equal to is greater than and . Then, replacing and in (1) and let leakage current appears as can be seen in the simulation re- VDB nVT I K I S e 1 be the leakage current, it is obtained: sults shown in Fig. 2 (red circle at p-type conduction). Simi- Wp larly, for TN0, is less than and leakage current appears ICC p ox ... as can be seen in Fig. 2 (black circle at n-type conduction). Lp (2) Then, leakage currents exist in drain-bulk junctions for all 1 2 transistors of the rectifier shown in Fig. 1. ...VVVCAAAKVV t out V out VI 2 To compute the drain current of , for example, when is equal to , ; where and in (2), according to [15][16], can be expressed as: is the peak value of the input voltage ; is the voltage drop across the transistor; is the ripple voltage depending 1 Vout(V p V d ) 1 , (3) 4fCL (R L r DS ) CA because , where , load A and TN1 transistor resistance.

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