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Private Digital Communications Using Fully-Integrated Discrete-Time Synchronized Hyper Chaotic Maps

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Private Digital Communications Using Fully-Integrated Discrete-Time Synchronized Hyper Chaotic Maps PRIVATE DIGITAL COMMUNICATIONS USING FULLY-INTEGRATED DISCRETE-TIME SYNCHRONIZED HYPER CHAOTIC MAPS by BOSHAN GU Submitted in partial fulfillment of the requirements For the degree of Master of Science Thesis Adviser: Dr. Soumyajit Mandal Department of Electrical, Computer, and Systems Engineering CASE WESTERN RESERVE UNIVERSITY May, 2020 Private Digital Communications Using Fully-Integrated Discrete-time Synchronized Hyper Chaotic Maps Case Western Reserve University Case School of Graduate Studies We hereby approve the thesis1 of BOSHAN GU for the degree of Master of Science Dr. Soumyajit Mandal 4/10/2020 Committee Chair, Adviser Date Dr. Christos Papachristou 4/10/2020 Committee Member Date Dr. Francis Merat 4/10/2020 Committee Member Date 1We certify that written approval has been obtained for any proprietary material contained therein. Table of Contents List of Tables v List of Figures vi Acknowledgements ix Acknowledgements ix Abstract x Abstract x Chapter 1. Introduction1 Nonlinear Dynamical Systems and Chaos1 Digital Generation of Chaotic Masking7 Motivation for This Project 11 Chapter 2. Mathematical Analysis 13 System Characteristic 13 Synchronization 16 Chapter 3. Circuit Design 19 Fully Differential Operational Amplifier 19 Expand and Folding function 27 Sample and Hold Circuits 31 Digital Signal Processing Block and Clock Generator 33 Bidirectional Hyperchaotic Encryption System 33 Chapter 4. Simulation Results 37 iii Chapter 5. Suggested Future Research 41 Current-Mode Chaotic Generators for Low-Power Applications 41 Appendix. Complete References 43 iv List of Tables 1.1 Different chaotic map and its system function.6 1.2 Similar factors between chaotic encryption and traditional cryptography.8 3.1 Op-amp performance simulated using different process parameter 23 3.2 Different gate voltage of transistor in corner case simulation 23 4.1 System performance comparison between previous work and this project. 39 v List of Figures 1.1 Two different perspectives of a 2-D nonlinear system1. (a) Time series view. (b) Planar phase space view2 1.2 (a) Lorenz system plot with initial conditions x = -1, y = 0, z = 0. (b) Lorenz system plot with different initial conditions.3 1.3 Bifurcation diagram of a logistic map5 1.4 Scheme of chaotic encryption system based on memristor-based chaotic circuits2.9 1.5 (a) Experimental setup and FPGA test board2. (b) Experimental data stream decrypted by the system2.9 1.6 Overview of the IoT data transferring and proposed improved data communication system9 1.7 Photograph of a single hyperchaotic system implemented on a PCB board3. 10 1.8 Block diagram of purposed discrete-time hyperchaotic encryption system 11 2.1 Different folding function under several value of ¯ 14 2.2 Estimated LE spectrum of proposed hyperchaotic system 16 3.1 Feedback path of Opamp4 20 3.2 Generic model with compensation for two stage amplifier4 20 3.3 Schematic of op-amp structure using indirect feedback method4. 21 3.4 Generic model of opamp with indirect feedback method4. 21 vi 3.5 Block diagram of purposed two stage telescopic op-amp with indirect feedback path. 22 3.6 Block diagram of purposed switched-capacitor common mode feedback circuits. 22 3.7 Step response for (a) rising edge and (b) falling edge. 24 3.8 Periodic noise response. 24 3.9 Post-layout simulated AC response. 25 3.10 Block diagram of biasing circuits 26 3.11 Layout of purposed fully differential op-amp with two stage SC CMFB circuits. 26 3.12 (a) Schematic of nonlinear function generator circuits. (b) Simulated DC transfer function for folding point equals 1 and -1, ¯ = 0.5. 27 3.13 Schematic of a strong-arm comparator with pre-apmlifier stage4 28 3.14 Clock operation of comparator in the folding function 29 3.15 Proposed fully differential folding function circuits schematic. 30 3.16 Dynamic discrete comparator based logic condition module. 30 3.17 Simulation result of folding function when ¯= 0.5, folded point 0.5 Æ¡ and 0.5. 30 3.18 Schematic of the sample and hold circuit. 32 3.19 Simulation results for two series connected SH circuits 32 3.20 General block diagram for non-overlapping generating circuits5 33 vii 3.21 Block diagram of purposed discrete-time hyperchaotic encryption system. 35 3.22 2 mm 1 mm sized layout of purposed discrete-time hyperchaotic £ encryption system. 36 4.1 Time series of the hyperchaotic system and zoomed-in figure. 37 4.2 (a) Phase space of the simulated data X , Y and Z . (b) Power spectrum density of the vector output. 38 4.3 Time domain synchronization error of x, y and z channels. 38 4.4 Synchronization of X, Y state variables 39 4.5 Time series of demodulated signal at receiver. 40 4.6 Time series of demodulated signal at receiver. 40 5.1 A chaotic communication system in current mode6. 42 viii Acknowledgements 0.1 Acknowledgements I would like to thank my advisor, Dr. Soumyajit Mandal, for his knowledge, guidance, and advice throughout my studies here at CWRU. I would also like to thank Dr. Francis Merat and Dr. Christos Papachristou for being a part of my committee and reviewing my thesis. Finally I would like to thank all the ICSP Lab members especially Jifu Liang, Xinyao Tang, giving a lot of practical advice on my chip design and helping me a lot when taping out. ix Abstract Private Digital Communications Using Fully-Integrated Discrete-time Synchronized Hyper Chaotic Maps Abstract by BOSHAN GU 0.2 Abstract With the proliferation of Internet-of-Things (IoT) at public facilities, work places, the home, and beyond, securing data communications is becoming increasingly challeng- ing. This thesis describes the analysis and practical integrated circuit (IC) design of synchronized hyperchaotic maps for energy-efficient private data communication be- tween (or within) IoT nodes. The data is streaming-encrypted in the physical layer us- ing chaotic masking and decrypted with synchronized chaotic mapping, resulting in a compact and low-power system that operates independently of the digital processor and avoids the need for analog-to-digital (ADC) conversion. The proposed private commu- nication scheme is expected to be particularly useful for high-fidelity real-time private data transmission through short-range wired links (e.g., memory and peripheral buses). Simulation results for the proposed hyperchaotic communication system were ini- tially obtained by implementing two identical hyperchaotic maps in MATLAB. Next, the maps were implemented on-chip using fully-differential switched-capacitor (SC) x discrete-time circuits and simulated using Cadence design tools. The chosen SC cir- cuit topology was used to realize low-power analog computation for the key building blocks in the hyperchaotic maps, while multiple tuning bits and a serial peripheral in- terface (SPI) control interface were added for changing the map parameters (thus al- lowing post-fabrication trimming and changing of encryption keys). The simulated hy- perchaotic system consumes approximately 15 mW from a 2 V power supply at a clock frequency of 2 MHz clock, and can operate at frequencies up to 10 MHz if needed. Ana- log signals (sinusoids at 50 mVpp , 10 kHz) were directly masked using the hyperchaotic system and successfully demasked with a synchronized map. The proposed system was designed and laid out in the TSMC 180 nm CMOS process, where it consumes an active die area of 2 mm x 1 mm, and is currently being fabricated. xi 1 1 Introduction 1.1 Nonlinear Dynamical Systems and Chaos Since the earliest beginnings, researchers and electrical engineers have solved a large number of communication signal processing and encryption problems using a linear paradigm that obeys the superposition principle. In essence, this viewpoint provides a first-order approximation of a naturally nonlinear system. However, noise and distortion can not be safely ignored in most scenario. Moreover, those commonly used signal functions like frequency generation and synthesis require inherently nonlinear effects to be harnessed1. Hence, study and practical use of nonlinear dynamical system is indispensable. Some basic concepts and technical essentials will be introduced in this chapter. 1.1.1 Concepts and Classic Examples of Chaotic Systems A Nonlinear system views its state temporal behavior in a phase space whereas a linear system uses time series. In the phase space perspective, the n system states are plotted against each other in n-dimensional space with time implicit on variable. The phase space usually contains all possible position and momentum variables. Unlike Introduction 2 Figure 1.1(a), Figure 1.1(b) gives a more natural and obvious geometrical orbit which makes quantitatively analysis easier7. (a) (b) Y Time X Figure 1.1. Two different perspectives of a 2-D nonlinear system1. (a) Time series view. (b) Planar phase space view A Nonlinear dynamical system can be described using a set of differential equations. For example, the differential equations for the one dimension state of a system can be written as dx f (x) (continuous-time system) (1.1) dt Æ xn 1 f (xn) (discrete-time system) (1.2) Å Æ for continuous time system and discrete time system, respectively. One of the most well-known and real-world-based chaotic model is called the Lorenz system. This simplified model was first proposed by Edward Lorenz in 1963. This mathematical model was used to depict natural phenomenon and forecasting atmospheric convection8. The Lorenz equations also arise in simplified models for many objects such as lasers, brush-less DC motors, electric circuits and chemical reactions. The system can be described using ordinary differential equations now Introduction 3 known as the Lorenz equations, 8 > dx (y x) > dt σ > Æ ¡ <> dy (1.3) dt ½x y xz > Æ ¡ ¡ > > :> dz x y ¯z dt Æ ¡ These equations describe a two-dimensional fluid layer uniformly warmed from below and cooled from above.
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