Executing Complex PCBs 2nd Edition

Scott Miller Freedom CAD Services The Printed Circuit Designer's Guide to...™ Executing Complex PCBs

2nd Edition

Scott Miller

FREEDOM CAD SERVICES INC.

© 2019 BR Publishing Inc. All rights reserved.

BR Publishing Inc. dba: I-Connect007 942 Windemere Dr. NW Salem, OR 97304 U.S.A.

ISBN: 978-0-9980402-4-0 Visit I-007eBooks.com for more books in this series.

I-Connect007.com Peer Reviewers

John R. Watson, CID Building Control Division Legrand, North America

John R. Watson, CID, has worked in the PCB design field for nearly 20 years. In that time, he has held almost every position available. As the senior PCB engineer, John leads a team of 50+ designers in multiple divisions spanning the world in the Building Control Division of Legrand North America. Although he is a highly sought out speaker and writer, John’s passion still lies with mentoring and teaching, espe- cially young people.

Stephen V. Chavez, CID/CID+ IPC Designers Council Executive Board

Stephen V. Chavez, CID/CID+, is a member of the IPC Designers Council Executive Board and a lead electrical designer at a large, globally recognized aerospace company. He is an IPC CID+ certified designer and has been involved with the PCB design industry, both domestically and internationally, for over 28 years. Further, Stephen is an IPC CID designer certification instructor (CIT) with EPTAC Corporation and VP of the Phoenix chapter of the IPC Designers Council. He has also been a keynote speaker at several design forums at IPC APEX EXPO and other industry confer- ences and seminars and has published several industry articles to date. About the Author

Scott Miller Chief Operating Officer Freedom CAD Services Inc.

Scott has spent over 40 years in the industry. His early career focused on the interconnect field of high-performance connectors and printed circuit boards. Scott joined Freedom CAD Services in 2004 after a 20-year career with Teradyne Connec- tion Systems (now Amphenol TCS) in sales and marketing.

Drawing on his experiences from the high-speed connector and PCB industries, Scott has helped Freedom CAD to develop its services beyond layout to include electrical, mechanical, and signal and power integrity engineering services as well as prototype PCB fulfillment.

Contents

Chapter 1 1 Communication

Chapter 2 7 Plan It Before You Design It

Chapter 3 15 More Planning: The Layout

Chapter 4 21 The Design Kickoff

Chapter 5 27 Design Rules, Simulations, and Analyses

Chapter 6 33 Quality Assurance and Manufacturability

Chapter 7 41 Post-layout Processes

45 About Freedom CAD Services 8 Chapter 1

Communication

The single biggest problem in communication is the illusion that it has taken place. —George Bernard Shaw Introduction When has a meaningful electronics career challenge ever not been complex? There is probably no better example to illustrate the definition of complexity than a printed circuit board (PCB). Open up your or cellphone. At first glance, the PCB stands out as a major part of the inner workings of the device. Now, look closer. The PCB is full of smaller devices; they’re like build- ings, each interconnected with roads of copper. Yes, a PCB has been described metaphorically as a small city. The metaphor runs deep because along with the “buildings,” the design industry now refers to “floor planning” a layout.

This book will provide a set of guidelines for designing complex PCBs, with real-world examples as well as handy tips, tricks, and techniques by some of the veteran technologists at Freedom CAD Services. The Challenge: Getting Complex Designs to Market Complex printed is not easy. Data indicates that only 25% of projects are released on time without any resource surges, and 17% of all projects are canceled. The rest suffer from either project delays or they need addi- tional resources such as an increase in personnel (Figure 1.1). Life- cycle Insights also reports that the typical board project goes through 2.9 re-spins with an average cost of $44,000 per re-spin.

Figure 1.1: The fate of complex printed circuit design projects. (Source: Lifecycle Insights) 1 Attempting to Define Complexity The complexity of printed circuits can be elusive. This industry continues to evolve at an ever-increasing rate, and the definition of “complex” is constantly changing. For this book, we will use several characteristics listed here, but realize that the list is not complete.

A printed circuit is complex if it has one or more of these characteristics:

• The density of component pins exceeds 110 pins per square inch (17 pins per square cm)

• The density of component parts exceeds an average of 5 pins per part

• The density of component parts exceeds 10 parts per square inch (1.55 per square cm)

• The number of pins of any BGA exceeds 800

• The pitch of the pins of any BGA is less than 0.8 mm

• The thickness of the finished board exceeds 3.0 mm or is less than 0.5 mm

• The rise time of any complex component is less than one picosecond

• The circuit requires mixed technology of digital, radio frequency (RF), or analog

• The board will require mixed materials for construction

• The finished board needs to be cost sensitive for high-volume production

• The board needs to be finished in less than the standard process time

• The board has a lot of electrical constraints

Using these criteria, Freedom CAD has selected three past projects to help characterize our topic (Table 1.1).

2 Table 1.1: Characteristics of three complex PCBs.

3 PCB Design Process Flow Because of the number of projects going at any one time, Freedom CAD uses a standard PCB design process flow (Figure 1.2). This process flow is simplified for this book with all the checkpoints and customer approval steps omitted. For the remainder of the book, this process flow will be followed.

Figure 1.2: The Freedom CAD PCB design layout flow.

Communication Challenges in the PCB Industry To an electrical engineer (EE) facing the pressures of looming deadlines, communicating with your fabricator should be a primary focus. Hopefully, an EE adheres to the vast amount of electronic standards available from IPC, IEEE, UL, and others during the schematic capture design process. There are also manufacturing standards to consider when selecting parts.

Odd PCB outlines and thicknesses? Through-hole, surface mount, or pin-in- paste? Many design options must be clarified to be considered on the front end. There are times when the EE is faced with a design challenge that is so advanced and cutting edge that there are no standards to follow. During a complex PCB design challenge, creative forms of communication must take place to achieve a successful design.

4 5 6 Chapter 2

Plan it Before You Design It

complex

/kɑmˈplɛks/ Brit /ˈkɒmˌplɛks/ aadjective complex Definitionhighway system. 1 [more complex; most complex]: Having parts that connect or go together in complicated ways:

Verbal, Written, Graphic, and Electronic Communication For the finer points of complex PCB design, communication standardization is required more than ever. IPC has done a good job helping the PCB industry in both verbal and written forms of communication with IPC-T-50 (Terms and Definitions for Interconnecting and Packaging Electronic Circuits). A successful design process cannot tolerate terms that can have entirely different mean- ings to various stakeholders. Non-standard terms can become a major source of confusion.

A member of the operations team* emphasized that designers need to be aware of all the possible communication options available:

“We find that more and more layout designers are working remotely from their engineer. Freedom CAD performs 99% of our layout support remotely from our customers’ engineers. We, like many organizations, utilize web conferencing tools such as WebEx, GoToMeeting, or Google Hangout, to name a few. These tools enable screen sharing and drawing, which greatly reduce the obstacles of working remotely. Web conferences can be set up in seconds by either party for real-time collaboration to view and discuss issues without resorting to lengthy emails that can cause delays while waiting for answers. When we are not local to the engineer, we use these web conferences to hold a kick-off meeting between the layout engineer, electrical engineer, and others related to the design to walk through the design details. This provides the opportunity to visually share information and ask questions to learn what’s critical and what’s not from the customer to facilitate a smooth launch of the design process.” *Editor’s Note: All quoted sources are Freedom CAD employees. 7 The Logic Diagram and Schematic Ready for another metaphor? The preliminary preparation for a PCB project is like planning for an expedition. Can you imagine any successful adventurer undertaking an expedition to a challenging destination without proper plan- ning? Maps with direct and alternate travel routes must be charted. Transpor- tation hubs and timing schedules must be researched and recorded. Expense and supply estimations must be secured. Often, the expedition is underwritten and funded by sponsors who must approve all of its major aspects.

This is similar to a complex PCB design. Before any electronic copper trails are trod, all of the pieces of a complex PCB design—the parts and their value, source, cost, connectivity, and performance requirements—need to be captured within a schematic capture design database.

The schematic capture database, also known as the front end, serves as the repository for the entire virtual design. A tremendous amount of data is hier- archically organized and stored here in the front end of the design by the EE. The logic diagram is like a world map. It shows the PCB project view from a high altitude on its respective sheet in the capture program. The logic diagram’s graphic blocks are defined and labeled with their general design functionality. A complex PCB can have multiple blocks that contain more detailed informa- tion within.

A simple click on any logic box will dive the user deeper into the respective schematic and allow access to more specific detail. A schematic sheet typically contains graphic symbols for parts used in the design portion, lines repre- senting connections, and special notes for informa- tion that cannot be conveyed with standard symbols. The schematic level is where the process of specific design information begins. It may go without saying that the more information that can be packed in, the better. But what is the best type of information to store here? How best to program, edit, and archive this informa- tion?

8 Regarding the front-end design process, one program manager said:

“One of the most import aspects of schematic capture is to convey the flow of the design. The schematic should not only have the individual circuits grouped together but should also allow the PCB designer to get a visual concept of how the circuits flow. Typically, not all of the information is in the schematic. There are specific layout requirements for individual parts that must be considered. Additional outside documents may include the recommended PCB layout requirements supplied by the part manufacturer as well as industry standard documents, which are critical for success such as IPC, UL, and many others. It is also very helpful to get a PCB design requirements document or a general performance specification that covers all of the PCB’s critical requirements.”

The value added by the fresh perspective of the designer goes a long way. The front-end requirements of schematic design can take an engineer days, weeks, or even months to pull together. With literally thousands of items to consider and keep track of, most electronic engineers appreciate a keen second pair of eyes to catch any errors or areas required for improvement. The program manager added:

“It is common for experienced designers to see something in the schematic that does not look right. This may be a connection to a part that goes nowhere, or there may be multiple pull-up resistors on the same net on different pages. Sometimes, the designer can help to optimize the design, perhaps flagging too few or too many decoupling capacitors. These types of issues are compiled as queries and sent back to the EE for confirmation.”

When asked about some of the most important considerations of front-end schematic success, the program manager continued:

“The association between the schematic symbol and PCB footprint or decal name is really important. The descriptive information in the relationship is used to map the logic symbol to a physical library part along with the manu- facturer and complete manufacturer’s part number used for ordering. This provides an export of the bill of materials (BOM) that matches the exported netlist data used for the PCB layout. In most cases, it is acceptable to use company part numbers for OEM designs.”

However, with regard to adding constraints information to the schematic, or perhaps overconstraining the design, the program manager warned:

“We typically do not like to see a lot of constraints embedded into the sche- matic because with many PCB layout tools, there are efficient and inefficient

9 methods of coding rules. Some work well, but others do not, given a particular application. Sometimes, it is far easier to add a note to a schematic rather than a complex algorithm. For instance, critical parts placement notes or a max delay note can be added if a part needs to be placed close to a source or destination. Meanwhile, embedded constraints within the schematic can be effectively employed for high-speed nets that have common rules applied and can be assigned to a net group or class. Differential pairs can also be identi- fied when specially named with a P(+) and N(-) so that it is apparent they are paired. Power nets are best identified as such in their respective net naming convention, and their current carrying requirements can be highlighted by either an embedded constraint property or note on the schematic.” Mechanical Communication: DXF and 3D STEP Files Another important process step when beginning a PCB layout is provision for a complete understanding of the mechanical attributes and constraints of the PCB. All of the mechanical shapes of all of the parts that will be installed onto the PCB—along with the shape or outline of the PCB itself—must be considered.

Communication of the mechanical constraints of a complex PCB does not usually originate from the schematic or the electronics engineer. Mechanical design constraints typically originate from the mechanical engineering team involved in the project. Mechanical design personnel will have been given the overall size parameters of a product.

Mechanical constraints that may become issues include: • Extremely small boards or reduced layers • Key components placed at the edge of the board • Complex connectors • Mezzanine cards • High heat dissipation components • Mounting holes for heat sinks • Cavities or plated edges • Rigid-flex constructions • Components on flex or rigid-flex • Unusual form factor • No parts on the back side • Large/complex parts or connectors on both sides

10 Long before the PCB is defined electrically, the mechanical designer lays out the plastic or sheet metal housing for the elec- tronics, perhaps based upon sketches and renderings from an industrial designer. Products are rarely designed from the inside out, regard- less of what marketing folks might say.

Once the mechanically relevant ergonomic and visual needs are met, the PCB gets whatever scraps of volume remain within the enclosure. This point is made because it is this mode of design—designing from the outside in—that often increases the complexity of a PCB due to the lack of definition of what must materialize electronically for the product to function.

Once determined, a PCB outline—including its mounting holes and critical component interface points—is prepared for the designer. The ways in which a mechanical board outline is defined and passed on to the PCB designer has changed little over the past decade. Think about it—a PCB is typically a flat object, usually with a simple, rectangular shape. A simple 2D DXF stick figure continues to serve as the most efficient way to communicate a simple PCB outline, but what about a complex PCB?

When packaging rules have been compressed due to limited space, attention to overall design constraints matters more. To get the board and components to fit within the given space of the enclosure, a designer will need to know what and how to compromise. Traditional DXF outlines usually include general keep-out and keep-in areas and special notes on tolerancing as required. However, is there a better way for the mechanical designer to convey what really matters with regard to the PCB form?

3D design technology has exploded within the electronics design industry. In relatively recent history, 3D STEP files are effectively being imported into PCB CAD libraries and onto the layout. Additionally, mechanical designers are now capable of delivering a 3D STEP model of the enclosure cavity including all of the parts and features in contact or proximity to the PCB. This type of tech- nology has proven its worth in both PCB layout, and mechanical checking as

11 the 3D database can be shared and compared between the ME and EE for iteration as the design layout progresses.

An example of a complex mechanical 3D feature is mezzanine cards. Not only are the connectors for the mezzanine card an issue but it also influences heat transfer and cooling. Simulations of temperature rise will be needed to prop- erly place other hot components on the main board during layout. Electrical Debug The seven Hs of the board features can be concerning, and most are electrical: 1. High speed 2. High current 3. High voltage 4. High density 5. High runners 6. High class (IPC) 7. High pin count

Other electrical features must be discussed early in the project, especially about the use of DDR 2, 3, or 4 memory, and if there needs to be matched lengths or groups or ESD diodes that are not obvious. You must carefully walk through the schematic and get an understanding of what isn’t on paper.

Another important output function of the schematic is a connectivity list or netlist. The netlist can be viewed as a text file, which is formatted to show all the circuit connectivity that will be imported into the PCB layout. The netlist format can be automatically exported, and usually includes a header defining the format information followed by text strings describing the net names and their respective nodes. Netlists are useful to the fabrication and test stake- holders for verification purposes.

12 A sample schematic.

13

Chapter 3

More Planning: The Layout

First rule of engineering; beware prototypes. Along with, avoid anything made by an engineer who doesn’t have all his own fingers. —Simon R. Green

Assessing, Reviewing, and Auditing the Design Constraints When reviewing a layout, a PCB designer is going to have to quickly assess how complex the design will be. The degree of complexity determines critical aspects of the design: cost, timeline, and the ability to complete it. Reviewing and sorting through a vast amount of data supplied by an EE or project team takes a lot of experience, an acute eye, and knowing the right questions to ask regarding information that might be missing. A PCB estimated to require 12 layers to route easily will be considered extremely complex if the cost constraints will only allow for eight layers. A material list of components easily populated onto a single side of a 10x12” board outline will become a complex design if the mechanical constraints only allow for a 5x6” outline.

As a review, this is a general checklist of critical constraints and why they are important to identify before starting the layout: o Timeline: Determines the concentrated degree of effort and how polished the design will be o Cost: Determines the materials and process options o Signal integrity and high-speed constraints: Determine component placement, layer stackup, and conductor sizes and spacing o Power and current-carrying requirements: Determine copper thickness (weight), required plane layers, and conductor width

15 General Design Guidelines The following are general design guidelines to consider for complex boards and their manufacturability:

• Analyze schematics and verify as early as possible

• Conduct an analysis of analog and mixed signals at the sche- matic stage

• Define constraints for design for test (DFT)

• Explore signal integrity (SI) and power integrity (PI)

• Know the capabilities of the fabricator and assembler

• Look at the overall design intent, if it's going to be on the fringe of manufacturability, include the fabricator’s and assembler’s application engineer in the design effort

• Specify tolerances that will achieve the end-product require- ments for the board; at a minimum, specify the board thick- ness, hole sizes, line widths, board dimensions, features to hole and edge, controlled impedances, etc.

• On controlled impedance designs, give the fabricator authori- zation to build to impedance, so they can set up the design to nominal by varying the dielectric and trace width as necessary

• The board should be symmetrical and include the copper distribution within the layer, core side by side, and the overall stack-up symmetry

• Add or give the fabricator authorization to add plating thieves (current robbers) to the internal and external layers

• Consider an annular ring and design with pad sizes that will meet the reliability requirements needed for the design

• Allow the fabricator to grow or clip the internal pads so that minimum reliability integrity is maintained

• Give the fabricator authorization to add tear-dropping on the inner and outer layer if required Pre-planning How will all of the available preliminary design data be processed? Will the layout start from scratch? Is there a similar legacy design that can be lever-

16 aged as a source for the new design? One designer shared his thoughts on mechanical source data and electrical constraints:

“We like to request mechanical data from the customer in the form of EMN or 1:1 DXF files, which can be imported into the CAD tool. This is more effi- cient and less prone to error. To ensure that electrical rules are followed, we also like to get the rules (match groups, max length, spacing for noisy signals, etc.) in a DOC file or spreadsheet so we can enter them into the constraint manager.”

Moreover, there are other strategies for designers to leverage timesaving methods when starting a project. The designer continued:

“We discuss the opportunity to determine if there are previous designs or sections of the design that can be reused. Reusing previous board outlines or existing stackup and PCB fabrication and assembly drawings notes is a simple way to save time. Reusing previous circuit designs, such as power supplies or DDR routing, can save significant time. Again, there are third-party tools, such as EMA Design Automation’s CircuitSpace and dalTools, that make reuse in Allegro even more efficient. CircuitSpace can also be used to reduce- place ment time by auto-clustering functional groups of components.”

Emphasizing the impor- tance of considering how various sections of a complex PCB will relate and communi- cate with one another, the designer added:

“We have found that component area place- ment-and-route studies can be very helpful in identify- ing solutions for the defined problem areas, especially before tack- ling the complete board design. These efforts enable the engineer

Figure 3.1: Flow planning process for stackups and pre-placement.

17 and designer to work through the tradeoffs often required to resolve these issues without the distractions of the peripheral items associated with the complete board design. When completed, the results of the placement-or- route studies can be used in the actual design and provide a faster and more predictable design cycle time to complete the board.”

The designer concluded:

“We use a flow planner to help plan the routing on the various layers. It allows us to grab a bundle of traces and plan their track layer by layer while accounting for how much room they will require based on their constraints. This provides a couple of efficiency benefits. One, it identifies bottlenecks in the planning stages, and two, the flow plan can be used to provide guidance to the designers who are doing the routing to support the lead designer” (Figure 3.1).

Using the previously mentioned process and other density metrics, the three example boards selected (Table 1.1) all have requirements that place them in the HDI region (Figure 3.2).

Figure 3.2: Component density (from Table 1.1 inputs) shows that the example boards will all need to use HDI construction.

18 The BOM and Component Library Footprints Checking the BOM is critical for quotation, and the assembly partner will need to check for final avail- ability and analyze for processing capability and testing. The data contained in the BOM can be uploaded to an enterprise data- base for higher-level Figure 3.3: Sample bill of materials (BOM). purchasing and inven- tory management. The BOM is usually output in the form of a text file or spreadsheet (Figure 3.3). Building New Library Parts Sometimes, it is up to the PCB designer to create new component footprints and other elements for a design. A simple and straightforward process for footprint creation is best. It is also based on satisfying the needs of the client to create perfect solder joints that could pass an inspection of IPC’s J-STD-001. If the component footprints are not correct and all assembly processes aren’t taken into consideration, assembly manufacturing engineers (AMEs) have a more difficult time soldering all the component pins to the PCB lands.

To yield a perfect solder joint, there are three basic processes:

1. Paste screening for solder deposition

2. Automated placing of components

3. Oven reflow of solder

The recommendations for land geometry are almost always provided by the component manufacturer and are best compared to the industry standard for creation.

19 20 Chapter 4

The Design Kickoff

Have a vision. It is the ability to see the invisible. If you can see the invisible, you can achieve the impossible. —Shiv Khera

Timeline Start with the end in sight. We get a good chuckle when we see a project due date listed as “yesterday.” We know it’s a desire, but it’s also an impossible reality. To effectively manage the completion of a complex PCB’s launch date, it goes without saying that the project manager must be in tune with all of the steps and possible missteps of the PCB layout process. Realistic dates must be estimated based on available resources. It is important that measurable goals are selected that will be used to chart out the progress of the design. This will require vision on the part of the design manager. This timeline must be captured into a format that can be shared with other project stakeholders such as purchasing, fabrication, and assembly and test, so they can all effec- tively plan their responsibilities. Cost Constraints An EE or project leader must be well-informed of the costs and availability associated with trying new materials or manufacturing processes. An experi- enced, professional designer’s job involves staying in touch with these latest design and manufacturing materials and processes along with their availability and cost associated with complex PCB design. A PCB designer should be well- connected with the manufacturing industry and can always find and provide direction when considering pinch points in PCB design, which could jeopardize cost constraints. Volume Production Expectations Many options for robust, deluxe PCB design are reduced in high volume runs due to the incentive for cost savings. For instance, the aerospace industry may have a requirement for 20 complex communications-related PCB designs. A

21 lot hangs on the success of these types of PCBs. If the PCB fails, it could cause the failure of millions of dollars of peripheral equipment. It makes sense that the quality and cost of the design, materials, and process will be high to imple- ment everything possible to ensure the success of the PCB.

Downgrading a component’s quality to save $5 per unit is not a consideration on anyone’s mind when building in such low quantities. In this type of project, it is the non-recurring engineering (NRE) costs measured in the tens of thou- sands of dollars that constitute the bulk of the cost of the PCB run. Meanwhile, a design decision that could save $1 per unit by eliminating a few compo- nents or shrinking the PCB outline in one direction to allow several more board images to be included in the manufacturing panel has the potential to save millions of dollars on volume product quantities. It is good for a designer to know what the projected volume of the PCB will be in production so that appropriate emphasis can be placed upon on either of the two “design for” criteria: performance versus cost. Material Selection Although materials of construction were discussed in the initial quotation, now that the electrical environment is thoroughly understood by the design team and lead designer, the materials of the PCB need to be finalized so that the preliminary stackup can be addressed. Exotic materials may not be avail- able in standard thicknesses, have restrictions in prepregs, or be an item with a long lead time. Preliminary Stackup The stackup can be thought of as the vertical solution to address the PCB’s hori- zontal desires. After estimating the available real estate for parts placement, trace routing requirements, and the power plane and return path strategies for a complex PCB, a designer will need to define the order in which the layers of the PCB will be positioned. Special considerations will be made while plan- ning the stackup to meet the performance requirements of signal integrity, impedance, power delivery, and shielding. As previously mentioned, Figure 3.1 shows an analysis of component density data. The graph is simple, but a proj- ect’s position on the graphs says a lot about construction and stackup. It can provide insight into the creation of the boards stackup including signal layers for the routing and PWR/GND layers.

However, there are manufacturing considerations too. For the PCB to be fabri- cated with standardized processing, design for manufacturing (DFM) concepts will need to be considered. The PCB stackup layers must be balanced with consistent thicknesses of copper and laminate materials around the center-

22 line to prevent warping. Most PCB layout tools offer a stackup planner to assist with this planning. Once established, it is always good practice to review the stackup plans with a PCB supplier for a reality check well in advance of the first build (before the actual routing phase). Preliminary Placement Preliminary placement will serve as an eye opener for PCB designer and customer. Once the part library is updated to include all of the components required for the design, the part will be imported into the layout database with the PCB outline. Parts are usually grouped into blocks with related parts of each circuit defined on the schematic. Referred to as floor planning, it is up to the designer’s creativity to position the blocks of components within the PCB outline while considering all of the electrical and mechanical constraints defined beforehand. This preliminary placement step is usually the point where the design team will first begin to address the degree of complexity of the design. It is important to Assembly Testability Requirements remember that there Assembly testability requirements allow a degree of verification of the are many customers assembly process. One hundred percent testability is widely consid- associated with the ered a non-negotiable requirement for complex volume-oriented PCB design of a complex PCB. assemblies. Assembly test fixtures are expensive. Again, it is imperative that the PCB designer communicate with the EE and test team to establish the test requirements before the layout begins. Adding testable points or nodes to a design is best done before or during the placement and routing stages of design because test points take up real estate. It makes sense to plan routing around a test point rather than have to move a channel of routing to make room to add a test point. Some devices reduce the number of test points required on a PCB by incorporating boundary scan technology. Customer Review and Kickoff Customer review is an imperative step to take before the layout starts, while it is in progress, and upon completion. It is important to remember that there are many customers associated with the design of a complex PCB. A single designer working in a vacuum without checking with the EE, fabrication company, or assembly and test personnel will most certainly doom the capa- bilities and success of those important project stakeholders.

23 To summarize, one designer provided experienced insight:

“Working with the EE and fabricator to clearly define the requirements is a big part of planning the design. Knowing the fabricator’s limitations informs us of what we can do. Class 2 and 3 designs do not have numerical quantifica- tions, but rather allowances. One fabricator can hold a tighter tolerance than another. That being said, one fabricator will need a bigger annular ring than another to meet Class 3.”

This is what design is all about—making informed decisions about design features that will help all stakeholders to achieve success.

The designer continues:

“For example, usage may determine several factors. Class 2 and 3 designs have different requirements regarding aspect ratio, annular ring, dielectric thick- ness, and via stacking. Adjustments must be made for creepage and clearance allowances because the requirements change depending on environment and altitude.”

Here are some important flags this experienced PCB designer looks for at the start of every design layout project:

1. High current: Will most likely impact stackup, foil and plating thickness, via usage, placement, and routing.

2. High voltage: Will require more attention to creepage and clearance constraints. High-potential testing may be needed. Are motors a part of the design? Is there any constant, noisy switching? High-voltage constraints will always have a heavy impact on electromagnetic interference (EMI) and must be a serious consideration during the placement and routing phases of the complex design layout.

3. High-speed technologies: Drive the stackup requirements, material, layer usage, routing, and placement. Additional processes, such as backdrilling, may be required.

4. High-density interconnect (HDI): Will drive stackup and via size. Allowances, both cost and design, will need to be incor- porated in the switch from mechanical drilling to laser-formed interconnects between layers. Sometimes, due to design complexity, we must require Class 3 waivers to incorporate an extremely dense packaging technology.

24 5. High runner: If the board is to be a high runner—a board that will be produced in high volumes—I always review the design to see what can be done to reduce the manufacturing cost even by the slightest amount. Pennies add up in volume production! Though cost-saving ideas are sometimes complex and take more designer time to implement, I’ll present my ideas to the customer and explain that the up-front design investment can be made back ten-fold due to lower manufac- turing costs multiplied by thousands in volume production.” Three Example Boards Using the procedures outlined in this chapter, the three board projects will now have preliminary stackups and layers assigned to them (Table 4.1). The materials of construction have also been finalized.

Table 4.1: Constructions plans for three example boards.

25 GETTING IT  RIGHT   Chapter 5

Design Rules, Simulations, and Analyses GETTING IT Timing is everything in life and complex PCBs. —Anonymous

It is a fact that complex electronic components will not function properly unless  a specific set of physical conditions is met. Active components and chipset performance requirements are presently being pushed to the edge. Their capabilities are only limited by the physical geometry and electromechanical properties of the materials that interface with them. We have come to the RIGHT point where component chip makers are supplying 100-page user manuals describing not only what a chip can do, but also the layout, assembly manufac- turing, and environmental operating criteria required for it to perform. Careful  attention to these rules must be considered for the successful operation of the individual component within a circuit and the performance of the circuit in relation to all circuits on the PCB.

One designer said:

“Signal and power integrity analysis is a key way to ensure that the board design will meet the performance requirements on the first pass. By using software to simulate the effects on signal and power integrity, our customers spend less time in the lab trying to find out why their design isn’t performing as expected. Performing in-process simulations enables problems to be iden- tified and corrections to be made earlier in the design process, thus mini- mizing the collateral damage. The more items you have to move to address a  problem, the more time this takes.” Starting the Physical Design Process As previously noted in Figure 1.2, the next step is entering the execution phase of the board design process, which involves implementing all of the elaborate pre-planning that has already taken place.

27 Layout Processes Many companies employ a number of specialized layout processes. One senior project engineer explained his process for very complex boards that he has refined over many years:

“I work with larger OEMs, and this is what I tell them. I go through their design and create libraries of templates to give us predictability and efficiency. What I do is predictive engineering, which is to reuse circuits that they’ve already used. If they are a repeat customer, they already know it works, and now suddenly it saves them in fabrication, assembly, tests, and debug. They save a boatload of money and end up with fewer revision spins.

“Our process is to create reusable modules. This allows us to use parts that you’ve already used, and if it’s a new part, we go ahead and do a module for it; just substitute the old one for the new one after we’ve modified it. So, from that point on, after it has been proved to work, it works for us.

“First, we have them define stackups ahead of time. We sit down with the customer and their fabrication shop and determine whatever layer count they feel with this particular company works best. We build in all of the fabrication capabilities that their fabrication house has because they usually have more than one fabrication house. We’re just trying to define everything ahead of time so that it now becomes predictable.

“Then, you place and replicate as much as you can. That’s really what it comes down to. When the placement is done, you do placement verification. Then, once that’s all done, approved, and cleaned up, you route all of the differential pairs and high-speed clocks. Next, you send that to engineering for them to review and route the remaining signals, which are pretty much single-ended nets, matched groups, etc. That last step is final verification. When we get to that, we send them a final board to review. We can do it much faster when we have all these pieces in place because it’s already designed.

"At least I know that the replication process or reuse process is very good. It works, and people that have experienced it like it. And now the tools are better.”

The process is as follows, using clusters, templates, and bundles: 1. Auto-cluster from schematics 2. Auto-place for complex parts 3. Place 4. Replicate and/or reuse templates

28 5. Placement verify (refine) 6. Fabrication and assembly review 7. Cluster nets into bundles and route 8. Complete routing with constraints 9. Engineering review for SI, PI, and power distribution network (PDN) 10. Rest of routing 11. Validation (DFM and DFT) 12. Create a template for future use 13. Customer review 14. Deliverables

Figure 5.1 shows a typical complex multilayer designed with this process.

Figure 5.1: Example of clusters saved as templates.

29 Power Distribution Start a layout with the design of the power distribution network (PDN). This solidifies the multilayer stackup and provides for distributed capacitance if that is required for very high-speed noise suppression. Newer power integrity software now provides verification of PDN impedance but will also be used over and over to verify power delivery for complex components like large, high-pin or fine-pitch BGAs. Power integrity analysis includes both DC drop analysis, high current densities, and AC power planes.

Figure 5.2: Auto-interactive routing using simulation and constraint editor.

30 Place and Route Selective placement and routing is another methodology that can save time. The designer explained:

“During layout, signal integrity analysis is performed on all critical nets. This ensures both signal quality and timing are within design requirements. One successful technique used is seen in Figure 5.2. The critical annotated elec- trical nets are selected first, and one net is hand routed. This net then has signal integrity analysis to make sure it conforms to requirements. The elec- trical performance of this net from the analysis is captured in a constraint editor. The rest of these critical nets can now be auto-interactively routed on specific layers to the constraints just captured. The next set of critical nets is routed; first, just one net by hand—analyzed, constrained, and captured—and then the remainders are auto-interactively routed to these constraints. Avoid placing complex devices in corners or along edges, as gaining access to all the connections can be severely compromised.”

As component placement progresses, EMI validation and signal integrity analysis should all be performed to identify and correct any potential issues quickly. In the traditional design flow, these issues would not be discovered until physical testing. Such issues often require board re-spins and tooling changes to correct. Simulations during layout greatly increased the likelihood of first-pass success.

Thermal, vibration, and acceleration analyses are also important. If they are not caught during layout, issues that impact the mechanical integrity of the design are usually the most expensive and time-consuming to fix. Finally, don’t forget the manufacturability analysis. Unbalanced construction and other factors can cause board warpage which will affect assembly yields. Final Cleanup The steps for placing components onto a PCB layout are very similar to those that would be followed by a youngster in building with LEGOs to an extreme. It is easy to see the steps involved in placing parts onto a PCB design layout and could be considered a lot like the steps involved in architecturally planning your LEGO construction project. However, keeping it simple by following the rules, determining where compromises must be made, and bringing together the right people for effective collaboration is a strategy for success inany project scale in any industry.

31 32 Chapter 6

Quality Assurance and Manufacturability

Quality begins on the inside, then works its way out. —Bob Moawad

There are many definitions of quality in various industries. One only has to search for the top 10 quality gurus on the internet to become familiar with the quality concepts of Deming, Shewhart, Taguchi, Crosby, and others who are well-known for their exceptional takes on quality.

A PCB design team needs to grasp the importance of defining quality. For their purposes, quality might be defined as the standard of PCB design excellence as measured against the requirements of all predefined design constraints provided at the beginning of the project.

Once defined, how will quality be assured? Anyone familiar with the works of the quality gurus mentioned will see that it is only assured through established processes. EEs and designers are very good at listing applicable materials and manufacturing and test requirements published by IPC, SMTA, and other stan- dards organizations. However, when it comes to measuring the quality of the design itself, is there a process in place? If not, it is time to establish a PCB design quality assurance process! Design Checklist A design checklist can be comprehensive for complex PCB designs. Many values such as trace widths and lengths, clearance and spacing, component height, and keep-out restrictions are automatically checked based on the design rules programmed into the layout. Most standardized fabrication and assembly sets contain general notes that may require a little editing but cover a good portion of the design.

But what about feature checking for non-copper features? Or important PCB features like an alternate solder mask color, finish-plating composition, and

33 PCB outline tolerances required for a snap-fit into a high-tolerance enclosure? Have you considered the placement of an etched customer part number or other important identification? Consider adding items such as these to a design checklist. Documentation There is a misconception in the PCB design industry that fabrication and assembly documents are “how-to-build-it” documents. If this were the case, suppliers would be constantly no-bidding older documentation specifying how a particular feature is formed because the supplier may have scrap-piled the machinery long ago.

Enlightened PCB designers consider these drawings to be inspection docu- ments. They do not tell the supplier how to build the PCB or assembly as much as they define the points of inspection so that quality assurance personnel can measure how well the supplier did in meeting the requirements defined in the documentation. They are, effectively, inspection documents. IPC-D-352A, Documentation Requirements for Printed Boards, Assemblies and Support Drawings, is an industry specification to reference when creating documenta- tion for PCBs or CCAs. Fabrication Specification PCB fabrication specifications help define important features and processes. The following PCB process notes are referenced as minimal expectations for many manufacturing suppliers. The PCB end-use classification is set to Class 2 in the following examples. Complex PCBs may require classification set to Class 3. It is up to the end user to define the product class and adjust the notes accordingly.

1. Identify the primary side of the PCB.

The designer designates the primary side of the PCB. The fabrication pictorial shows the board outline orientation.

2. Identify the fabrication and acceptability criteria.

Suggest IPC-6012, Class 2, with acceptability per IPC-A-600, Class 2. IPC-6012 describes manufacturing, qualification, and performance for Class 2- (dedi cated service electronics) while acceptability (inspection) criteria are covered in IPC-A-600. These two specifications work together to define quality.

3. Identify the materials.

Example: Plastic sheet laminated, glass base, and epoxy resin-type FR-4 series or equivalent per IPC-4101 with a Tg ≥170°C and a Td ≥330°C. 34 Allow suppliers to use any glass epoxy resin system, glass weave, or dielectric constant conforming to IPC-4101. Define glass transition temperature (Tg) and decomposition temperature (Td) with values that are compatible with RoHS processing temperatures. Electrodeposited copper foil may be rolled and annealed as provided to the PCB manufacturer. Electrodeposited (ED) copper is added to the base copper during the plating process. The base thickness of copper foil (finished meaning etched or plated) is noted in the stackup detail.

4. Specify the overall board thickness.

PCB thickness is specified in the notes. For example, ±10% is considered a very common tolerance for PCBs greater than 0.039” (1.0 mm). For a PCB thickness less than 0.039” it is a good idea to check with the PCB supplier for a manufac- turable tolerance specification.

5. Specify a flammability rating.

Example: UL rating of UL 94V-0.

Underwriters Laboratories in the United States has a flammability rating that requires that any flame on a vertically mounted PCB should stop within 10 seconds. This is required on PCBs utilized in most industries.

6. Specify an impedance if required.

Examples:

• Layers 1 and 6: 60-ohm ±10% single-ended on 0.0061” (0.155 mm) lines

• Layers 3 and 4: 100-ohm ±10% differential on 0.0045” (0.114 mm) with 0.0095” (0.241 mm) spaced lines

Impedance control is specified in this example as identifying the layer, imped- ance value, tolerance, and line width to be controlled. It is common for designers to identify significant lines by assigning them a unique width so they will not be confused with uncontrolled lines. For example, 0.0061” widths will stand out from all other 0.006” lines.

7. Specify an etching and plating tolerance.

Examples:

• ±20% from supplied Gerber images 0.010” (0.25 mm) or less

• ±0.002 (0.05) from supplied Gerber images 0.010” (0.25 mm) or greater

35 8. Consider adding a thieving allowance.

Example: Supplier may utilize thieving to compensate for low copper density on this design. Thieving pattern clearance shall be as follows—thieving to adjacent copper (includes adjacent layers) at 0.100” (2.54 mm) minimum and thieving to fiducials and non-plated holes at 0.100” (2.54 mm) minimum.

A tolerance requirement controls the finished width of the copper features and allows the supplier leeway when compensating lines for impedance control. Be sure to consider the least material condition (LMC) of this toler- ance when calculating the current carrying capacity for conductors. Suppliers add thieving patterns to the unused areas of the layers to help them achieve etching and plating accuracy and consistency.

9. Specify a plating thickness.

Example: Copper plate indicated holes and conductors at 0.0010” (0.025 mm) average and 0.0008” (0.020 mm) minimum.

This specification allows an adequate amount of copper plating in average- sized holes on boards with an aspect ratio of 10:1 and below.

10. Specify front-to-back layer registration.

Example: Shall be within 0.005” (0.13 mm) to comply with IPC-A-600, Class 2.

Specifying layer registration controls the amount of misalignment allowed between layers. Copper patterns on PCB layers are prone to shrinking and stretching during the lamination process. The supplier ensures feature align- ment within an acceptable range to avoid drill breakout. A registration note provides a dimensional reference for all imaging regardless if drilling is required or not.

11. Specify hole locational tolerance.

Example: Drilled holes without lateral dimensions shall be located within 0.008” (0.20 mm) diametric true position from the nominal location specified in drill data files.

Tolerance specification for smaller holes (non-mounting or non-tooling) is specified here. The tolerance 0.008” (0.20 mm)—circular—allows the hole radius to wander 0.004” (0.10 mm) in any direction from its nominal center- point in relation to the drill pattern’s 0, 0 origin. Hole diameters greater than 0.200” (5.08 mm) are typically routed—not drilled—and dimensioned with the same tolerances as the board outline because a large hole is a board outline.

36 12. Clarify holes as finished and guide the supplier to a drill chart.

The drill chart contains only drilled holes ≤0.200” in diameter. It is a mistake to list larger holes in this chart because it confuses the machining operations of drilling versus routing. Holes larger than 0.200” can be created in the layout as cutouts to assist the CAM department. For type IV boards, it is important to incorporate a separate chart identifying holes making layer-to-layer connec- tions internally (blind and buried via technology).

13. Specify solder mask (resist) including color as required.

Example: Apply green LPI solder mask, matte finish, conforming to IPC-SM- 840, Class T, over bare copper.

IPC-SM-840 is the performance specification for solder mask applied over bare copper (SMOBC stands for solder mask over bare copper). Openings are formed by artwork to allow the bare copper surface to be coated with metallic or organic finishes. Green is the most common solder mask color, but it can be ordered in a wide variety of colors and finishes. Class specification is described as “T” (telecommunication) or “H” (high reliability). Class designation is commonly referred to as Class 2 (equivalent to T) or 3 (equivalent to H).

14. Specify a metallic surface finish.

Example: Apply electroless nickel immersion gold (ENIG) over exposed copper per IPC-4552.

15. Specify legend application and color.

Example: Apply legend onto primary/secondary surfaces as required per supplied Gerber artwork file. Color: white.

Silkscreen, as it is commonly called, is added to the outer layers of the PCB to identify components and mark other important information on the PCB. True silkscreen application methods are rarely used anymore. The process has been replaced by quicker and more accurate printing methods such as inkjet technology and the liquid photoimaging process.

16. Specify board outline tolerance and suggest using a profile tolerance.

Example: Board edge profile shall conform to supplied Gerber data within 0.005” (0.13 mm).

PCB edge routing is performed by a high-speed vertically mounted cutter on a milling table. It results in an accurately machined edge. A benefit of routing is that the PCB edge can be made into almost any shape and is sealed during the

37 process due to the friction of the cutter melting the material on the PCB edge.

V-scoring is performed by a circular saw blade. It is limited to straight cuts that form a “V” on each side of the production array and are snapped apart (or excised with a special cutter) at the appropriate time after assembly. The V-score operation tends to yield a rough edge and is less accurate. A V-scored edge leaves fiberglass tentacles that can wick moisture. V-scoring is preferred for volume production.

It is important to be aware of these two process finish differences when assigning tolerance values to the board edge features. A profile tolerance of 0.005” is generally considered achievable by most suppliers using either process.

When routing a PCB outline, check with the board supplier. A common cutter size is 0.090–0.128” (2.29–3.25 mm) diameter, but may not be optimal for the design at hand. Keep in mind that a large radius is easy to cut, but a small radius ≤0.045” (1.14 mm) will influence the supplier’s tool size options. If neces- sary, internal square corners can be cut using special tooling.

17. Specify environmental requirements.

Environmental specifications are best documented in subset documentation referenced in the BOM. Thus, it can be controlled and revised without affecting the mechanical inspection context of the PCB fabrication drawing. You should communicate with PCB fabricators and assemblers during both the planning and design execution stages.

38 Overview To recap, a complete design package sent to fabricators should always include the following deliverables:

1. Complete data set with layers clearly named

• ODB++ (preferred)

• Netlist file, IPC-356D (A), or CAD format

• Complete subpanel (if required) including route, fiducials, holes, and other features unique to the subpanel listed on the drawing

• Board CAD route layer, which should always match the drawing

2. Complete and legible drawings in which the intent is clear

• Gerber/PDF digital drawings (preferred)

• Stackup specifications

• Controlled impedance table with reference layers

• Technology requirements for the board to include surface finish, copper thickness (start or finished), solder mask, and any other design requirements and tolerances

• Annotate any items that are subjective or may create confu- sion

3. README file with peculiar or specific features of the fabrication or assembly drawing notes:

• Call out any items that are unique or critical to the design

• Explain or give direction on any items that may conflict with the data set, drawing, etc.

• Special instructions: If in doubt as to whether a special requirement should be documented, list it as a README file

• Provide contact information for the designer and others as applicable

39

Chapter 7

Post-layout Processes

The fewer moving parts, the better…No truer words were ever spoken in the context of engineering. —Christian Cantrell

A post-layout sign-off phase should include electrical rule checking, mechan- ical checking, test requirements, and DFM validation. In the conventional design flow, validation of the electrical performance of a design is often done by manually reviewing multiple PCB layers for ground return paths, potential noise sources, and other layout related problems. Some companies use auto- mation on a full-board verification against the set of predefined rules set up in the pre-planning phase of the project. Finally, DFM verification should be performed to ensure cost-effective manufacturability of the final product. This should be a comprehensive analysis covering the fabrication, assembly, test, and reliability of standard PCB, rigid-flex, and multiboard designs. It’s impor- tant to have experienced DFM engineers who can interpret the DFM feedback and identify the critical items that should be addressed.

The drive to fit all of the components appropriately on the board notonly challenges the designers but can also complicate the PCB assembly processes. Pushing the envelope for component spacing can result in an unbuildable printed circuit board assembly. Therefore, not only is it important to perform an automated DFM verification of the design, but you should also provide the assembly process with placement data so that they can verify that the design fits within their capabilities. Finalize the Design Even after designing the complex PCB with the end in sight, in the context of design, most think “the end” arrives the moment the designer clicks the send button to transfer the data to the supplier for fabrication. Should this be the case? Hopefully, the designer and the entire team have done a good job. After the dust has settled, the testing has been performed on the prototypes, and the satisfaction of observing that the “smoke hasn’t escaped” from the unit, it

41 is a good time for a postmortem review. Did this project end well? What could be done to improve the process?

A good designer builds an open relationship with the suppliers and the rest of the team stakeholders. The lines of constant review and commu- nication established by the designer are always open. Even after the send button is clicked, establishing a good design process allows for the fact that there is still lots of valu- able data to be collected, which can help evolve the design process for the next design iteration. The Need for Tools in the Future

One thing is clear—designing PCBs today is much more complicated and challenging than ever. Designing today’s leading-edge PCB requires that the designer:

• Has a general knowledge of electronics and component functionality

• Has a general knowledge of SI and PI

• Has a strong knowledge of the capabilities of the CAD software

• Understands PCB fabrication processes

• Understands PCB assembly processes

• Understands the relevant industry specifications

• Constantly continues with professional develop- ment such as attending industry seminars, training sessions and certifications like IPC CID and CID+

42 In addition to all of these challenges, designers have to be efficient three- dimensional puzzle solvers. Time to market is still a vitally important objec- tive and time is money. Fortunately, PCB CAD software developers continue to make great strides at improving the capabilities of their PCB layout tools (Figure 7.2). This has made it much easier to route differential pairs, create shapes, or replicate circuits. While these software developers strive to make their user interfaces logical and easy to use, there are many capabilities they develop that aren’t as obvious.

Successful designers also continue to educate themselves about their CAD tools to leverage improvement. Designers benefit immensely by sharing the time-saving technique improvements they discover on sponsored forums with fellow designers to help drive efficiency within the design industry. A thankful nod to the electronics design tool industry is due for making these forums available.

Figure 7.2: The future of EDA is DFX tools for improved planning and analysis.

43 44 About Freedom CAD Services

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