The Application of Laser Annealing to Dopant Profiling for Semiconductor Devices A
THE APPLICATION OF LASER ANNEALING TO DOPANT PROFILING FOR SEMICONDUCTOR DEVICES A. Adams, S. Morgan
To cite this version:
A. Adams, S. Morgan. THE APPLICATION OF LASER ANNEALING TO DOPANT PROFILING FOR SEMICONDUCTOR DEVICES. Journal de Physique Colloques, 1983, 44 (C5), pp.C5-433-C5- 437. 10.1051/jphyscol:1983563. jpa-00223148
HAL Id: jpa-00223148 https://hal.archives-ouvertes.fr/jpa-00223148 Submitted on 1 Jan 1983
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THE APPLICATION OF LASER ANNEALING TO DOPANT PROFILING FOR SEMICONDUCTOR DEVICES
A.E. Adams and S.L. Morgan
GEC Research Laboratories, Hirst Research Centre, WembZey HA9 7PP, U.K.
Abstract For many device structures there is a requirement for an annealing technique which has the facility to tailor junction dopant profiles; bipolar transistors and IMPATT diodes are example, where the need is for uniformly doped planar junctions. Convent ionally, techniques such as vapour phase epitaxi a1 growth of doped si1 icon layers, or the concent ration dependent diffusion coefficients of certain dopants have been used to approximate to this type of profile. However, as ever finer device geometries are sought, the junction gradients produced using these techniques become significant , and the concornit ant degradation in operating performance unacceptable. As an alternative lasers, either pulsed or scanned cw, in conjunction with ion-implantation may be used. Rectangular doping profiles are readily attainable by pulsed laser annealing. This has immediate application to high frequency microwave devices and it has been shown that this may be readily used. The application to high efficiency bipolar transistors however depends on the ability to incorporate the technique into a bipolar fabrication process .
The dopant profi 1 es which are attai nabl e by the usual met hods of semi conductors fabrication are not the optimum but rather a best compromise between the ion-imp1 anted Gaussian and the redistribution that occurs via sol id state diffusion, during the subsequent furnace anneals. The attainabl e range of device dimensions has been extended by exploiting anomal ous diffusion effects such as the concent rat ion dependent diffusion coefficient of arsenic in silicon. The higher diffusion coefficient at increased concent rations permits the formation of semi -rectangul ar profiles of the type required for emitters in high performance bipolar transistors. Other methods exist for the production of rectangular profiles including the chemical deposition from the vapour phase of silicon and a dopant. This technique still requires the subst rate to be heated to temperatures of 800 to 1000°C for several minutes if good crystal growth is to be achieved. This allows dopants to diffuse and causes junctions to become graded over significant distances. Figure 1 is an example where n and p type layers have been grown onto an n+ substrate to form the two drift regions of a double drift IMPATT diode. The temperature time cycle has allowed arsenic to diffuse up from the substrate with the result that the n/n+ interface has become graded over a distance of 0.25 pm. The spreading of junctions in this manner can have deleterious effects on device performance with loss of efficiency, lower output power, and reduced operating frequency. Further, these problems become more acute as finer dimensions are required.
Over the past few years there has been considerable interest in alternative techniques 11-41 for activating dopants and recrystallisation of silicon layers. The effects of lasers, either pulsed or scanned cw, have been widely studied [5-71. To achieve dopant activation with a cw laser, an argon-ion laser beam is usually focussed to a spot size of 20 pm and scanned across the surface with a velocity of a few centimetres per second . During the dwell time of the beam, typically 0.4 ms, the surface of the wafer is heated to a temperature which may be in excess of 1000°C, well below the melting point. These short temperature time cycles restrict dopant diffusion to a few 1att ice parameters, and consequently the annealed dopant profile maintains the original as-implanted semi -Gaussian shape.
Article published online by EDP Sciences and available at http://dx.doi.org/10.1051/jphyscol:1983563 JOURNAL DE PHYSIQUE
n+ IjUBSTRAlE
Figure 1 : High frequency microwave diode fabricated by conventional VPE prior to p+ format ion
GRADED
p EPI LAYER LAYER
DEPTH pm
Of wider interest are techniques which can be used to produce rectangular profiles. It is well known that the diffusivity of dopants in molten silicon is -108 times higher than in the solid phase. Clearly if a melt zone is created on the surface of a silicon wafer to the required junction depth for a time sufficient to allow the dopant to diffuse over this distance, the liquid-solid interface will act as a diffusion barrier and a rectangular profile will be formed.
One method by which this may be attempted is to increase the power density at which cw annealing is performed. However, because of the localised nature of the focussed laser beam and the extreme nature of the surrounding thermal gradients, cooling is necessarily non-uniform and the process is difficult to control. The result is non planar junctions which would have poor electrical performance. Pulsed laser annealing is a superior technique for this purpose.
The laser employed for the pulsed annealing studies is a 1.5 J Q-switched ruby with a pulse width of 35 ns. A beam homogeniser [8] is used to ensure that an annealing uniformity of better than 10% is maintained. A study of a typical bipolar emitter implant, 40 keV, 1016 ~s/cm~,shows that the silicon surface be ins to melt at "0.2 J/C~and that this penetrates the amorphous region at -0.3 J/cmj allowing epitaxial regrowth to occur. If single shot annealing is used the melt time, 100-200 ns, is insufficient to allow the dopant to diffuse to the maximum extent of the liquid solid interface and so the junction evolves by 0.182 pm/J cm-2. However, if multiple shot annealing [9] is employed the integrated melt time allows the dopant to become uniformly distributed and the junction increases by 0.285 pm J/cN2. For energy densities greater than 0.5 J/cm2, the single shot junction has the form of a complementary error function but for ten or more shots, the junction is doped uniformly with depth. The maximum junction gradient so far observed is 2.5 x 1018 Atoms/cm2.
The rectangular profiles which are attainable have been studied in relation to two types of device, the bipolar transistor, and the IMPATT diode. NPN bipolar transistor structures have been fabricated by performing a two stage ion-implant and pulse anneal. The starting substrate was 4-5 Q cm n-type
A major difficulty which exists when attempting to apply pulsed laser annealing to complex integrated circuit structures is cracking of the field oxides [lo] when the Zl- a. 40 KeV loi6 As/cm2 10 shots at 1.54 ~/crn' b. 25 KeV 10'~B/cm2 10 shots at 2 J/cm2 c. Substrate
0
1 Figure 2 : Pulse laser annealed Z npn transistor structure 0 5 18- CL -. \ k \ W \ g 17- \ 0 \ 0 \ W \ 16- I 4 I 0 I I 15 - I a
"b o:r 0:4 b.6 018 1.b DEPTH, pm underlying silicon melts. Although ways of overcoming this problem have been considered [lo, 111 it has prevented any electrical assessment of these structures . One family of devices where this difficulty does not exist is IMPATT diodes. Ion-implantation and pulsed laser annealing has been used as an alternative to boron drifting to form the p+ region of 34 GHz single drift IMPATT diodes, Figure 3. The prepared single drift structures were ion im lanted with 40 keV, 1016 BF~/C~~and pulse laser annealed with ten shots at 1.6 J/cm B ,and the diodes were then completed as part of a typical batch. The diodes were operated to give a pulsed output and their efficiencies measured, Figure 4. The efficiencies compared we1 1 to diodes fabricated conventionally and good output powers were attai ned.
Forming the p+ region by this technique has three advantages. The first is that higher surface concentrations are attainable which decreases the avalanche breakdown JOURNAL DE PHYSIQUE
I 1- 40 KEV lot6 BF21cm2 I AS IMPLANTED
LASER PROCESSED p+ LAYER 10 PULSES 1.62 J / crn2 I I 19 - 1 I I I SUBSTRATE I 18 - I I I I I 17 - 1 I Figure 3 : Pulse laser annealed \ n EPI- LAYER I IMPATT diode (34 GHz) I I l6- ! I I I I I I1111111 It 0-5 1.0 1.5 2.0 2-5
DEPTH pm
voltage. 111esecond, the junction gradient can be made more abrupt and hence reduce junction series impedance, and finally, by varying the energy density of the annealing pulses the depth of the p+ region and hence the' drift region, can be adjusted for maximum efficiency. This leads to the possibility of higher operating efficiencies and greater output powers when these techniques are applied to devices for operation at higher frequencies, i.e. 94 GHz and above.
In conclusion, lasers either scanned argon cw or Q-switched ruby may be used to anneal ion-implants. With the former, it is necessary to keep the surface of the silicon wafer in the solid phase, this results in the final annealed profile maintaining the as Implanted profile. This technique is therefore limited 40 the annealing of shallow implants of the type required for fine dimension MOS where it is likely to be a strong candidate for eliminating sideways dopant diffusion into the gate region. Alternatively, rectangular doping profiles are readily attainable by pulsed laser anneal ing. This has immediate application to high frequency microwave devices and it has been shown that this may be readily achieved. The application to high efficiency bipolar transistor however depends on the ability to incorporate the technique into a bipolar fabricat ion process. @ LASER PROCESSED X VPE PROCESSED
Figure 4 : IMPATT diode efficiency area characteristic
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