ICCAD 2014 TCAD to EDA Workshop November 2, 2014

Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, t he Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Digital and AMS ICs (Si) • RF/mmWave (III/V) • Physically based models • Numerical models (table; ANN) • Flexible for diverse needs • Parameter extraction is easy − scalable over geometry − scalable over temperature § including self-heating − can model global variability § including physical correlations − can model mismatch − retargetable if process shifts

Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a TM 3 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Node N+1 transistors must “look” like node N transistors, else − decades of accumulated designer knowledge vaporizes − circuit blocks/techniques cannot be migrated • MOS transistors today are often more “ideal” than in the past − supply voltages of ~1 V mean transistors must turn off “properly” − yesterday’s models OK for tomorrow’s transistors • Core MOS transistor behavior independent of technology node

− exception: halo implant effect on long-channel ro • Non-core phenomena have become much more important − substrate current (HCI) and NBTI − gate current − layout dependent effects (LDEs)

Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a TM 4 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a TM 5 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. oxide permittivity εox

silicon permittivity εs

Y. Tsividis and C. McAndrew, Operation and Modeling of the MOS Transistor , 3rd ed., 2011

• Vertical 1-dimensional field from VG controls conduction charge

• Lateral 1-dimensional field from VDS controls current flow

gate + + + + + + + + + + + +

------+ source x=0 x=L drain -

y bulk + -

1-d electrostatics

• How does Gch vary with Vx?

• How must Gch behave locally around Vx =0?

IDS = 2Gch (VG,VB,Vx )Vx

−Vx VB +Vx

QIʹ = −Coxʹ (VGS −VTH (VSB))

• Inversion charge based

−QIʹ + ln(−QIʹ )∝VP −Vch

• Surface potential based

QIʹ = −Coxʹ (VGB −VFB −ψ s ) −ψ s φt − sign(ψ s ) 2qε s N A φte +ψ s −φt

Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a TM 11 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Formulate IVE (“input voltage equation(s)”) to relate surface potential(s) to applied terminal biases − different forms for bulk, SOI/multi-gate transistors • Integrate to get closed form expressions for drain-source current and terminal charges − in terms of surface potentials at source and drain • Solve for the source and drain surface potentials for given values of the terminal biases − compute currents and charges based on those values

d 2ψ q dψ p e−ψ φt N n e(ψ −VCB) φt , lim , lim 0 2 = − [ o − A − o ] ψ = dy ε s y→∞ y→∞ dy

−ψ s φt −(2φF +VCB) φt ψ s φt VGB −VFB −ψ s = γ φte +ψ s −φt + e (φte −ψ s −φt )

− must be accurate for high forward bias VSB • For fully depleted SOI devices good approximations for back- gate surface potential have been developed

G. Dessai and G. Gildenblat, Sold-State Electronics, 2010

Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a TM 14 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Sahoo et al. (IEEE TED, 2010) showed how to transform the two coupled IVEs into a single implicit equation to be solved • Solution form switches depending on bias ⎡ t ⎛ 2θ y ⎞⎤ ⎡ t ⎛ 2θ y ⎞⎤ (y) V 2 ln si sin⎜ ⎟ , V 2 ln si sinh⎜ ⎟ ψ = CB − φt ⎢ ⎜α + ⎟⎥ CB − φt ⎢ ⎜α +σ ⎟⎥ ⎣⎢4Ldθ ⎝ tsi ⎠⎦⎥ ⎣⎢4Ldθ ⎝ tsi ⎠⎦⎥ • Analytical solution to which branch to solve

− (i) V1>V2 hyperbolic

− (ii) V1≥V2 trignometric

− (iii) V1

G. Dessai et al., J. Comput. Electron., 2010

⎡id ⎤ ⎡ydd ydg ydb ⎤ ⎡vds ⎤ ⎢ ⎥ ⎢i ⎥ y y y ⎢v ⎥, y g j (2 1)C ⎢ g ⎥ = ⎢ gd gg gb⎥ ⎢ gs ⎥ mf = mf + ω δmf − mf ⎢i ⎥ ⎢ y y y ⎥ ⎢v ⎥ ⎣ b ⎦ ⎣ bs bg bb ⎦ ⎣ bs ⎦ ⎧1, m = f ∂Qm Kronecker delta function : δmf = ⎨ Cmf = (2δmf −1) ⎩0, m ≠ f ∂V f

• “Self-controlled” branch ∂Qm/∂Vm represented as capacitance

− like “resistance” go cf. transconductance gm − even these misrepresented in hybrid-π model

Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a TM 17 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • 3 gate connections possible • 2 independent bulk connections possible • 1 independent drain connections possible • Must be (at a minimum) 3 “trans- capacitances” included to model terminal currents • Somewhat confusing if you think in terms of equivalent circuit network • More readily understandable in terms of y-parameters − but “simple-minded” y-parameter model is “designer vicious” (6 trans-capacitances)

− Cm=Cdg-Cgd cancel when gate wiggles, leaving Cdg − Cmb=Cdb-Cbd

− Cmx=Cbg-Cgb • Looks complex, just maps y- parameters into equivalent network

• Trans-capacitances zero at VDS = 0

• Cmf ≠ Cfm for VDS ≠ 0

• Cm is 40% of Cgs in saturation − non-trivial!

Y. Tsividis , Operation and Modeling of the MOS Transistor , 1st ed., 1987

Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a TM 19 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a TM 20 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • They are equal at VDS = 0, but consider saturation • Drain is “disconnected” from channel

− increasing VDS does not change “internal” transistor state (incl. QG) ∂QG Cgd = − → 0 ∂VD

• Increasing VGS makes QI more negative − portion assigned to drain more negative

∂QD Cdg = − > 0 ∂VG − value in saturation is

4LWCoxʹ 15

− increasing VDS decreases magnitude of inversion charge |QI|

− but QI is negative, so numerical value actually increases

− irrespective of partitioning to source and drain QS also increases ∂QS Csd = − < 0 ∂VD − value at V is DS = 0 −αLWCoxʹ 15, α =1+ dVT dVSB

1982 IEDM

CICC 1993

Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a TM 23 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a TM 24 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Observation: no recombination, so don’t need to sweat the details of what happens all along the channel − whatever gets injected at the source has to come out the drain

− just compute ID from one point: the source • MIT “Virtual Source” (VS) model

• Besides DSM Si CMOS, also being used to model graphene, GaN, and CNT transistors

Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a TM 26 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a TM 27 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc.