™ Hi-Speed USBUSB TME) ® CERTIFIED ® Enhanced Features LAN PHY Security and Manageability ® PCIe 4.0 (1x4) DDR4/LPDDR4x (2ch) USB 3.2 Gen2 USB 3.2 Gen1 USB 2.0 6Gb/s SATA Intel Total Memory Total Encryption (Intel AES-NI ® ® from physical attacks private from keys malware performencrypt/decrypt operations * Hardware based encryption to protect entire memory contents ● Intel ● Intel * A new, hardware* A new, based AES-NI instruction set to protect are* Keys no longer exposed and handlers are utilized to ● Control-Flow Enforcement Technology ● Up to 4 cores ● In-Band ECC available ● PCIe 4.0 (off CPU 12 HSIOcomplex), lanes(off PCH complex) ● Improved ™ data performance ● Integrated C subsystem Type with for USB4 compliance TIGER PCH-LP LAKE-UP3 About IEI-2021-V10 eDP 2 DDI PCIe 3.0 Wireless-AC ® Thunderbolt™ 3 2.5GbE TSN MAC 2.5GbE Intel AI Experience Tiger Lake-UP3 Solution Lake-UP3 Tiger Tiger Lake-UP3 Tiger Diagram Platform Block Tiger Lake-UP3 Tiger Platform Overview ® ® ® Graphics Media, and Display Graphics Media,

Deep Learning Boost ®

Intel Intel inferencing workloadperformance inferencing Lake architecture (via OpenVINO™) ● AI/DL Instruction Sets including VNNI and applications CV/AI ● Vector Neural Network Instruction (VNNI) improves ● Common industry wide AI frameworks optimized on Tiger ● Intel

● New Xe (Gen12) Gfx Engine● New (Gen12) Xe with up to 96 Eus ● 4 independent display units x 4K or (4 2 x 8K) ● Image processing unit IPU6 * Up to 27MP image capture * Up to 4K@60fps video performance * Support for 4 concurrent streams * VTIO and RGB-IR for facial recognitionn Intel

www.ieiworld.com www.ieiworld.com 100 80 60 4.0 4 ® 2020 10nm 12/15/28W 40 DDR4 3200 In-Band ECC LPDDR4x 4267 Tiger lake-UP3 Tiger SATA 6Gb/s,SATA SD 3.0 20 Up to4 PCIe 4.0 lanes (CPU) Up PCIe to12 3.0 lanes (PCH) Redhat PCI Express Optane™ Memory, PCIe 3.0, PCIe 4.0, Microsoft 0 Canonical Wind River Wind ® http://01.org Faster and time-saving! http://kernel.org Real TIme Systems Intel http://projectacrn.org Open Source Community: http://1.org/projectceladon PCle 3.0 and 4.0 Data Transfer Time Transfer PCle 3.0 and 4.0 Data PCIe 3.0 PCIe 4.0 Intel Open Source Community: software and mechanical interfaces is preserved. Distributor and ScalabilityPartnership and Distributor Interconnect performance bandwidth double of the PCIe 3.0 specification achieving16GT/s and compatibility with

4 2019 14nm DDR4-2400 12.5/15/25W DDR3L-1600 Whiskey lake-U LPDDR3-1866/2133 6Gb/s, SD 3.0, eMMC5.1 I225V ® Optane™ Memory, PCIe 3.0, SATA Up to PCIe16 3.0 lanes (PCH) ® Intel 2.5 GbE 2.5GbE LAN between systems.

I225LM / Intel TSN ® About IEI-2021-V10 Controller IC: Intel Tiger Lake-UP3 Tiger Products

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Redhat Linux Ubuntu Linux Ubuntu Virtualization: time synchronization with IT network and timeliness Android Celadon Android Supporting TSN (Time Sensitive Networking), providing 2 Wind River VxWorks RTOS 15W 2017 14nm KVM (Type 2 Hypervisor), ACRN Operating System and Hypervisor DDR4-2133 DDR3L-1600 Real-Time System (Type 1 Hypervisor) LPDDR3-1866 -U Linux Kernel LTS with Prempt RT Patch Windows IOT 10 Enterprise (64-bit) RS5 LTSC 40 Gpbs 6Gb/s, SD 3.0, eMMC 5.0 Optane™ Memory, PCIe 3.0, SATA Up PCIe to12 3.0 lanes (PCH) ® Processor Generational Comparison Generational Processor Intel TM TM 10 Gpbs Tiger Lake-UP3 Tiger Support Platform OS Core 5 Gpbs Thunderbolt ® ® Brand Brand PCIe lane consumption from SoC or PCH. Features of IEI Intel of Features Intel Intel Supporting Thungerbolt with USB-C integrated ports, allowing a reduction of routing complexity and removing USB 3.2 Gen 1 USB 3.2 Gen 2 Launch Open Source Open Commercial Licensing Model Licensing PCI Express Lanes Express PCI Storage Process Processor TDP Processor Memory Core Thunderbolt™ 3