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Oversampling Digital-To-Analog Converters

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Oversampling Digital-To-Analog Converters AN ABSTRACT OF THE THESIS OF Shaofeng Shu for the degree of Doctor of Philosophy in Electrical and Computer Engineering presented on June 7. 1995. Title: Oversampling Digital-to-Analog Converters. Abstract approved: Redacted for Privacy Gabor C. Temes Oversampling and noise-shaping methods for digital-to-analog (D/A) conversion have been widely accepted as methods of choice in high performance data conversion applications. In this thesis, the fundamentals of D/A conversion and oversampling D/A conversion were discussed, along with the detailed analysis and comparison of the reported state-of-the-art oversampling D/A converters. Conventional oversampling D/A converters use 1-bit internal D/A conversion. Complex analog filters and/or large oversampling ratios are usually needed in these 1-bit oversampling D/A converters. Using multi-bit internal D/A conversion, the analog filter can be much simpler and the oversampling ratio can be greatly reduced. However, the linearity of the multi-bit D/A converter has to be at least the same as that required by the overall system. The dual-quantization technique developed in the course of this research provides a good alternative for implementing multi-bit oversampling D/A converters. The system uses two internal D/A converters; one is single-bit and the other is multi-bit. The single-bit D/A converter is used in a path called the signal path while the multi-bit D/A converter is used in a path called the correction path. Since the multi-bit D/A converter is not directly placed in the signal path, its nonlinearity error can be noise shaped by an analog differentiator so that the in-band noise contribution from the nonlinearity error is very small at the system output, greatly reducing the linearity requirement on the multi-bit internal D/A converter. An experimental implementation of an oversampling D/A converter using the dual-quantization technique was carried out to verify the concept. Despite about 10 dB higher noise than expected and the high second-order harmonic distortion due to practical problems in the implementation, the implemented system showed that the corrected output had more than 20 dB improvement over the uncorrected output in both signal-to-noise ratio and dynamic range, demonstrating the validity of the concept. Copyright by Shaofeng Shu June 7, 1995 All Rights Reserved Oversampling Digital-to-Analog Converters by Shaofeng Shu A THESIS submitted to Oregon State University in partial fulfillment of the requirements for the degree of Doctor of Philosophy Completed June 7, 1995 Commencement June 1996 Doctor of Philosophy thesis of Shaofeng Shu presented on June 7, 1995 APPROVED: Redacted for Privacy Major Pro, ess r, representing Electrical and Computer Engineering Redacted for Privacy Head of Dep omputer Engineering Redacted for Privacy Dean of Graduate School I understand that my thesis will become part of the permanent collection of Oregon State University Libraries. My signature below authorizes release of my thesis to any reader upon request. Redacted for Privacy Shaofeng Shu, Author ACKNOWLEDGMENTS Many people have helped me in the past five year during my tenure at Oregon State University. I wish to acknowledge those who helped me and contributed to the completion of this thesis. First, I would like to express my sincere thanks to my thesis advisor Prof. Gabor Temes. His technical expertise and insight have made the completion of this project and thesis possible. I am truly grateful for his kindness and encouragement, which enabled me to confront the many challenges of the past five years. I thank all the committee members for serving in my graduate program and being very supportive of the project. Prof. Richard Schreier spent many hours with me in front of computer terminals and went through many tedious hand calculations. Prof. John Kenney explained to me the dynamic element matching technique. Prof. Shih-lien Lu advised me in digital circuitry testing. Prof. John Gardner served as graduate representative. Many graduate students around OSU helped me and made important contributions to the project. Yumin Yao worked on the second-order analog differentiator. Chouyin Chen worked on the analog lowpass filter design. Valuable assistance from Ayse Yesilyurt is also gratefully acknowledged. Special thanks go to Rajeev Badyal from Hewlett-Packard Co. who worked hard to get a summer internship for me at the company to implement the system. Two of my colleagues at Analog Devices Inc. deserve special recognition. In addition to sharing their knowledge in practical design and implementation of the system, Paul Ferguson went through the whole test and measurement process with me and Tom Kwan assisted me in automatic layout of the digital chip. I also wish to express my appreciation to many friends at and around Oregon State University who have made my stay in Corvallis a memorable and enjoyable experience. TABLE OF CONTENTS Page 1. INTRODUCTION 1 2. ANALOG-TO-DIGITAL AND DIGITAL-TO-ANALOG CONVERSION 5 2.1 Analog-to-Digital Conversion 5 2.1.1 Periodic Sampling 6 2.1.2 Uniform Quantization 8 2.2 Digital-to-Analog Conversion 11 2.2.1 D/A Conversion 12 2.2.2 Holding 13 2.2.3 Smoothing Filtering 16 2.3 Basic D/A Conversion Circuits 16 2.4 Nyquist-Rate D/A Converters 19 3. OVERSAMPLING DIGITAL-TO-ANALOG CONVERSION 21 3.1 Interpolation 22 3.2 Noise Shaping 26 3.3 Internal D/A Conversion and Analog Lowpass Filtering 33 3.4 Noise-Shaping Topologies 35 3.4.1 Basic Noise-Shaping Structures 35 3.4.2 High-Order Noise-Shaping Structures 38 3.4.3 Noise-Shaping Loops Using Multi-Bit Quantizers 43 4. STATE-OF-THE-ART OVERSAMPLING D/A CONVERTERS 45 4.1 Introduction 45 4.2 Oversampling D/A Converters Using 1-Bit Internal D/A Conversion 48 4.3 Oversampling D/A Converters Using Multi-Bit Internal D/A Conversion 55 TABLE OF CONTENTS (Continued) 5. DUAL-QUANTIZATION OVERSAMPLING D/A CONVERTER 63 5.1 Introduction 63 5.2 General Architecture 65 5.3 A 3rd-Order Implementation 68 5.4 A 3rd-Order System Using A First-Order Analog Differentiator 72 5.5 3rd-Order System Using Second-Order Analog Differentiator 80 5.5.1 Differentiator Error Analysis 83 5.5.2 Two Stage Cascaded Second-Order Differentiator 87 5.5.3 Passive Second-Order Differentiator 90 5.5.4 Second-Order Differentiator Using Dynamic Element Matching 92 6. AN EXPERIMENTAL IMPLEMENTATION 97 6.1 System Design 97 6.2 Digital Noise-Shaping Loop Design 102 6.3 Analog Circuit Design 107 6.3.1 Opamps 107 6.3.2 D/A Converters 110 6.3.3 Differentiator 112 6.3.4 Discrete-Time-to-Continuous-Time Buffer 113 6.4 Noise Calculations 117 6.4.1 KT/C Noise 118 6.4.2 Opamp Thermal Noise 118 6.4.3 Signal-to-Noise Ratio Calculation 119 6.5 Measured Results 121 7. CONCLUSIONS 126 7.1 Summary 126 TABLE OF CONTENTS (Continued) 7.2 Recommendations for Future Investigation 127 BIBLIOGRAPHY 130 APPENDIX TEST AND MEASUREMENT SETUP 135 LIST OF FIGURES Figure Page 2.1 Functional block diagram for converting a continuous-time continuous- amplitude analog signal to a digital signal 6 2.2 Frequency domain view of periodic sampling (a) the original signal (b) the sampled signal 7 2.3 A 3-bit uniform quantizer (a) input output relationship (b) quantization error 9 2.4 A linear model for the quantizer 10 2.5 A Functional block diagram for converting a digital signal to a continuous- time continuous-amplitude analog signal 12 2.6 A 3-bit D/A converter (a) block diagram (b) ideal input - output relationship 14 2.7 The magnitude response of the zero-order hold function 15 2.8 A 3-bit voltage scaling resistor string D/A converter 17 2.9 A 3-bit charge scaling capacitor array D/A converter 18 2.10 A 3-bit current scaling D/A converter using MOS current sources 19 3.1 Functional block diagram of an oversampling D/A converter 22 3.2 Interpolation by zero padding with OSR = 4 (a) time-domainview (b) frequency domain view 23 3.3 Output signal from an ideal interpolation filter with OSR = 4 (a) time response (b) frequency response 25 3.4 A 5-stage interpolation filter for 64-times oversampling 26 3.5 A first-order noise-shaping loop with a 1-bit quantizer 27 3.6 1-bit quantizer (a) input output relationship (b) quantization error 28 3.7 Output signal spectra from the 1st-order noise-shaping loop 29 LIST OF FIGURES (Continued) Figure age 3.8 Amplitude responses of the 1st, 2nd and 3rd-order noise transfer function (1- f1)L 30 3.9 Signal-to-noise ratio as a function of oversampling ratio for an Lth-order noise-shaping loop with an M-bit quantizer 31 3.10 Input output relationship of an ideal and a non-ideal 1-bit D/A converter 33 3.11 Output signal spectrum from the analog lowpass filter 34 3.12 A second-order noise-shaping loop with a 1-bit quantizer 35 3.13 An error feedback noise-shaping loop with a 1-bit quantizer 36 3.14 A second-order error feedback noise-shaper with a 1-bit quantizer 37 3.15 Input output relationship of a digital amplitude limiter 37 3.16 A second-order noise-shaping loop incorporating both 16, and error feedback topologies 39 3.17 A 2-stage cascade (MASH) third-order noise-shaping system from reference [4] 40 3.18 A 2-stage cascade (MASH) third-order noise-shaping system from reference [33] 41 3.19 An interpolative 5-th order noise-shaping loop from reference [5] 42 4.1 A 16-bit oversampling D/A converter reported in reference [28] (a) system block diagram (b) 1-bit DAC and the first stage lowpass filtering 49 4.2 System block diagram of an 18-bit oversampling D/A converterreported in reference [5] 51 4.3 A sampled-data-to-continuous-time buffer used in reference
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