(12) United States Patent (10) Patent N0.: US 8,214,616 B2 Ware Et A]
US008214616B2 (12) United States Patent (10) Patent N0.: US 8,214,616 B2 Ware et a]. (45) Date of Patent: Jul. 3, 2012 (54) MEMORYTIMING OFFSET CONTROLLER CAPABILITY DEVICE HAVING 4,330,852, , 2A 5/1982 JchlllglRedwineac son 6t a1~ .......et al.~~~~~~~~~~~~~~~~~~~~ .. 365/221 4,337,523 A 6/1982 H tt t l. 365/194 (75) Inventors: Frederick A. Ware, Los Altos, CA (US); 4,445,204 A 4/19g4 Nfshéilgilcili 365/194 Ely K. Tsern, Los Altos, CA (US); 4,499,536 A 2/1985 Gemma et a1. .............. .. 364/200 Richard E. Perego, San Jose, CA (US); (Continued) Craig E. Hampel, San Jose, CA (US) FOREIGN PATENT DOCUMENTS (73) Assignee: Rambus Inc., Sunnyvale, CA (US) Ep 0379772 A2 8/1990 C t' d ( * ) Notice: Subject to any disclaimer, the term of this ( on lnue ) patent is extended or adjusted under 35 OTHER PUBLICATIONS U.S.C. 154(b) by 460 days. Complaint Under Section 337 of the Tariff Act of 1930, as Amended, (21) APPL NO. 11/754995 In the Matter of Certain Semiconductor Chips Having Synchronous Dynamic Random Access Memory Controller and Products Contain (22) Filed. May 29, 2007 ing Same, Including Graphics Cards and Motherboards, In United States International Trade Commission, Washington, DC, Investi (65) Prior' Publication' ' Data gation No. 337-TA, Nov. 6, 2008, 215 pages, Appendices and Exhib Us 2007/0255919 Al N 1 2007 its omitted except as otherwise cited herein. ov. , (Continued) Related U.S. Application Data P ' E ' * Th N (63) Continuation of application No. 10/732,533, ?led on 72mg); xamlzer guyglll 1 Sh 11 Dec.
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