Proceedings of the 14th Sound and Music Computing Conference, July 5-8, Espoo, Finland

Electric grammars. Algorithmic design and construction of experimental music circuits

Simone Pappalardo Andrea Valle Conservatorio Statale di Musica “O. Respighi” di Latina CIRMA-StudiUm - Universita` di Torino [email protected] [email protected]

ABSTRACT final physical output (i.e. electronic components) is a dif- ficult task. On the other side, nowadays available tech- The paper discusses a generative approach to the design nologies seem promising in favoring such an approach, as of experimental electronic circuits for musical application. a panoply of Electronic Design Automation (EDA) soft- The model takes into account rewriting rules inspired by L- ware solutions are available, that can be directly linked to systems constrained by domain-specific features depend- automatic circuit printing. In the following, we discuss a ing on electronic components, and generates families of generative methodology for audio , propose circuits. An integrated production pipeline is introduced, an application, and describe an integrated pipeline solution that ranges from algorithmic design to simulation up to from circuit modeling to PCB printing. hardware printing. 2. ALGORITHMIC DESIGN FOR AUDIO 1. INTRODUCTION CIRCUIT A generative approach has been intensely pursued in the Generative approaches to art and creativity are typically digital domain, i.e. where a certain generative system has intended as ways to yield complex structures by defining an established connection between software and final out- compact formal procedures. A plethora of models and put. Computer music has worked extensively on algorith- techniques has been defined in the last decades, includ- mic composition techniques that have been applied since ing, among the others, formal grammars, fractals, cellular its inception both to event organization and audio gener- automata [5]. As such approaches are formal, they have ation [1]. On the other side, physical computing [2] has been applied/mapped to various aesthetic domains, includ- successfully tried in recent years to fill the gap between ing e.g. visual art and music composition. The rationale computation and the physical world, by linking algorith- at their base is to shift the focus from the final work to the mic design to a heterogeneous set of production systems, meta-level, that of a system capable of generating various e.g. in the extensive applications of 3D printing. Concern- “legal”, “well-formed” outputs. In turn, outputs may be ing electronics, and in particular electronic circuit design, evaluated, e.g. filtered in terms of acceptance/refusal in re- it can be observed that the latter is a complex task, as it lation to some (un)desired features, and the evaluation may involves accurate selection of components in relation to a be used to tune the system by means of a feedback loop. In specific desired output. Thus, algorithmic techniques are short, algorithmic techniques like the aforementioned ones used on the design side mostly for circuit optimization. As are mostly used to explore the output space of a system. an example, evolutionary algorithms have been used to de- In the domain of sound production, analog audio synthesis sign circuits: the rationale is that in some cases a certain –far from being a dead end– has survived to digital audio performance is expected and the algorithm is iteratively and it is at the moment flourishing among musicians, in run so to design a circuit to fit the targeted performance [3]. particular in hybrid systems that retain analog audio gen- In this sense, generation is constrained by an expected re- eration while assigning control to digital modules. In the sult rather than focusing on the exploration of new behav- field of electronic circuits for music applications, modular iors (see also [4] for AI techniques based on an evolution- systems that can be assembled in various ways are a stan- ary computation for circuit design). Moreover, hardware dard solution since the inception of analog electronic mu- layout for electronic components involves many critical sic, and recently various efforts have been made to create steps, depending on both component features (packaging) miniature, highly reconfigurable modular systems (e.g. lit- 1 and routing constraints (e.g. non overlapping of routes). tleBits ). However, as the assembly is left to the user, all Thus, a completely automated pipeline as required by a these systems are not suited for generative techniques. In truly generative approach, linking algorithmic models to this sense, the generative process should move to a lower hardware level. A generative approach to audio circuit de- sign has not been investigated, as far as we know, as typi- Copyright: c 2017 Simone Pappalardo et al. This is cal audio circuits implement well-defined schemes that are an open-access article distributed under the terms of the a priori constrained in relation to specific needs, e.g. noise Creative Commons Attribution 3.0 Unported License, which permits unre- reduction optimization or adherence to a certain already es- stricted use, distribution, and reproduction in any medium, provided the original author and source are credited. 1 http://littlebits.cc

SMC2017-351 Proceedings of the 14th Sound and Music Computing Conference, July 5-8, Espoo, Finland tablished model, as in the case of guitar pedal effects. On the other side, many experimental music practices focus on the manipulation of analog audio circuits with a clear exploratory aim [6]. As an extreme example, the popular practice of circuit bending [7] even proposes a paradoxi- cal “anti-theory” as a knowledge background for a totally empirical approach to electronic hacking. Differently from the previous empirical approaches but sharing the same ex- ploratory perspective, we propose a generative approach to Figure 1. Diode clipping circuit. audio circuit design for experimental music. The main aim of our project is to produce families of circuits, sharing some basic features, that can be printed automatically, so that each board is unique while retaining a family resem- blance with the other from the same generative model. The design methodology is a three-step process:

1. Model retrieval: as a first step, an already estab- Figure 2. Diode clamping circuit. lished audio circuit is taken into account, so to start

with a well-know and working example; is to link some independent object characterized by audio 2. Functional decomposition: the circuit is theoreti- input and output (methodology, step 2). Second, it should cally decomposed into functional units that can be provide a spectral enrichment (a music desideratum) with- thought as closed elements provided with inputs and out a final amplitude overload (an audio constraint related outputs. These units can include various electronic to generative procedure, as iteration results in stacking an component configurations. Granularity at the single undefined number of components). component level (e.g. diode) is too basic to provide In relation to step 1, it can be observed that diodes ap- an operative base for generation, as too many con- plications have been widely used in audio. in particular, straints would have to be taken into account. diode clipping (Figure 1) is often used in analog and audio 3. Rule-based re-organisation: functional units are con- circuits to create distortion effects or to protect a device’s sidered as symbols to be arranged in strings follow- input from possible current overloads: as a consequence, ing a specific formalization. various schematics implementing this technique are avail- able (e.g. [8]). Diodes used in analog effects for guitar While conceptually separated, the three steps are tightly in- generally clip when the input signal voltage reaches the tegrated, as there is a constant feedback loop among search- forward threshold voltage of the component. For our cir- ing for suitable audio circuits, investigating about their fit- cuit we decided to work with Schottky diodes so to have a ting into a modular approach, and assessing the robust- very low clipping threshold (typically 0.2 V against 0.7 V ness in scaling up component assembly via generative pro- of a silicon type). cedure. In the following, we will discuss the previous In classical analog distortion guitar effects, the amplitude methodology in relation to a case study. of the input signal is limited in either directions by a fixed amount. Indeed, in these devices, the reference threshold voltage for diodes is the circuit ground, so that the input 3. MODEL RETRIEVAL AND FUNCTIONAL signal clips at the small forward voltage of the forward bi- DECOMPOSITION IN A TEST CASE ased diode. In practical applications, the threshold voltage In this section we discuss audio analog electronics, that is, of the diode, and thus therefore the signal clipping point, in reference to the previous process, both models (1) and can be set to any desired value by increasing or decreas- decomposition (2). We will discuss a specific test case to ing the reference voltage [9]. It is therefore theoretically show various emerging issues, but the former is meant as possible to modulate the clipping threshold of a wave by an example of the previously introduced, general method- setting an audio-controlled variable threshold as the for- ology. As already said, while it might be desirable to un- ward biasing of the diode. In our case, the threshold of the couple electronic circuit design from generative modeling, diode is controlled by a clamping circuit [10] (Figure 2). In there is a feedback loop between the domain to be genera- order both to isolate the effects of two circuits (clamping tively modeled (electronic circuits) and the modeling sys- and clipping) and to control impedances to implement a tem (see later). In general terms, our basic design choice simulation of an audio-modulated diode with Spice3 [11], was targeted to define an expansion procedure of a certain we improved the theoretical schematics in Figures 1 and basic circuit. Indeed, other circuit designs may be taken 2 by introducing two operational amplifiers, to be used as into account as candidates. voltage followers. The resulting circuit is shown schemat- Our aim has been to look for an already established audio ically in Figure 3. It is still a theoretical circuit but suffi- schematic (methodology, step 1) provided with two fea- cient to obtain a simulation of a “carrier” sine wave (220 tures. First, it should be expandable by iterating a limited Hz) dynamically clipped by another sinusoidal “modula- set of basic units, as the goal of the main electronic circuit tor ” (439 Hz). Figure 4 shows a new simulation of the

SMC2017-352 Proceedings of the 14th Sound and Music Computing Conference, July 5-8, Espoo, Finland V+-V

Modulator + C2 U3 D3 0.1µf V5 D4 1N5817 1N5817 SINE(0 2 1123) V+-V out U2 .TRAN 500ms Carrier V+ R1 1Meg 9 V3 V1 SINE(0 2 220)

9 V4 D2 -V V+-V 1N5817 Modulator - C1 U1 D1 0.1µf out V2 1N5817

SINE(0 2 439)

V(out) V4.2 V0.0 V4.2- 0ms 40ms 80ms 120ms Figure 3. Half wave diode-modulated clipping (dmc)

Figure 5. A modified version for full wave modulation V(out) V0.2 dmc. V2.0- V4.2- 0ms 30ms 60ms 90ms

Figure 4. Half wave dmc with C = 220 Hz and M = 1239 Hz. same schematic, this time featuring a 220 Hz carrier and Figure 6. a) dc+. 1239 Hz modulator. This schematic allows the modulation of the negative half-waves of a carrier sine by changing at means of inserting few capacitors. In our schematic model audio rate the voltage reference at the anode of a diode. we add both a voltage follower object to use for coupling In order to modulate both negative and positive parts of the various circuit each other, and an op amp input am- the carrier sine wave, Figure 5 shows the implementation plifier to filter, amplify and/or attenuate three input sig- of a duplication/reversal of the clamping schematic. Such nals: carrier, negative modulator, positive modulator. The a clamping circuit is intended to limit a third modulating schematic model can be, then, decomposed into five units wave in the positive range. This signal is used to induce a (see later): dc+, dc-, buffer, sig in, sig out. fluctuation in the voltage at cathode of a further diode that Figures 6 to 10 show all the schematics of the final single modulates the positive part of the carrier half-wave. objects. Figure 11 shows the complete root circuit ready Figure 5 shows a Spice3 simulation with positive modula- for a Spice simulation. Colored blocks represent previ- tor = 1123 Hz, negative modulator = 439 Hz, and carrier ously discussed components, that is, a → dc+; b → dc-; = 220 Hz. c → buffer; d →sig in; e → sig out (for other letters, see The outlined schematic can be expanded by a systematic Section 4, and the companion Figure 13). Figure 12 shows development, through a nesting and multiplication of mod- a physical test implementation of the “root” circuit, a min- ulating objects around the axis of the carrier signal, thus imal assemblage of the components that acts as starting fulfilling the requirement of step 2 of our methodology, state for generation. that prepares rule-base organization (step 3). In order to al- low the nesting of elements, we took advantage of typical 4. RULE-BASED RE-ORGANIZATION features of operational amplifiers. These components (op amps, as commonly referred), thanks to their impedance In general terms, many formalisms are available as gen- features and their ease of use, allow to simply cascade sev- erative models to govern an arrangement of audio compo- eral parts, adding the possibility of frequency control by nents. In our case, we have explored L-systems [12]. L-

SMC2017-353 Proceedings of the 14th Sound and Music Computing Conference, July 5-8, Espoo, Finland

Figure 7. b) dc-.

Figure 9. d) sig in.

Figure 8. c) buffer. systems have been proposed in biology as formal models to describe natural shapes that exhibit a clear generative behavior, i.e. an accumulation of features resulting from a growing pattern. They have originally proven successful in Figure 10. e) sig out. modeling plants, and then inspired algorithmic approaches to biological morphologies (shells, sponges, seaweed) [13] is the axiom, and P : [14]. As formal systems, and apart from their interpreta- tion in the biological domain, they have been widely used a → c3@(k + 1) b2@(k + 1) c(k + 1)@(k + 2) a(k + 2)@4 in generative art, including algorithmic music composi- b → c2@(k + 3) a3@(k + 3) c(k + 3)@(k + 4) b(k + 4)@4 tion. In relation to our case, the choice of L-systems has been driven by considering an electric circuit, if not a tree, is the production ruleset. at least as a sort of vegetable rhizome. Hence the idea of As a variation on standard L-systems, the proposed model recursively expanding a basic topology into a more com- includes integers associated to each symbol in the form plex network. Analogously to what happened in the model i@o, where @ is a syntactic separator. The symbol k repre- retrieval step, other formalisms may be explored. sents an integer associated to the complete rewriting n (i.e. L-systems are formal grammars in which a set of paral- application of all rules), so that k = n × 4. Empty spaces lel rewriting rules (“production rules”) is applied against and brackets have only a typographical meaning for sake an initial sequence of symbols (the “axiom”). Production of readability. In the interpretation context, only the string rules allow to generate new sequences of symbols against resulting from the last rewriting is taken into account. Each which the former can be applied again. Even if the result- symbol from V is associated to the relative electric compo- ing morphology depends on the interpretation of symbols nent (see Section 3). The symbols i and o are interpreted as in a certain domain, the formal system structurally encodes labels respectively for input and output ports. Thus, a sym- features of a recursive organization. The following model bol like b2@14 indicates that the component b has an input for audio analog electronic circuit is inspired by L-systems. port labeled 2 and an output port labeled 14. The symbol It can be defined as ∗ represents a null value: it can be seen that components d have a null input, as they are signal generators that feed the E = (V, ω, P ) circuit, while e has a null output, being itself the output of the system. In order to define the topology of the circuit, where port labels are taken into account, and input ports are con- V = {a, b, c, d, e} nected to output ones with the same label, the signal flow- ing from output to input. Graphical interpretation of the is the set of symbols, strings allows to inspect visually the resulting electronic topologies. The following graphs have been obtained by ω = d ∗ @1 d ∗ @2 d ∗ @3 c1@4 a2@4 b3@4 c4@5 e5@∗ automatically scripting the dot language for graph visual-

SMC2017-354 Proceedings of the 14th Sound and Music Computing Conference, July 5-8, Espoo, Finland

d*@3 C2 20pF b3@4 R8 d*@2 d*@1 d*@3 267k SINE(0 1 440)C6 R9 100k R1 V+ U1 V+-V U3 C1 D1 330nF 47k R2 -V V5 R10 330nF 100k 33k 1N5817

C7 V+ V2 10µF R5 R4 9 a2@4 c1@4 b3@4 V- .TRAN 500ms 51k 949meg 9 V1

C3 -V d*@1 20pF R3 c1@4 c4@5 e5@* c4@5 267k SINE(0 1 405) C4 R6 V+-V U6 R19 C13 V+-V U2 V+-V U7 C12 C14 out V4 330nF 47k R18 50k 2.2µF R7 R21 330nF 330nF 47k R20 33k 47k 50k C5 e5@* 10µF

C920pF

d*@2 R15

267k D2 SINE(0 1 440)C10 R16 100k R14 V+-V U4 V+-V U5 C8 1N5817 330nF 47k R11 V3 R17 330nF 100k 33k Figure 13. Axiom, with connection labels. C11

10µF R13 R12 V+ 51k 949meg a2@4

d*@3 d*@2 Figure 11. Root circuit (axiom).

a3@8 c3@6 c2@8 b2@6

c8@9 d*@1 c6@7

b9@4 c1@4 a7@4

c4@5

Figure 12. Root circuit, first test. e5@* ization [15]. Figure 13 shows the topology of the circuit Figure 14. First rewriting, with connection labels. of Figure 11 in relation to its modeled decomposition into the axiom ω. Each component is colored in relation to its type, and labeled according to the mapped symbol, like in softwares, while white boxes are internal blocks developed Figure 11. It can be seen that output ports are connected to to perform specific functions. Plain text labels represent input ports with the same identifier. Figure 14 shows the textual data. The generative model has been implemented first application of the ruleset (n = 1). in SuperCollider [16], an audio-targeted programming lan- The definition of the formal system has been driven by se- guage that features high-level data collection manipula- mantic constraints, i.e. by taking into account viable elec- tion. The SuperCollider component performs two task: tronic connections. While increasing n, the resulting string generation and mapping. L-Generator is the module im- shows some spurious artifacts, in terms of its electronic in- plementing the L-system generation: it takes an L-system terpretation. Figure 15 shows the topological graph with specification as a textual input, and output a string (as a n = 2 (labels have been replaced with the component result of rewriting). The string is fed into the Parser that types). It is apparent from Figure 15 that buffers at the converts it into a data structure apt to be further manipu- graph’ side are misplaced in the electronic interpretation, lated by the Pruner module. The resulting data structure as they are isolated. To solve this issue, a recursive pruning can then be mapped into other formats. The mapping task strategy is applied to the graph, so that no isolated buffers can be seen as a software gluing process. The DotGener- are present in the final graph. Figure 16 shows the graph ator creates a dot file to be subsequently rendered by the of Figure 15 after pruning. dot program as a visual file. As discussed, this is instru- mental in rapidly understanding the behavior of the gener- 5. AN INTEGRATED PIPELINE ation process. LTGenerator creates input files (in the “asc” ASCII format) for the LTSpice IV software [17]. LTSpice While algorithmic modeling of electronic circuit topolo- IV includes simulation of the circuit via Spice3 (includ- gies can have a theoretical interest, it is indeed very far ing audio generation, a crucial features in our case) and from a practical application. The aim of a generative ap- schematic drawing. In order to generate asc files, compo- proach is indeed to obtain circuits whose complexity can- nent descriptions are stored in specification templates (spec not be reached by hand design and that are (o should be) file), in which opportune textual replacements for identi- still guaranteed to work by the system definition itself. This fiers and positions are performed. Component circuits (a– requires an integrated automatic pipeline, ideally from for- e) are algorithmically placed on the board by following a mal model seamlessly to PCB printing. The implemented simple carriage return strategy over a fixed width grid and solution is shown in Figure 18. Grey boxes represent used using textual labeling of input and output as internal ref-

SMC2017-355 Proceedings of the 14th Sound and Music Computing Conference, July 5-8, Espoo, Finland

tion file to PCB printing. Figure 22 shows the root circuit sigIn sigIn PCB (i.e. the axiom) obtained by running the autorouting procedure in EasyEDA. buffer buffer buffer dc+ dc+ dc- dc- buffer buffer buffer

buffer buffer buffer sigIn buffer buffer buffer 6. OPEN ISSUES

dc- dc- buffer dc+ dc+ At the moment of writing, we have tested physical circuits on breadboard, generated layout diagrams, run extensive buffer simulations, while we have still not printed PCBs. Thus, we cannot evaluate the very final product of the pipeline. out In any case, two main issues have emerged. Simulation vs. Reality. For each object, various tests were made in order to find the best configuration in terms Figure 15. Second rewriting. of matching between Spice3 simulation results and real physical behavior (tested on breadboard implementations). This is a crucial point, as –in order to simulate with a good

sigIn sigIn approximation the circuit even after several expansions by the generative system– it is essential that the Spice simula-

dc- dc- buffer buffer buffer buffer dc+ dc+ tion is very close to the actual behavior of the circuit. Oth- erwise, unpredictable, non-functional results may emerge in the printed circuit. As a matter of facts, real circuits as- buffer buffer sigIn buffer buffer sembled on breadboard have always shown relevant differ- ences in their behavior if compared to Spice3 simulations. dc+ dc+ buffer dc- dc- Three main factors account for these differences: – the power supply quality which must be opportunely and buffer recursively filtered, unlike in the simulated schematic; – the extensive need, between input and output of several

out op amp, for decoupling capacitors, not necessary (at least in the same amount) in the simulated circuit; – the placement of the components on the board, that may create ground loops, again absent from Spice. Figure 16. Second rewriting, pruned. The physical circuit is usually more sensitive to small, some- times timy, variations in the starting conditions. Here, non- erences. Figure 23 shows the circuit of Figure 17, as con- linearity of the components seems to be more visible. For verted by LTGenerator into asc format and drawn by LT- example, in our case, small variations in the signal ampli- Spice VI, with a zoomed component for sake of readability. tudes (modulating and/or carrier) result in large differences Figures 20 and 19 show sonograms and waveforms from in the resulting output. The simulation in Spice seems to Spice 3 audio simulation of a very large circuit, obtained smooth out the nonlinearity of the components. In this by four rewritings. It can be seen that complex spectra are sense, the diode clamping (circuits a-dc+ and b-dc-) is the easily obtained, with many partials in various harmonic re- most sensitive to small variations of the input signals. We lations. Spectra are sensitive to small parameter variations, tried physically different circuits to limit and optimize the thus ensuring a varied palette that can be exported as a user results. in order to allow a more flexible modulation of the control (e.g. in the case of the three modulating frequen- threshold of the diode we chose to use a circuit that allows cies, the latter can be associated to rotary controls on the us to select by means of a potentiometer the amount of dc- final board). While Figure 19 illustrates a fixed spectrum, offset output. A different amounts of offset corresponds to Figure 20 shows an evolving one, resulting from real-time a greater or lesser depth of action of the modulating diode. parameter tweaking. While these results from extensive Pipelining. Figure 21 shows an ideal, 5-step model. First, tests –matching the typical flavor of analog audio modu- an abstract topology of the circuit, such as the ones in Fig- lation but in a very rich way– are very encouraging, the ure 14-16, is generated (1). Then, the topology is mapped main (in fact, surprising) drawback of simulation is that onto an actual electronic topology, incorporating data from it has proved to be far from accurate (see later), so a real real electronic components, but without any metrics re- test phase has to be performed on the final hardware cir- ferred to the final circuit layout, so that a simulation can be cuits. The asc format is also used as an interchange format rendered (2). The electronic circuit should be rendered as a to communicate with EasyEDA 2 , a web-based EDA tool schematic in order to provide a standard visual feedback on suite. EasyEDA has functionalities to facilitate (even if not the result (3). Finally, the circuit schematic should be con- to fully automate) routing for printed circuit board layouts verted into a description of the physical layout, including and to directly manufacture printed circuit boards. In this component packaging and routes (4), so to be delivered for way, it is possible to link the formally generated specifica- PCB printing (5). Candidates for step 1 include substan- tially all available programming languages, better if shifted 2 https://easyeda.com/ towards high-level due to data manipulation in the formal

SMC2017-356 Proceedings of the 14th Sound and Music Computing Conference, July 5-8, Espoo, Finland

sigIn sigIn

dc+ dc+ dc+ dc+ op amp op amp op amp op amp op amp op amp op amp op amp dc- dc- dc- dc-

op amp op amp op amp op amp op amp op amp op amp op amp sigIn

dc- dc- dc- dc- dc+ dc+ dc+ dc+ op amp

op amp

out

Figure 17. Third rewriting, pruned.

0.5 2·104

0.5 l-system string 2·104

Generation L-Generator Parser data structure Pruner data structure

Mapping Frequency (Hz) Frequency SuperCollider LtGenerator DotGenerator Frequency (Hz) Frequency

spec file asc file dot file

0 0 1 EasyEDA LtSpice Dot Time (s) 0 0 1 0.6022 Time (s) SW graphic file graphic file audio file graphic file 0.6022 0 HW PCB 0 -0.6162 0 1 Time (s) -0.6162 0 1 Figure 18. Implemented integrated pipeline. Time (s)

0.25 Figure 20. LTSpice audio simulation with 4 rewritings, 2·104

0.25 439, 440, 442.5 Hz. 2·104

Generative design Electronic modelling Circuit visualisation Layout organisation PCB printing 1 2 3 4 5 Frequency (Hz) Frequency

Frequency (Hz) Frequency Figure 21. Ideal pipeline. 0 0 0.5 Time (s) 0 0 0.5 0.5909 Time (s) wares (as required by 4) are intended for design, and in- 0.5909 cludes Spice3 as a simulation engine, so that typically they 0 are able to export netlist files but not to import them. This 0 depends on the fact that such a passage would require au- -0.577 0 0.5 Time (s) tomatic layout for drawing circuit schematic. In our case, -0.577 0 0.5 we solved by defining a grid algorithm. On a different but Time (s) Figure 19. LTSpice audio simulation with 4 rewritings, correlated side, EDA softwares (5) aim at computer-aided 55, 44, 3345.7 Hz. layout design, but not at a fully automatic one. Autorout- ing facilities are available, but, as final physical layout de- pends on such a large number of parameters, automation model. A standard candidate for step 2 is indeed Spice3, is only partially possibles. Of course, very large, auto- that takes as its input a so-called netlist, i.e. a textual spec- matically generated circuits still require a large amount of ification of components and connections, and is able to run hand-operated fine tuning of the layout before printing. simulation (including audio) and perform various analysis. Various software packages are available for steps 4 and 5, 7. CONCLUSIONS like e.g Autodesk Eagle. Actual available softwares for electronic layout are intended as computer-aided software While still at a prototypical stage, we believe that our ap- for interactive editing toward the final layout organization, proach has shown potential interest for experimental computer- not as automated tools. A critical issue in relation to the design of audio analog synthesis, as can be seen from re- ideal pipeline is that all the data should automatically tran- sulting signals in Figure 20 and 19. Generative models sit from one step to the other. As an example, our choice allow to describe not circuits, but families of circuits, that (EasyEDA) has been determined by file format compatibil- share some features but may differ one from each other by ity with LTSpice IV. On one side, schematic capture soft- details. Thus, with automatic PCB routing, it could be pos-

SMC2017-357 Proceedings of the 14th Sound and Music Computing Conference, July 5-8, Espoo, Finland

[3] M. M. B. Vellasco, R. S. Zebulum, and M. A. Pacheco, Evolutionary Electronics: Automatic Design of Elec- tronic Circuits and Systems by Genetic Algorithms. Boca Raton, FL, USA: CRC Press, Inc., 2001. [4] A. Thompson, P. Layzell, and R. S. Zebulum, “Ex- plorations in design space: Unconventional electronics design through artificial evolution,” IEEE TRANSAC- TIONS ON EVOLUTIONARY COMPUTATION, vol. 3, no. 3, pp. 167–196, 1999. [5] E. R. Miranda, Composing music with Computers. Burlington, MA: Focal Press, 2001. [6] N. Collins, Handmade Electronic Music. The art of Figure 22. PCB for root circuit via autorouting. hardware hacking. New York–London: Routledge, 2006.

sible to create singleton, unique synthesizers/processors. [7] R. Ghazala, Circuit-Bending. Build your own alien in- Indeed, the most delicate point is the layout for PCB print- struments. Indianapolis: Wiley, 2005. ing of large generated circuits, that is still not robust from [8] R. Salminen. (2000) Design Your an automation perspective. But, once fine-tuned in relation Own Distortion. [Online]. Available: to real physical behavior, circuits can be simulated, and http://www.generalguitargadgets.com/how-to-build-it/ only the final step (5) requires handcrafted operations. As technical-help/articles/design-distortion/ a future work, we are planning to print PCB boards and test real final complex circuits, to analyze other analog cir- [9] P. Horowitz and W. Hill, The Art of Electronics, 3rd ed. cuits in order to decompose them, so that other generative New York, NY, USA: Cambridge University Press, models may be taken into account. 1989.

100k R5 V+-V D6 C1 U0 [10] VV.AA. (2012) DIY Circuit De- 4 V+-V

15 V+-V 100k R5 D6 100k R22 D23 C1 U0 U17 R2 1N5817 4 C18 15 100k R22 V+-V D23 sign: Waveform Clamping. [Online]. Avail- 330nF U17 R2 1N5817 C18 4 330nF 4 100k 100k 15 15 R19 1N5817 330nF V+-V 100k R19 1N5817 R4 R3 C7 U9 330nF

V+-V 16

V+ 2 V+-V able: https://www.engineersgarage.com/tutorials/ U9 R8 R21 R20 100k C24 U26 R4 R3 C7 51k 949meg 330nF 14 47k V+ 3 16 R25 100k V+-V R15 U10 D16 51k 949meg 330nF V+ 2 C11 47k V+-V 16 V+-V 3 R21 R20 C24 U26 R8 U32 V+-V diy-circuit-design-waveform-clamping?page=3 C30 R12 1N5817 U29 51k 949meg 330nF 14 330nF C27 R35 3 100k V+-V 17 14 47k R31 V+ C43 U45 3 16 330nF 267k 15 R28 47k 14 330nF R14 R13 47k C37 R44 R25 V+-V 100k R1520pF V+ D16 51k 949meg330nF 330nF U10 47k C38C11R36 51k 949meg

v+-v 47k

U33 100k V+-V * R51 U46 D52 2 16 C47

V+-V 3 330nF 47k 16 [11] T. Q. A.R.Newton, D.O.Pederson, and A.Sangiovanni- R34 3 U32 R48 1N5817 V+-V C30 33k R12 1N5817 V+-V U42 330nF C40 100k U29 330nFC39 17 C27

14 V+-V 100k R61 D62 16 R35 U56 V+-V

100k V+-V 3 C57 10µF R41 U55 17 4 330nF R50 R49 C53

47k V+-V 15 100k R78 D79 U45 15 16 Vincentelli, “SPICE3 Version 3f3 User’s Manual,” De- R31 R58 1N5817 C74 C43 U73 V+ 14 330nF 267k 330nF 4 R54 R28 100k 17 51k 949meg 330nF 15 47k 47k R75 1N5817 330nF 14 330nF R14 R13100k R68 V+-V D69 100k 47k C37 R60 R59 C64 U63 R44 14

V+ 2 100k V+-V partment of Electrical Engineering and Computer Sci- 330nF R85 D86 20pF V+ R65 1N5817 R77 R76 C81 U80 51k 949meg 330nF 47k 4 100k V- 15 R82 1N5817 C38 R36 51k 949meg V+-V U72 51k 949meg 330nF v+-v C70 100k R67 R66 14 V+-V U33 V+-V 3 100k D52 U92 V- R51V+-V ences, Berkeley, CA, Usser’s manual, 1993. * C90 R71 U46 330nF R84 R83 C87C47 U89 1551k 949meg 14 2 47k V+-V 5 R91 C103 U105V+ 4 16 330nF 47k 330nF 16 R88 47k 2 51k 949meg 330nF 3 47k R34 R104 v+ 330nF V+-V V1 R48 1N5817

V+-V 47k C93 U95 330nF 33k 17 U42 R98 16 C40 100k R111 V+-V D112 100k C39 R94 267k VV2 C107 U106 330nF 17 14 The Algorithmic 47k [12] P. Prusinkiewicz and A. Lindenmayer, C100 2 V+-V 16 -v R108 1N5817 100k R61 D62 20pF V 330nF U56 100k V+-V C57 10µF R41 C101 R99 v+-v U55 100k R121 V+-V D122 U96 R50 R49 C53 U116 330nF * V+-V 4 C117 1 U115 14 R110 R109 C113

47k 330nF 47k V+-V 15 2 100k V+-V 4 Beauty of Plants15 R97 100kR134 R78D135 D79 . New York: Springer, 1990. R118 1N5817 C130 U129 V- U73 V+1 14 R58 1N5817 330nF 33k C74 4 R114 100k 17 51k 949meg 330nF C102 47k 330nF R131 1N5817 R54 330nF 4 100k V+-V 10µF 100k 51k 949meg 330nF R120 R119 C123 U125 17 15 47k

V- 14 R75 1N5817 V+-V R124 R133 R132 C136 U138 51k 949meg 330nF 330nF

V+-V 17 100k R68 D69 47k V- 16 U63 100k R137 R60 R59 C64 V+-V U128 51k 949meg 330nF The Algorithmic Beauty C126 [13] J. A. Kaandorp and J. Kubler,¨ 47k 14 14 V+-V 3

U148 V+-V

100k V+-V V+ 2 C146 R127 R144 U139D145 16 330nF C140100k R85 D86

47k V+-V 2 100k R164 D165 16 U80 R65 1N5817 R147 R149 C151 R77 C160R76 U159 3 C81 51k 949meg 330nF 330nF 5 4 R141 1N5817 47k * 17 330nF 4 of Seaweeds, Sponges, and Corals. New York, NY, 100k 100k R161 1N5817 50k 2.2µF V- 330nF 15 R150 100k R154 R143 R142 R82 1N5817 50k V+-V 51k 949meg 100k V+-V 330nF U72 R171 U166 D172 V+ C70 267k R163 R162 C167 100k 14 51k 949meg USA: Springer-Verlag New York, Inc., 2001. R67 R66 C156 V- 2 14 R168 1N5817 20pF 51k 949meg 330nF V+-V 3 100k C157 R155 v+-v U92 V- V+-V C90 100k R181 V+-V D182 U152 U176 R71 * V+-V C177 3 U175 U89 4 330nF R170 R169 R84 C173 R83 C87 15 17 330nF 47k 16 51k 949meg R153 V- 2 14 R178 1N5817 47k V+-V 5 330nF 33k R174 100k 51k 949meg U105V+ 330nF 4 R91 C158 C103 47k

330nF 100k R188 V+-V D189 10µF [14] H.R88 Meinhardt, The Algorithmic Beauty of Sea Shells, R180 R179 C184 U183 51k 949meg16 330nF 47k 16 2 V- 3 R185 1N5817 47k 51k 949meg 330nF R104 100k v+ 330nF V+-V V1 U95 47k 3rd ed. Secaucus, NJ, USA: Springer-Verlag New C93 R187 R186 17 V+ R98 16 51k 949meg 100k R111 V+-V D112 R94 267k VV2 C107 U106 York, Inc., 2003. 330nF 14 47k C100 2

-v R108 1N5817 20pF V 330nF 100k C101 R99 v+-v

100k R121 V+-V D122 U96 [15] E. Gansner, E. Koutsofios, and S. North, Drawing C117 U116 * V+-V 1 R110 R109 C113 U115 14 330nF 47k 2 R97 100k R134 V+-V D135 4 R118 1N5817 Figure 23. LTSpice drawing fromC130 automaticU129 V- generated asc 1 graphs with dot, 2006. 330nF 33k 4 R114 100k 17 51k 949meg 330nF C102 47k R131 1N5817 file, third rewriting, with a zoomed330nF module. V+-V 10µF 100k R120 R119 C123 U125 15 [16] S. Wilson, D. Cottle, and N. Collins, Eds., The Super-

V- 14 V+-V R124 R133 R132 C136 U138 51k 949meg 330nF 17 47k V- 16 Collider Book. Cambridge, Mass.: The MIT Press, R137 V+-V U128 51k 949meg 330nF C126 47k 14 2011. V+-V 3

U148 100k V+-V C146 R127 R144 U139D145 16 330nF C140

47k V+-V 2 8. REFERENCES100k R164 D165 16 R147 R149 C151 C160 U159 3 330nF 5 4 R141 1N5817 47k * 17 330nF [17] G.100k Brocard, The LTSpice IV Simulator: Manual, Meth- R161 1N5817 50k 2.2µF 330nF R150 [1] C. Roads, The Computer Music100k Tutorial. Cambridge, R154 R143 R142ods and Applications.Kunzelsau:¨ Swiridoff Verlag, 50k 100k R171 V+-V D172 MA, USA: MIT267k Press, 1996.R163 R162 C167 U166 V+ 14 51k 949meg2011. C156 V- 2 R168 1N5817 20pF 51k 949meg 330nF 100k C157 R155 v+-v

100k R181 V+-V D182 U152 C177 U176 [2] D. O’Sullivan* and T. Igoe, Physical Computing. Sens- V+-V 3 R170 R169 C173 U175 4 330nF 47k 17 R153 16 R178 1N5817 V- 2 330nF ing and Controlling33k the Physical World with Comput- R174 100k 51k 949meg 330nF C158 47k

100k R188 V+-V D189 10µF R180 R179 C184 U183 ers. Boston, Mass.: Course Technology, 2004. 16 V- 3 R185 1N5817 51k 949meg 330nF 100k

R187 R186 V+ 51k 949meg SMC2017-358