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Titanium Disilicide for Vlsi Applications TITANIUM DISILICIDE FOR VLSI APPLICATIONS by Paul John Rosser . Submitted for the degree of Doctor of Philosophy University of Surrey Department of Electronic and Electrical Engineering August, 1987 ProQuest Number: 10804429 All rights reserved INFORMATION TO ALL USERS The quality of this reproduction is dependent upon the quality of the copy submitted. In the unlikely event that the author did not send a com plete manuscript and there are missing pages, these will be noted. Also, if material had to be removed, a note will indicate the deletion. uest ProQuest 10804429 Published by ProQuest LLC(2018). Copyright of the Dissertation is held by the Author. All rights reserved. This work is protected against unauthorized copying under Title 17, United States C ode Microform Edition © ProQuest LLC. ProQuest LLC. 789 East Eisenhower Parkway P.O. Box 1346 Ann Arbor, Ml 48106- 1346 SUMMARY This thesis demonstrates that the formation of titanium disilicide for gate level interconnects in silicon VLSI processes is possible, and is compatible with the processes considered. By using this new material the operating speed of fine geometry integrated circuits can be increased. The first two chapters consider the choice of titanium disilicide as a replacement for polysilicon. A process schedule is developed which enables the deposition and annealing of cosputtered films of titanium and silicon. By carefully controlling their deposition, cosputtered films have been annealed in both standard diffusion furnaces and also in rapid isothermal anneal (RIA) systems. This success in annealing titanium disilicide films in a RIA system is a world first. Next a process schedule for the deposition and anneal of titanium films over silicon is determined. The reaction of the film with the anneal ambient and the movement of impurities inevitably present in the titanium film is considered in some detail. This work was the first to highlight the benefits gained from the use of nitrogen as the anneal ambient. Self-aligned processes rely on the interaction between titanium and silicon dioxide being negligible. The silicide formation anneal is therefore optimised to minimise this. Finally, reaction of the silicide with common dopants and with both oxidising and nitriding ambients is presented. A novel method of forming a titanium nitride over silicide contact structure is developed. In summary, this thesis demonstrates how a titanium disilicide based metallisation can be implemented into an existing MOS process. CONTENTS INTRODUCTION 1 CHAPTER ONE TECHNOLOGICAL BACKGROUND Introduction 5 1.1 The scaling of device geometries and „ 6 the impact of this on the speed of operation of a circuit 1.2 Choice of the interconnect material 7 1.3 Choice of silicide 9 1.4 Discussion of options for the 12 silicide process 1.4.1 Polysilicon process 13 1.4.2 Silicide process 15 1.4.3 Polycide process 17 1.4.4 SALICIDE process 18 1.4.5 STALICIDE process 19 1.4.6 Oxidation process 20 1.4.7 "Heart of Moly" process 21 1.4.8 Comparison of the silicide processes 22 References 25 List of figures 27 Figures 28 CHAPTER ..TtfQ DEPOSITION AND ANNEALING TECHNIQUES Introduction 37 2.1 Deposition techniques 38 2.1.1 Evaporation 38 2.1.1 Sputtering 41 2.1.3 Chemical vapour deposition 44 2.1.4 Advanced deposition techniques 45 2.1.4.a Implantation 45 2.1.4.b Plasma-enhanced CVD 46 2.1.4.C Photo-assisted CVD 46 2.1.5 Comparison of deposition techniques 47 2.2 Annealing techniques 48 References 53 List of figures 54 Figures 55 CHAPTER THREE THE DEPOSITION AND ANNEALING OF COSPUTTERED FILMS OF TITANIUM AND SILICON Introduction 64 3.1 Deposition of cosputtered films 66 3.2 Annealing of cosputtered films 71 3.2.1 Annealing of cosputtered filmsusing a 71 diffusion furnace 3.2.2 Rapid thermal annealing of 73 cosputtered films 3.2.2.1 Modelling of rapid thermal anneal results 77 3.2.2.2 The annealing of thicker films of 81 titanium and silicon and the effect of trapped oxygen 3.3 Stress in cosputtered films 82 3.3.1 Experiment to determine stress 83 3.3.1.1 Film bow and resistance as a 84 function of deposition time 3.3.1.2 Film bow and resistance as a 85 function of anneal temperature 3.3.1.3 Film bow and resistance as a 86 function of anneal time 3.3.1.4 Film bow and resistance as a 86 function of film composition 3.3.1.5 Film bow and resistance as a 87 function of deposition rate 3.3.1.6 Summary of results from experiment 88 to determine film stress 3.3.2 Improvements to the stress 89 measuring system 3.3.3 Minimising stress in silicide 92 gate processes Conclusion 94 References 95 List of figures 97 Figures 100 CHAPTER FOUR THE DEPOSITION AND ANNEALING OF TITANIUM FILMS OVER SILICON Introduction 131 4.1 The deposition of titanium films 133 4.2 The annealing of titanium films deposited 135 onto silicon 4.2.1 The annealing of films in a conventional 136 diffusion furnace 4.2.2 The annealing of films in a 138 graphite strip RIA system 4.2.3 The annealing of films in a 138 halogen lamp RIA system 4.2.4 The annealing of films in a halogen 145 lamp anneal system complete with temperature control 4.3 The substrate dependence of 146 silicide formation 4.4 The dependence of silicide formation on 152 the anneal ambient 4.5 The dependence of silicide formation on 154 titanium thickness 4.6 Impurity redistribution during 158 silicidation Conclusion 162 References 163 List of figures 165 Figures 171 CHAPTER FIVE THE REACTION OF TITANIUM WITH SILICON DIOXIDE Introduction 215 The reduction of silicon dioxide by 217 titanium during an anneal in a vacuum furnace The reduction of silicon dioxide by 220 titanium during RIA A determination of the "process window" 224 for silicide formation without oxide reduction A determination of the "process window" 225 for silicide formation without oxide reduction using temperature control A determination of the "process window" 228 for silicide formation without oxide reduction using a two stage anneal Conclusion 230 List of figures 231 Figures 234 CHAPTER SIX THE OXIDATION OF TITANIUM DISILICIDE Introduction 259 6.1 The oxidation of cosputtered 260 titanium disilicide 6.2 The oxidation of silicide films formed by 263 the deposition and anneal of titanium 6.3 A summary of oxide characteristics 267 Conclusions 268 References 269 List of figures 270 Figures 272 CHAPTER SEVEN THE NITRIDATION OF TITANIUM DISILICIDE Introduction 288 7.1 The means of incorporating a 289 titanium nitride barrier layer 7.2 The development of the 291 self-aligned nitride 7.3 The use of ammonia to enhance nitridation 293 7.4 The use of a nitrogen plasma to 294 enhance nitridation Conclusion 296 References 297 List of figures 298 Figures 299 CHAPTER EIGHT THE REDISTRIBUTION OF DOPANTS DURING PROCESSING OF SILICDES Introduction 307 8.1 Dopant redistribution during silicide 309 formation 8.1.1 Dopant redistribution during silicide 309 formation on doped polysilicon 8.1.2 Dopant redistribution during silicide 315 formation on single crystal silicon 8.1.2.a Arsenic 315 8.1.2.b Boron 318 8.2 Ion beam mixing 319 8.3 Dopant diffusion in titanium disilicide 321 8.4 Dopant redistribution during the 323 nitridation of titanium disilicide Conclusions 324 References 326 List of figures 327 Figures 330 i CONCLUSION 346 ACKNOWLEDGEMENTS 351 APPENDIX 352 Notes on the interpretation of Auger electron spectroscopic analysis of titanium disilicide films INTRODUCTION This thesis describes work carried out to determine the feasibility of incorporating refractory metal silicides into existing Metal-Oxide-Semiconductor (MOS) processes. By replacing the polysilicon gate level interconnect in a conventional process with one incorporating a low resistivity silicide, the operating speed of fine geometry integrated circuits can be increased. The first chapter gives an introduction to the technological background to the work. It starts with an outline of the basic problem - that of the intrinsic delay associated with gate level interconnects - and goes on to consider the alternative materials which could be used to alleviate this problem, and also the various ways these materials could be implemented into an existing MOS process. The reasons behind the choice of a titanium based self-aligned silicide approach are then given. Given the choice of a titanium based gate metallisation, chapter two goes on to outline the various techniques which could be used to deposit the material and to anneal it to form the low resistivity film requi red. 1 Chapter three then considers the deposition and anneal of cosputtered films of titanium and silicon. These were the first films to be considered, and were chosen because cosputtering enables excellent control of film properties, and also because, by using an oxidised substrate, the film could be effectively isolated from the substrate for electrical characterisation. The difficulties encountered in annealing these films are described and the means by- which they were overcome detailed. This work was the first to consider and demonstrate the use of Rapid Isothermal Annealing (RIA) for the formation of silicide layers. With the advent of the "self-aligned" silicide processes it seemed prudent to shift the emphasis of the work from the formation of silicides by the deposition and anneal of cosputtered' films to the formation of silicides by the deposition of titanium films onto silicon followed by an anneal to enable interdiffusion and reaction. Chapter four therefore considers the growth of films formed by this technique, and in particular considers the movement of the impurities inevitably present in the titanium film and the anneal ambient.
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