Trends in Processor Architecture of Mobile Phones: a Survey

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Trends in Processor Architecture of Mobile Phones: a Survey International Journal of Advanced Science and Technology Vol. 29, No. 5, (2020), pp. 6265 – 6274 Trends in Processor Architecture of Mobile Phones: A Survey Advaitha B1*,Mopuru Lahari1,Gopalakrishnan T2 UG Student1, Assistant Professor2 School of Computer Science and Engineering Vellore Institute of Technology, Vellore, India [email protected],[email protected] , [email protected] Abstract Mobile’s has become a part and parcel of our lives. The brain of a mobile is its processor. The semiconductor device, CPU chip is placed inside chip package which reduces the heating effect. It is designed to operate at lower voltage compared to desktop and with an increased “sleep mode” capability. We can control the power levels of the mobile processor and can even turn of sections of chips when they are not in use. The so-called clock frequency is bought down in mobiles to increase the battery life. The year 2016 to 2020 focused more on improving the existing features than introducing new features. Mobiles had transformed from a device that was just used to communicate to a source of knowledge. This transformation is possible only with the help of improvement of processors. The aim of this paper is to study about the changes brought in the past 5 years in processors. Keywords: Smart Phones, ARM Processor, Processor core 1. Introduction Smartphone hardware principally consists of display (LCDs and LEDs), battery, system on a chip, memory and storage, modems, camera and sensors. The processors used in mobiles must be designed in a way that it emphasizes price, time to market, low power. Due to the presence of constrained resources of cost and power, and all real time computation requirements, the processors are designed to support a number of distinct characteristics such as limited programmability. The processors architecture must support all the complex user interface, dynamic operating environment and provide additional services. Multiple DSP’s or hardware coprocessors built by advanced architecture is required to fulfill all these additional services. 2. Mobile Processor Chipsets Types 2.1 Digital Signal Processor It is a specialized microprocessor that is designed to fulfill the needs of digital signal processing. Its goal is to filter or compress continuous analog signals. Early DSPs were implemented using bit slice chips. During the late 1970’s the first single chip DSPs were introduced. The cellular handsets can be implemented using 2 different approaches. The first method uses ASIC (Application Specific Integrated Circuit) techniques and the second approach emphasizes programmable DSPs. The embedded DSPs are widely adopted for VLSI styles ISSN: 2005-4238 IJAST 6265 Copyright ⓒ 2020 SERSC International Journal of Advanced Science and Technology Vol. 29, No. 5, (2020), pp. 6265 – 6274 whereas the wireless phone market place is ruled by programmable DSPs for cellular telecom [1]. Analog transmission was used by the earlier mobile that is the 1G system that required a lot of power for transmission and had a major disadvantage of providing access to restricted users. Global System for Mobile Communication (GSM) evolved after the first generation of analog cellular signals used in first generation mobiles. The type one DSP processor served as an important embedded processor was used widely in second generation mobiles. Due to shorter product life cycle, the DSP architectures are much popular than the ASIC and hence are widely employed in GSM mobiles. Cheap and versatile design is enabled by the programmable DSPs for the cellular telephones. The first DSP was introduced by AT&amp in the year 1979 which was later improvised by the Texas Instruments. The storage and signal pathway for instructions and data was physically separated by the traditional DSP that used Harvard architecture. This was contrasted by the von Neumann architecture that used the same memory for storing both data and instruction. The instructions are executed using data memory and instruction memory. Simultaneous transmission is possible through separate data and instruction buses. Ultimately, the multiplication unit output is connected to an adder and hence, adding and saving all the partial results for further processing. The high memory bandwidth and multiple operand operations of the architecture enable the execution of function in fewer cycles. 2.2 System On Chip (SOC) System on chip is a single chip that integrates all the components of a computer or other electronic system into a single unit. The typical coin sized chip compresses central processor, graphics card, memory controller and other elements into a single unit. The power operation in the mobile is lowered by lowering the voltage of chip. Higher performance and low power designs had become reality with the introduction of highly integrated Soc’s that utilizes multicore technology to its maximum. Cache memory kind of improvement must be implemented in VLIW architecture for better performance. Instruction set customization is used to speed up the operation of mobile devices. Inorder to support more read and write operations, most instructions are present in 16 bit. We can effectively improve the memory utilization with the help of instruction set customization. For example, if we customize a 64-bit data types to 8-bit types there is an improvement in the overall performance. This is due to better operations per cycle in 8-bit than in 64-bit [2]. There is a recent talk that states that with the introduction of Network on Chip (NoC), the SoC would go outdated. The effectiveness of microprocessor can be increased by using SoC. The MediaTek launched HelioP70 with artificial intelligence which combines CPU and GPU that can effectively be use for advanced AI processing. With the introduction of new and powerful SoC, the flexibility reduces which makes the processor companies to build specially designed SoC for every device. However, with the invention of new materials and technologies we can overcome this disadvantage. ISSN: 2005-4238 IJAST 6266 Copyright ⓒ 2020 SERSC International Journal of Advanced Science and Technology Vol. 29, No. 5, (2020), pp. 6265 – 6274 2.3 ARM Processors For Mobiles The modern-day smart phone uses ARM based processor. It is primarily based on RISC architecture which uses a 32-bit instruction set. Considering the fact that they show great performance in spite of using low power, its widely used in smart phones. Apple, Qualcomm etc design their own products based on the architecture provided to them by the ARM holdings which includes chip design and instruction set. The architectures that are used in low end and mid range smart phones range from ARMv5 to ARMv7a, whereas the high-end devices use ARMv8a. ARMv8a architecture has two execution state that is AArch32 and AArch64. The execution state AArch32 provides compatibility with ARMv7a architecture. 3. Comparative Study of the Processors in Mobile Phones According to the recent study, the best mobile processor is Apple A13 Bionic which powers the iPhone 11 Lineup. Of all the processors used by the Android devices, the Snapdragon 865 is now the best processor which is followed by Exynos 990, MediaTek Dimensity 1000, Snapdragon 855+, and Kirin 990. The Apple A12 Bionic is the 5th best SOC and its slightly better than Snapdragon 855+ [3]. 3.1 APPLE A13 Bionic Processor The Apple A13 Bionic processor is the new system-on-chip processor which powers the latest 11 series of Apple iPhone. Allowing some of the powerful features like 4K video at 60fps and slow-motion pictures well known as slofies, as well as spatial audio, the Apple A13 Bionic processor has been described as the Apple A13 Bionic as the fastest CPU and GPU ever in a smartphone. In short it can be said that this is an improvised version of the previous processor, the A12 Bionic, introduced by enhancing overall performance ,also offering gains in the power efficiency, and hence the battery life of the mobile [4]. It features an Apple-designed 64-bit six-core CPU, with two high-performance cores running and four energy-efficient cores. It comprises of– a six-core CPU, four core GPU, and an eight-core Neural Engine processor. ISSN: 2005-4238 IJAST 6267 Copyright ⓒ 2020 SERSC International Journal of Advanced Science and Technology Vol. 29, No. 5, (2020), pp. 6265 – 6274 Figure 1:Apple A13 Bionic Processor [11] Four of the six cores on the CPU are low-powered cores which are dedicated to handling basic phone operations such as answering calls, launching Safari, delivering messages – while two bigger performance cores lie in active until you put more intensive processes into actionas in recording video or playing video games etc. 3.2. SNAPDRAGON 865 Snapdragon 865 is built on TSMC-improved 7nm “N7P” node which is almost the same process used by Apple’s A13 Bionic chip and manufactured using TSMC’s first-generation 7nm “N7” mode. Snapdragon 865 features an octa-core CPU with single primary ARM Cortex A77 core based on Kryo 585 assigned to run at high-performance. The balance cores comprise of three ARM Cortex A77 cores based on Kryo 585 running for mid-performance and four Cortex A55 cores based on Kryo 385 for usage of low power [5]. Figure 2: Qualcomm snapdragon processor[12] For the tasks related to the graphics intensity in Snapdragon 865, we have the latest Adreno 650 that offer a way better and faster graphics rendering over the Adreno 640 in previous Snapdragon 855. The latest Snapdragon 865 SoC with Adreno 650 is capable of featuring QHD+ 144Hz display (or UHD 60Hz). The Spectra 480 ISP on Snapdragon 865 has made quite improvisation to the camera performance which can process images up to 200MP [6]. 3.3. EXYNOS 990 Exynos 990 is a 64-bit octa-core ARM high performance mobile system on a chip designed by Samsung and introduced in the year 2020.
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