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ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Outline 7. Smart Power Integrated ‰ Why Smart Power ICs Circuit Technology ‰ Design Challenges ‰ Power Devices and Processing Wai Tung Ng Technologies Associate Professor ‰ Smart PIC Output Drivers University of Toronto Electrical & Engineering ‰ Smart PIC Applications Toronto Ontario Canada M5S 3G4 ‰ Future Trends

Tel: (416) 978-6249 e-mail: [email protected]

© 2002 University of Toronto 8-1 University of Toronto 8-2

ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 7.1 Why Smart Power Integrated Circuits Why Smart PICs (cont’d) power X If an Integrated Driver- X Example: Conventional interface transistors Electronic Drive — a Controller is mounted on & control the back of each DC circuits number of DC motors motor. The number of may have to be DC wires that need to be controlled Motors routed can be greatly simultaneously. reduced.

X The interface circuit on the Multiple smart PIC can also pass Channel monitoring information Power Electronic (e.g. current, voltage and Drives temperature) to and from DC Large wire the controlling host. motor bundle

University of Toronto 8-3 University of Toronto 8-4 ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Why Smart PICs (cont’d) Why Smart PICs (cont’d) X With a smart PIC driver- X Implementing an integrated driver-controller using Interface bus controller, only a Smart PIC technology not only reduce the wiring minimum of 3 cable complexity, but also offer the following benefits: wires are required: DC x Reduced parts count — improves reliability, reduces Motors interface bus assembly cost, reduces size and weight. and DC power. x Integrated sensors — over current, over voltage and DC power temperature sensing circuits can be used to provide more accurate monitoring of the output power stages. Multiple Channel x Interface logic circuits can provide more advanced Power features such as remote diagnostics and remote Electronic programming. Drives Small wire bundle x Potentially can provide a more optimized design.

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ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 What is Smart Power Integrated Circuits What is Smart PIC? (cont’d) X Conventional VLSI chips are designed to perform X Smart PIC is signal processing (e.g. microprocessor, DSP) only. combination of X Once a decision is made, external discrete power VLSI signal Power transistors are used to drive actuators (e.g. motors, processing and solenoids). high power output driver on the same chip. X The percentage Smart split in chip area PIC can vary, but Analog and Digital 50% to 50% is Signal Processing not uncommon. Brain Power

University of Toronto 8-7 University of Toronto 8-8 ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Smart PICs Comparing Hybrids and Smart PICs Low Voltage Control Circuits + Power Output Drivers Hybrid Monolithic PICs X LV Control Circuits: typical operating out of a low ‰ simple implementation ‰ lower total parts count voltage (LV) supply — 3 to 5V ‰ established ‰ higher reliability X Power Output Drivers: typically operating out of technology high voltage (HV) and/or ‰ smaller size high current supplies ‰ low cost ‰ potentially lower cost X On-chip features: ‰ reliability ‰ acknowledge D Provide diagnostics and feedback on load and ‰ restricted to single established operating conditions function technology D Thermal shutdown ‰ cost of developing and maintaining D Short circuit and over voltage protection technology

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ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Major Applications and Requirements of PICs Example of Smart PIC Chips 100 X Smart PICs can be Linear AC Regulator Motors packaged in a multi-pin 10 Automotive TO-220 like plastic package for better Switching Regulators thermal dissipation. 1 Fluorescent Ballast Digital 0.1 Telecom

Load Current (A) Load Current Bipolar X The Smart PIC chips 0.01 linear Display are usually bonded on a metal carrier, and then encapsulated in 0.001 1 10 100 1000 plastic.

University of Toronto Supply Voltage (V) 8-11 University of Toronto 8-12 ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 World IC Usage (1998) 7.2 Design Challenges X VLSI usage is X Most high voltage devices are used as switches largely dominated by operating between on and off states computer and slope = 1/Ron consumer products. X Static Considerations: I X These are max D Off State: Breakdown Voltage, V commodity markets B — competitive and Leakage Currents high risk. D On State: Drive Current BV X Auto, industrial, and On resistance, R ∝ (V )2 communication on B Forward On Voltage, VON markets are Current handling Capability I ∝ Area relatively under max developed — great Power Dissipation PDC ∝ Area potential! D Safe Operating Area

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ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Design Challenges (cont’d) Design Challenges — Isolation Techniques X Dynamic Considerations: X Self Isolation Dynamic SOA D Used mostly in MOS technology D Switching Speed Imax D Storage Time D Source and drain junction isolate Static themselves from each other SDG D Power Dissipation SOA under reverse bias P = P + f E SiO SiO Loss DC SW D Simple implementation p+ n+ 2 n+ 2 B n-drift ESW = switching energy per cycle V f = switching frequency D Minimum area overhead p-well D Limited circuit flexibility D Safe Operating Area p-substrate — source always grounded D Breakdown voltage can be as high as 1000V

University of Toronto 8-15 University of Toronto 8-16 ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Isolation Techniques (cont’d) Isolation Techniques (cont’d) X Junction Isolation X Dielectric Isolation D Isolation provided by pn junctions with enclosed D Require trench etching and refill technology device well D Trapped charges at wafer bonding interface may D More complicated cause unwanted inversion layer in n-epitaxial layer process, but also more SDG SD versatile G

SiO2 n+ SiO2 n+ SiO2 D Source may be above p+ SiO SiO SiO 2 p+ n+ 2 n+ 2 ground potential p+ p-well p+ sinker n-epi sinker p-well D More area overhead n-epi

D Large parasitic effects p-buried layer SiO2 (C, BV, leakage) p-substrate p-substrate D Low cost

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ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Dielectric Isolation Design Challenges — Packaging X Oxygen Implant method X Non-standard packing; primary considerations

Oxygen implant include thermal resistance and pin counts. annealed silicon

SiO2

oxygen rich silicon surface mount damaged silicon power QUAD n-substrate n-substrate

(a) oxygen implant (b) high temperature annealing SiO SiO n-epitaxial layer isolated n-island 2 2

SiO2 SiO2 Variation of TO-220 packages n-substrate n-substrate

(c) epitaxy (d) trench etch and refill

University of Toronto 8-19 University of Toronto 8-20 ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 7.3 Power Devices and Processing Power Devices Technologies X Power devices in smart PICs are usually required to X Smart PIC is a specialized subset of VLSI Technology. perform switching functions. X Digital oriented VLSI designer can basically ignore X Thyristors and transistors are the two main classes of process related issues, relying only on logic devices in power applications. synthesizers (e.g. VHDL) and still able to produce. X Transistors are more commonly used in smart PICs, by X Smart PIC designs (similar to analog ICs) are much far MOSFETs are more favorable than bipolar junction more process dependent, especially when pushing the transistors (BJTs) because of simple gate drive. performance envelop. X Power devices can be categorized into either vertical X Smart PIC designers must have a broad knowledge or lateral devices, depending on the path of current spanning from device, process, circuit to systems flow in the transistor structure. issues. X Figure of merit: specific on-resistance (Ω×cm2). X The Smart PIC designers must also have unrestricted access in making critical fabrication process changes.

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ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Power MOSFETs Power MOSFETs (cont’d) X Prior to the development of MOSFETs, the only X Power MOSFETs was developed in the 1970’s to devices for high speed, medium power applications address the deficiency of power BJTs. was the bipolar junction transistor. X These devices evolve from MOS VLSI technology. X Power BJTs have several problems: X One of main advantage of Power MOSFETs is that Da current driven device, require large base current the gate only requires a bias voltage with no steady- since β is usually very low. state current in either the on or off-state (but there is Deven larger reverse base current is required to turn off switching current to charge and discharge the gate Dbase drive circuitry are complex and expensive electrode), greatly simplifying the gate drive circuitry. Dvulnerable to secondary breakdown that usually occur X MOSFETs are unipolar devices, current when high voltage and high current conditions appears simultaneously conduction in the drift region is by majority DDifficult to make parallel connections for larger current carriers only without carrier injection — no delay handling capability. due to storage time. University of Toronto 8-23 University of Toronto 8-24 ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Power MOSFETs (cont’d) Power MOSFETs Structures X The inherent switching speed of MOSFETs is orders X Power MOSFETs can be categorized into V-MOS, of magnitude faster than for power BJTs. VDMOS, and UMOS. X MOSFETs are particularly useful for circuits with high X V-MOS have a V-groove etch from the top side of the switching frequencies where switching losses are the wafer using a preferential (isotropic) etch. primary concern. X The channel is formed along the wall of the V-groove. X In addition, power MOSFETs have excellent SOA Source (can withstand the simultaneous application of high current and voltage for short duration, without Gate Gate n+p+ n+ n+ p+ n+ n+ p+ n+ secondary breakdown). ppp X Power MOSFETs can be easily paralleled since their n-epi forward voltage drop has a negative temperature n+ substrate

coefficient. Drain

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ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 V-MOS VDMOS and UMOS Source

X Double diffusion is used to create very short channel X The VDMOS has a Gate Gate

SiO SiO lengths, independent of photolithography resolution. conventional surface 2 p+ n+ n+ p+ n+ n+ p+ 2 channel while still p-well p-well p-well X Using the same window opening, the p-region is n-epi relying on double allowed to diffuse deeper into the silicon surface n+ substrate followed by the n+ diffusion. The difference between diffusion to produce the n+ and p junctions determines the actual channel the short channel Drain length rather than gate electrode geometry. length. Source X V-MOS was the first commercial power MOSFET X The U-MOS uses a trench etching Gate Gate structure, however it is quickly superceded by the n+p+ n+ n+ p+ n+ n+ p+ n+ VDMOS due to manufacturing problems and the technique to turn the ppp concentration of high electric field at the tip of the V- channel into a vertical n-epi groove. direction. n+ substrate

Drain University of Toronto 8-27 University of Toronto 8-28 ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Power MOSFETs (cont’d) VDMOS — HEXFET X In all three devices, the forward blocking capability is X Example: In order to further reduce the on-resistance provided by the p-well to n-epi (drift region) junction. of the power MOSFETs, one should use a layout X Due to the higher doping concentration of the p-well such that there is the most device width per until region, the depletion region extends mostly into the n- area. epi drift region. X There are many X Therefore, the choice of n-epi doping concentration surface packaging can directly affects the blocking voltage and on- arrangement for the resistance of the power MOSFETs. VDMOST (circular, square, etc.) X Due to the built-in p-well/n-epi junction, power MOSFETs cannot block reverse voltage. However, X One of the popular this body diode can be useful in many switching organization is the circuits that involve inductive loads. hexagon — HEXFET.

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ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 IV Characteristics IGBT (Insulated Gate Bipolar Transistor) X Power MOSFETs are designed to operate in the 1st X If the n+ substrate is replaced by a p+ substrate, one quadrant, and occasionally in the 3rd quadrant. can make a merged MOS-Bipolar device (IGBT). X The IGBT offers a substantial amount of current X The IV curves are similar to slope = 1/R on handling capability, but with slower switching speed. conventional MOSFETs except I X The IGBT is a dominant power device in high current that the power devices usually max applications. switch between fully on and fully Cathode off — cutoff or triode region. Gate Gate

X The power devices rarely SiO SiO B 2 p+ n+ n+ p+ n+ n+ p+ 2 Body V operate in the saturation p-well p-well p-well diode region (except as amplifiers) turns n-epi because of power dissipation on bipolar n-drift region p+ substrate transistor limits. Anode University of Toronto 8-31 University of Toronto 8-32 ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Lateral Devices Lateral Devices (cont’d) X One important drawback of the vertical devices is the X The current flows from the drain, laterally along the fact that it is difficult to include multiple power devices surface through the MOS channel and up into the on the same monolithic chip. source, hence the name Lateral DMOST (LDMOST). X The lateral structure allows all terminals to be X LDMOST generally suffers a higher specific on- accessed from the top surface of the chip. resistance due to the longer current path. SourceDrain Source Furthermore, the blocking voltage of the LDMOST depends critically on the curvature of the p-well to n- drift region junction. SiO SiO p+ n+ 2 n+ 2 n+ p+ X In order to obtain high blocking voltage, it is p-well p-well necessary to use a low doping concentration in the n-drift region n-epi n-drift region. However, this directly contradicts with the low specific on-resistance requirement. p-substrate

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ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 RESURF Devices RESURF Devices (cont’d) X To provide better trade-off between these two X The RESURF device structure is identical to the parameters, an advanced technique called REduced conventional LDMOST, except that a much thinner SURface Field (RESURF) was developed by Philips. n-epitaxial layer is used for the n-drift region. X With an optimized doping concentration in the n-drift SourceDrain Source region, a much lower specific on-resistance can be achieved without a decrease in blocking voltage.

SiO SiO p+ n+ 2 n+ 2 n+ p+ X The RESURF LDMOST represents the state of the p-well p-well art smart PIC device. X If high current capability is desired, the n+ drain n-drift region (thin n-epi) region can be replaced by a p+ anode to form a p-substrate LIGBT. This merged MOS-bipolar device offers the same benefit of the vertical IGBT and also the problem of slower switching speed.

University of Toronto 8-35 University of Toronto 8-36 ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 LDMOST Device Performance LDMOST Device Performance (cont’d) X The current status of LDMOST development can best X The blocking voltage is mainly in the range of 20 to be summarized with the following diagram. 100V (higher BV is also possible) and is more suitable for automotive and computer peripheral applications. X The specific on-resistance versus blocking voltage data points are already very close to the theoretical limit. In fact, it is generally believed that the specific on-resistance contributed by the silicon portion of the device is already near ideal. X The remaining issue is to reduce the series resistance of the metal interconnections and bonding wires. X The basic design and optimization procedures for LDMOSTs are well understood. However, process integration may require compromises.

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ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Smart PIC Fabrication Processes Dedicated Smart PIC Fabrication Processes X The fabrication process for smart PIC can be classified X Dedicated processes are usually more complex and as a dedicated technology or a compatible technology. costly (e.g. SGS Thomson’s BCD5 process). X A dedicated smart PIC technology refers to a DSGDDSGD B EC BCE

fabrication process with the optimization of the power n+n+ n+ n+ n+ n+ n+ n+ p+ p+ p+ p-body p-body p-body n+ ppp LV n+ HV Nwell Pwell n+ LV Nwell Pwell p+ LV Nwell Pwell devices at the highest priority. Nwell PwellLV Nwell Pwell N+ Buried Layer Bot. N+ Buried LayerBot. N+ Buried Layer Bot. N+ Buried Layer Isol. Isol. Isol. X The performance of the low voltage CMOS devices is Buried Nwell p substrate usually compromised. 40V LDMOST 16V LDMOST NPN LPNP X SGS Thomson is a long time advocate of such trend Word Bit with their family of BCD (Bipolar-CMOS-DMOS) DSGD S G D SGD DGS Control Gate Line Line

n+ n+ n+ p+ p+ p+ p+ n+ n+ pp pp ppnnp n-n- n+ processes. They are designed to accommodate p-body p n+ Pwell Pwell Pwell Pwell HV Nwell HV Nwell LV Nwell Pwell N+ Buried Bottom Isolation various power devices, sub-micron CMOS, bipolar Bot. Bot. N+ Buried Layer Bot. N+ N+ Buried Nwell Isol. Layer Isol. Isol. B.L. N- Buried Layer B.L. transistors and other special devices such as Buried Nwell p substrate embedded EEPROM, etc. 80V LDMOST HV P-MOST LV CMOS EEPROM

University of Toronto 8-39 University of Toronto 8-40 ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 SGS Thomson’s BCD5 SGS Thomson’s BCD5 (cont’d) X The BCD5 process is a versatile technology that can X The BCD5 process is extremely expensive and all the be employed by a variety of applications. available features can only be justified if they are all D 20V and 50V extended drain high voltage p-MOS. put into use. D 5V CMOS, LDD (lightly doped drain) with gate oxide X For most applications, the power output circuit can be

thickness of Tox = 200Å and channel length of Leff = 0.6µm. very simple switching circuits. In this case, one or two D 16V n-MOS for programming EEPROMs. The transistors type of transistors are necessary. have LDD and extended drains and with gate oxide X In many cases, a simple n-MOSFET is sufficient. This thickness of Tox = 330Å. can lead to a considerably simpler smart PIC process. D 5V and 12V junction isolated npn transistors. Can be

modified to BVCEO = 25V. D 20V and 40V lateral pnp transistors. D Double poly EEPROM with programming time of 2ms. Can be arranged in flash memory if required.

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ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Compatible vs Dedicated Processes Compatible Processes

X Dedicated Processing vs. Modular Steps X This compatible approach is to integrate the power Compatible Modular Processing. devices into an existing process. Starting X Processes that can offer more Starting X While this invariably would lead to a greater degree of MaterialMaterial varieties of optimized devices are compromise in the performance of the power devices, necessary for true single chip it is a significantly more cost-effective approach. system implementation. X The goal would be to minimize the number of X Full custom process — design a OxidationOxidation additional steps that have to be introduced to the new process from scratch, but with original process. highly optimized devices. X This will ensure low production cost since most Photo-Photo- X Compatible process — minimize lithographylithography existing processes are already fine-tuned and is process changes, device running at high volume. performance compromised, but Continue with lower cost. standard process

University of Toronto 8-43 University of Toronto 8-44 ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Compatible Processes (cont’d) CMOS Compatible — HVNMOS process X Since majority of the smart PICs have approximately 1. Epitaxial layer and p-well implant Arsenic Implant Arsenic Implant a 50% to 50% split in area between power devices SiO2 SiO2 and the low voltage control circuits, maintaining the p-well n-epi p-well n-epi optimized low voltage device performance would also p-substrate lead to equally efficient designs. X For example, by introducing only one extra masking 2. Pattern nitride layer, p and n-guard implants Boron p-guard Implant step, one can fabricate power devices using a HV mask Photoresist conventional CMOS processes with minor nnnnn n-epi n-epi modification to doping concentrations only. p-well p-well Si3N4/SiO2 layer p-substrate NMOS PMOS HV NMOS Arsenic n-guard Implant n-guard & HV mask

SiO2 SiO2 SiO2 Photoresist n+ n+p+ p+ p+ n+ n+ p-well n-epi p-well n-drift region nnp p n p-well n-epi p-well n-epi n-guard p-guard p-substrate p-substrate

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ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 HVNMOS process (cont’d) HVNMOS process (cont’d) 3. LOCOS oxidation and poly gate X The compatible approach is currently being adopted Arsenic n+ Implant Arsenic n+ Implant Photoresist by many manufacturers for their existing CMOS SiO2 SiO2 SiO2 n+ n+ n+ n+ processes, especially for out-dated processes. p-well n-epi p-well n-guard X Since most of the production volume is being p-guard p-substrate migrated to more advanced processes (e.g. sub- 4. p+ implant, contact hole and metallization micron and BiCMOS processes), in order to maintain the existing process lines, new applications have to NMOS PMOS HV NMOS be found.

SiO2 SiO2 SiO2 n+ n+p+ p+ p+ n+ n+ X Smart PIC technology is the idea way to inject new p-well n-epi p-well n-drift region n-guard life into these soon to be obsolete processes. p-guard p-substrate X Therefore, opportunities to collaborate with X The blocking voltage and specific on-resistance manufacturers on process ratings can be optimized by selecting the appropriate development are increasingly more and more viable. doping profiles. University of Toronto 8-47 University of Toronto 8-48 ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 7.4 Smart PIC Output Drivers Low-side Switch VDD X In monolithic form, the power devices are usually X Low side switch is simplest used as on-off switches to minimize power configuration. It is usually consist of a

dissipation. transistor connected in series with a Load X The output circuit configurations are also limited by load. the types of available devices and fabrication X The switch is connect between the load processes. and ground, hence the name low-side X In Smart PIC implementation the availability of power driver. devices and isolation techniques dictates the output X This is a unidirectional driving circuit configuration. switch (i.e. current only flows in one direction). + vGS −

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ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Low-side Switch (cont’d) High-side Switch X n-channel devices are usually preferred because of X If the load is grounded on one side instead of their lower specific on-resistance when compared to connected to the supply voltage. the same size p-channel counterpart. X The power VDD VDD X The n-channel MOS gate can be controlled by a gate transistor is + − v vG voltage that swing between 0V and 5V (may be as connected SG − + high as 15V). The gate voltage is quite often fed between the load directly from a digital gate. and the supply p-MOS n-MOS X This type of driving scheme only requires one power voltage. Load output device. X The power device Load X Since the source is connected to ground, multiple can be either an devices (for multiple output channel) can be easily n-or p-channel incorporated in many smart PIC processes using device. junction isolation.

University of Toronto 8-51 University of Toronto 8-52 ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 High-side Switch (cont’d) Half Bridge X The n-MOS is advantageous in terms of specific on- X In situations where bi-direction current float is resistance. However since its source is above ground required, a half bridge (half of an H-bridge) can be potential, a gate voltage higher than the supply used. voltage is necessary. VDD VDD X The gate drive circuit requires charge pumping or + vSG n-MOS bootstrapping techniques. The floating source also − require a more complex isolation scheme. p-MOS v + X p-MOS devices makes the configuration the exact GS − complement of the low-side driver. Load Load X Additional level-shifting circuit is required to convert n-MOS n-MOS the in-coming digital signal to a suitable gate drive voltages for the p-MOSFETs. The level-shifters are v + v + usually less complex than the charge pumps. GS − GS −

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ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Half Bridge (cont’d) Switch Implementation — Summary X Half bridges can be implemented using either a Low-side High-side CMOS Configuration Totem Pole complementary push-pull or totem-pole configurations. Driver Driver Push-pull X Complementary push-pull is more straight forward, it Power Common Source Common Common requires complementary n and p-channel devices. Devices source n- follower n- Source n- Source n- MOSFETs MOSFETs or MOSFETs MOSFETs This requires a more complex smart PIC process. Common and and X Totem-pole configuration requires two n-MOSFETs, source p- Common Common MOSFETs source p- drain n- but with one of having a floating source. MOSFETs MOSFETs X This would require a modification to the smart PIC Gate Drive LV Supply Level Shift Level Shift Floating and charge process, but is still much less complicated than a pumps complementary PIC process. Voltage rating up to 600V up to 600V up to ~150V up to ~150V X The complexity of the charge pumps or bootstrap Integration Specific p-MOS BV Specific Specific circuits required for the top n-MOSFET is still more Issues on- and Specific on-resistance on-resistance, cost-effective than going for a more complex process. resistance on-resistance and latch-up body effect

University of Toronto 8-55 University of Toronto 8-56 ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Hard Switching Soft Switching X The switching techniques discussed so far is mainly X Soft switching technique is attracting more and more hard switching where the device is forced to operate attention, especially for smart PICs is the resonant between on and off-states by controlling the gate mode circuit. voltage. X This type of circuits basically generates short pulses X The abrupt changes in current levels can create large from the DC supply using a LC resonant circuit. The voltage and current transients (dv/dt and di/dt) which individual pulses are passed on to the load, the could have very damaging effects on the circuit equivalent power delivered to the load is dependent performance and/or the power devices. on the pulse density. X Hard switching usually require a long turn-off time, X Switching occurs only at the end of the pulse. This resulting in switching loss, high heat dissipation and can be either the zero voltage or zero current lower efficiency. crossing (note that it is almost impossible to achieve simultaneous zero voltage and zero current for reactive loads).

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ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Soft Switching (cont’d) Soft Switching (cont’d) X Zero voltage and X The challenge of this techniques is the fact that more + Lr zero current Vr VA1 VB1 VC1 complex controlling circuits are required to monitor V switching dc Cr A BC the pulses and to maintain resonance during start up methods minimize and at all time. VA2 VB2 VC2 the large voltage - X Resonant circuits are gaining wider acceptance even and current Vr in discrete power technology. It will continue to be a transients prime candidate for smart PIC implementation. associated with t hard switching Vref circuits. t

Vo t

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7.5 Smart PIC Applications Power Requirements Operating Circuit Applications Frequency Topology X Smart PIC technology is expected to have an impact Voltage Current on all areas in which discrete power semiconductor Display Drivers 100-400V 0.01 - 0.1A ~ 100's kHz DC devices are presently being used. Computer Power 50V 10 - 50A ~ 100's kHz DC Supplies X It is expected to open up new applications based Motor Drive 300 - 600V 10 - 50A ~ 10's kHz AC & DC upon the added features of smart controls. Factory Automation 300 - 600V 10 - 50A ~ 1's kHz AC & DC X For low current applications such as display drivers, Telecommunications 100 - 600V 1 - 10A ~ 100's kHz AC smart PICs are already being used extensively. Appliance Control 300 - 600V 1 - 20A ~ 1's kHz AC X In the other applications where high current and high Consumer 50V 0.1 - 10A ~ 10's kHz DC voltage are required, discrete thyristors and GTO's Electronics (Gate-turn-off thyristors) are used due to the high 300 - 600V 1 - 10A ~ 10's kHz AC power dissipation. Smart House 300 - 600V 5 - 50A ~1's kHz AC X However, the control circuits for these power devices Aircraft Electronics 100 - 600V 10 - 50A ~10's kHz DC are good candidates for smart PIC implementations. Automotive 50 - 100V 1 - 20A ~1's kHz DC Electronics

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ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Flat Panel Displays Flat Panel Displays (cont’d) X The popularity of portable electronic products such as X The driving speed is dependent on the frame rate and mobile phones and has triggered scan rate of the display. an tremendous demand on flat panel displays. X For a refresh frame rate of 60 frame per second, at X These displays are usually LCD (liquid crystal display) VGA resolution, a minimum scan rate of 30kHz is or EL (electro-luminescence) panels arranged in a required. For this reason, MOS technology is matrix with large number of column and row drivers preferred. (e.g. 640×480 for VGA resolution). X Technology challenges that need to be addressed are X Although the voltage required may be large (see Table improvements in the density and switching speed of 1), the current level are small (usually in the µA to mA the high voltage output transistors. range). X Semiconductor companies that manufactures generic X Smart PICs with as many as 80 output channels have display driver chips are NEC, Sprague, Fujitsu, been fabricated on a monolithic chip. Hitachi, Supertex, etc.

University of Toronto 8-63 University of Toronto 8-64 ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Computer Power Supplies and Disk Drivers Computer Power Supplies (cont’d) X Computer systems are growing continuously in terms X In order to reverse this trend, it is necessary to of their speed and processing capability. This demand develop smart PIC technology top improve the density is met by higher density of integration in VLSI and hence the volume of the power supplies. technology. X The size and power loss is largely dependent on the X However, the increased in power requirement has magnetic components (e.g. transformers in DC-DC resulted in an increase in the physical size of the converters) and the switching frequency. power supply. X For the best efficiency and smaller size, transformers X In 1976, the CPU board and the power supply each should be operating at a few MHz. This is already represented 1/3 the total physical volume in computer pushing the limit of power devices in Si technology. system. X Future advances in improving power supply efficiency X By 1990, the power supply has grow to 50% while the and size will require the development of new circuit CPU board has shrunk to about 20% of the physical topology using soft switching and improve power volume. MOSFETs.

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ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Variable Speed Motor Drives Variable Speed Motor Drives (cont’d) X Variable-speed motor drives are being developed to X The first smart power modules for variable-speed reduce the power loss in all applications. motor drives were developed at General Electric (the X The improvement in performance requires smart division was subsequently sold to Harris power technology that can operate at relatively high Semiconductor) after the introduction of the IGBT frequencies with low power losses. (insulated gate bipolar transistor) and PIC technologies in the early 1980's. X This translates to a low on-state voltage drop at high current levels, fast switching speed, and rugged X This technology has been identified for development operation. by the Japanese government for reducing power consumption. It is also one of the key component in X For smart PIC implementation, additional the development of drive motor control in electrical consideration such as level shifting to and from high vehicles. voltages, over-temperature, over-current, over- voltage, and short-circuit protection are more critical. X The power modules are hybrids of discrete power devices (used to deliver large current to the motors) and PIC controllers packaged in the same assembly. University of Toronto 8-67 University of Toronto 8-68 ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Factory Automation Telecommunications X Advanced numerical control and robotic systems X One of the high-volume markets for smart power require efficient smart PIC technology to create a technology is in telecommunications. distributed power control network under the X The technology required for this applications must be management of a central computer. capable of integrating multiple high-voltage, high- X The smart PICs for this application must be capable of current device on a single chip. providing AC or DC power to various load such as X At present, this has been accomplished using MOS motors, solenoids, arc-welder, etc. devices fabricated using dielectric isolation. X They are also required to perform diagnostic, X Improvements are required to reduce the cost of the protection and feedback functions. At present, discrete dielectric isolation fabrication process. IGBTs are used for power delivery while smart PICs X On-going development on direct wafer bonding has are used to provide to the controlling functions. showed promise in providing a cost effective process. X The requirement of factory automation are very similar to those of variable speed motor drives.

University of Toronto 8-69 University of Toronto 8-70

ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Appliance Controls X The main benefit of utilizing smart PICs in appliance X Smart PICs are required for a large variety of control is to provide improvements in performance and entertainment systems such as CD players, tape efficiency. recorders, VCRs, etc. X On-board sensors can also provide more precise X For example, a monolithic motor control IC that controls (e.g. temperature settings). regulates the speed of the motor while minimizing X Simple house appliance such as , washing power losses is essential to all battery-operated machines, irons, rice are appearing with consumer entertainment systems. smart PICs for this reason. X The development of improved lateral power devices X General Electric has been pursing this technology with greater power density is required to increase the since the 1980's. Since then, their small appliance efficiency of this technology. division was sold to Black & Decker. X Motorola, Texas Instruments, Philips, and SGS Thomson are the major suppliers in this market.

University of Toronto 8-71 University of Toronto 8-72 ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Lighting Controls Smart House X Traditional fluorescence lights use mechanical ballast X The concept of smart house is getting increasing (transformer) for start-up. attention due to advances in smart power technology X The electrical characteristics of fluorescence lights that are driving the cost down for the control module. vary drastically from start-up to normal operation. X A smart house systems requires the development of a X In order to provide better efficiency and life for a multiplexed network with smart power modules to lighting system, more precision control is needed. control loads such as , furnaces, air- X The cost of electronic fluorescence light ballast conditioners, lights, and small appliances. implemented using smart PICs can easily be justified X The development of such systems is gaining by the savings in energy and maintenance. momentum in Europe and Japan. X In addition, the incorporation of smart PIC technology X Some of the companies participating in the enables control of the light by a central computer, development of this technology are Philips, Siemens, further enhance the energy saving in commercial SGS Thomson, Mitsubishi, Toshiba, Hitachi, and buildings. Matsushita.

University of Toronto 8-73 University of Toronto 8-74

ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Aircraft Electronics (Avionics) X The concept of fly-by-wire, where the hydraulic X One of the biggest anticipated market for smart PICs actuators in aircraft are replaced by electromechanical is automotive electronics. actuators, is gaining acceptance among X In the 1960's to 1970's, there was a slow acceptance manufacturers. of the use of discrete devices and analog ICs for X The success in development will depend on the automotive applications. availability of smart PIC technology to perform the X In the 1980's, digital ICs and microprocessors were control within a small size and weight incorporated. X The power switches must be extremely reliable, X In the 1990's smart PICs are already being used to capable of operating at high voltage and current levels create a multiplexed control network in the car to with low on-state voltage drop. reduce the size and weight of the wiring harness. X MOS-gated devices are essential for compact PICs. X The smart PIC modules control loads such as lights X Boeing and Airbus are example of manufacturers and motors while providing protection functions. pursing this technology.

University of Toronto 8-75 University of Toronto 8-76 ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Automotive Electronics (cont’d) 7.6 Future Trends X This has greatly enhanced fault management and X Smart PICs provide local signal processing and diagnostics capability. communication capabilities. X By the year 2000, it is estimated that an average X The smart PICs accept commands from the CPU via automobile will contain US$2000 worth of the interface bus, delivers power to the actuators and with smart PIC chips account for half returns information on positions, and load conditions.

of this market. High Voltage Printed Circuit Board Drive Signals X This technology demands improvement in the power + MOSFETs structures and designs to increase power − density and reduce power losses. +

− X Examples of companies involved in this market are Discrete Motor Digital Interface Analog Drive Power Transistors To Interface Network Motorola, Texas Instruments, Philips, Siemens, Circuits & Siliconix, and SGS Thomson. Sense Circuits

Potential for complete integration onto a single PIC chip

University of Toronto 8-77 University of Toronto 8-78

ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Future Trends (cont’d) Future Trends (cont’d) X In situations where multiple actuators are required, it X Specialized packaging and thermal issues. is more logical to centralize the controlling functions by a host Central Processing Unit (CPU).

Host Computer Motion CPU Controller

Interface Bus

Smart Smart … Smart PIC PIC PIC

Servo Solenoid Servo or Motor Motor

University of Toronto 8-79 University of Toronto 8-80 ECE1393F Nov. 16, 2004 ECE1393F Nov. 16, 2004 Future Trends (cont’d) References

X On-resistance and breakdown voltage optimization. X B. Murari, F. Bertotti, G.A. Vignola, “Smart Power ICs 12V 50V 250V Technologies and Applications,” Springer-Verlag, 1995. ISBN 3-540-60332-8 BCD BCD D 0 to 12V NPN (h = 30) Portable, Signal fe SOI SOI X P. Antognetti, “Power Integrated Circuits : Physics, Design, and 10 Processing DMOS Applications,” McGraw-Hill, 1986. (0.6µm) D 12 to 50V ISBN 0070021295 or TK7881.15 .P68 1986

) Automotive, Audio, 2 DMOS (1.2µm) Motor Control X Peter Van Zant, “Microchip Fabrication, 3rd Ed.,” McGraw Hill, DMOS D 50 to 250V 1997. 1 (4µm) Motor Control,

J (A/mm ISBN 0-07-067250-4 ICVPNP DMOS Telecommunication Bipolar (2.5µm) CMOS D Above 250V X S.M. Sze, “VLSI Technology 2nd Ed.,” McGraw Hill, 1998. CMOS BCD Lamp Ballast, ISBN 0-07-100347-9 BCD SOI AC Motor, Power SOI 0.1 Supply 10 100 1000

BVDSS, BVCEO (V) University of Toronto 8-81 University of Toronto 8-82