Application Note: Jitter Analysis

Application Note Jitter Analysis Basic Classification of Jitter Components using Sampling Scope MP2100A BERTWave Series Contents 1. Introduction ................................................................................................................................ 2 2. What is Jitter? ............................................................................................................................ 3 3. Purpose of Jitter Measurement .................................................................................................. 4 4. Need for Separation and Definition of Jitter Components ........................................................... 7 5. Measurement Methods using MP2100A .................................................................................. 14 6. Summary ................................................................................................................................. 21 1. Introduction To cope with the rapid increases in data volumes, data centers are introducing high-speed interconnects between servers with transmission speeds faster than 10 Gbit/s. However, in conflict with these speed increases, there is increasing demand for lower power consumption as well as cost reductions. Furthermore, higher jitter levels and degraded waveforms are becoming a problem. Various measuring instruments, such as sampling scopes (Eye Pattern analyzer) and BERTs are being used to classify and analyze jitter components, such as DJ, RJ, etc., that affect communications quality over Fibre Channel, Infiniband, 10GbE, USB, PCI, etc., high-speed serial transmission standards used in data communications and computing. Sections 2 to 4 of this application note explain the historical background to Jitter analysis and define the measurement items; section 5 outlines actual measurement methods using the Anritsu MP2100A Sampling Scope functions. 2 2. What is Jitter? Jitter is fluctuation in the time-axis direction of a digital signal. When this fluctuation is in a long-term cycle, or more specifically less than 10 Hz, it is called "wander", and when the fluctuation is in a cycle above 10 Hz, it is called "jitter". Figure 2-1 shows an ideal signal and a signal containing jitter with a sine-wave component (see section 4.2 Sinusoidal Jitter for more details). As shown, the jitter component reduces the phase margin of digital signals, causing errors. Avoidance of signal errors requires accurate measurement of jitter caused by devices. Ideal signal Signals with fluctuation Tj = 1/fm Sine-wave jitter component (fluctuation frequency Tj, modulation frequency fm) Figure 2-1. Jitter Modulation Frequency As well as expressing the amount of jitter in time units, such as ps and ns, jitter can also be expressed as the Unit Interval (UI). The UI is the proportion of jitter per bit and is calculated using Eq. 2-1 where the jitter amount is represented as Tj [ps], and the interval per bit is represented as Tbit [ps]: 푇 퐽푖푡푡푒푟 = 푗 [푈퐼] Eq. 2-1 푇푏푖푡 For example, using a 10 Gbit/s signal, the interval per bit is 100 ps. If there is jitter of 10 ps in this signal, the amount of jitter is calculated as 0.1 UI. 3 3. Purpose of Jitter Measurement Why is it necessary to measure jitter in the first place? To understand this, it is necessary to understand the relationship between Output Jitter (Jitter Generation), Jitter Tolerance, and Jitter Transfer. Figure 3-1 outlines a simplified TRx system, showing the Clock Data Recovery block in the receiver. TP1: Output Jitter TP2: Output Jitter TP3: Jitter Tolerance Transmitter Transmission Line Receiver Data Data Data1 Limit. Decision Amp. Circuit PLL Clock recovery Clock Figure 3-1. Simplified TRx System and CDR - Output Jitter (Jitter Generation) The amount of jitter generated by the Device Under Test (DUT) is called the Output Jitter (Jitter Generation). The ITU-T, which regulates standards such as SONET/SDH in the telecommunications field, defines the Jitter Generation as the amount of jitter produced by devices and equipment. In traditional measurement method, a dedicated jitter measuring instrument is used to recover the Clock signal from the Data signal output by the DUT and the jitter components are extracted from the Clock signal by demodulation using the fm detection method as well as by adding specified band limits. For example, using the 9.95328 Gbit/s OC-192/STM-64 standard, the measurement target is the 50 kHz to 80 MHz (B1 band) and the 4 MHz to 80 MHz (B2 band); the total in-band jitter is measured as the rms and peak-to-peak value, without analyzing the each jitter component. Data Signal Jitter Result SONET/SDH Jitter Analyzer - Limited bandwidth (80 MHz @ 10 G) - Jitter vs time - Jitter rms or Jitter p-p - Maximum jitter for 60 s total Figure 3-2. SONET/SDH Jitter Measurement Instrument (MP1590B) 4 However, in the fields of data communications and computing, such as Fibre Channel，10GbE，SATA/SAS， USB，PCIe, etc., jitter is not measured by recovering the Clock, but instead, the amount of jitter in the Data signal is measured directly. Typical measuring instruments for this procedure are the sampling oscilloscope (Eye Pattern analyzer), real-time oscilloscope，Bit Error Rate Tester (BERT)，time interval analyzer, etc. Each measurement is different, depending on the instrument, but a common feature to all methods is the division of jitter into its component parts, such as Deterministic Jitter (DJ), Random Jitter (RJ), etc. This application note explains this jitter separation and analysis. Oscilloscope - Jitter Histogram Data Signal - BER Bathtub BERT - Jitter Separation Time Interval Analyzer TJ, DJ, RJ, etc. Figure 3-3. Jitter Measurement Instruments for Datacoms/Computing Fields (Anritsu MP1800A (left), Anritsu MP2100A (right)) - Jitter Tolerance The ability and degree to which a receiver can withstand jitter in the received Data signal and the maximum permissible value is defined as the Jitter Tolerance. An error occurs when the input jitter value exceeds the Jitter Tolerance of the receiver. Since jitter can also be generated by the transmission path as well as by the transmitter (TP1 in Figure 3-1), the aggregate jitter (TP2 in Figure 3-1) should be less than the Jitter Tolerance of the receiver (TP3 in Figure 3-1). The various communications standards for FC, Infiniband， PCIe, etc., regulate the upper limit of the transmitter Output Jitter so as not to exceed the receiver Jitter Tolerance. - Jitter Transfer The Clock Data Recovery (CDR) circuit is a key block in the receiver. It recovers the Clock from the received Data signal using the PLL circuit and regenerates the Data retimed with the recovered Clock. Clock recovery suppresses jitter and the suppression ratio is defined as Jitter Transfer. Jitter Transfer is a function of the jitter modulation frequency and is usually expressed in dB units. Jitter exceeding a jitter modulation frequency, depending on the PLL band, can be suppressed and—in principle—the suppression ratio increases as the jitter modulation frequency increases. 퐽표푢푡(푓) 퐽푖푡푡푒푟 푇푟푎푛푠푓푒푟(푓) = 20 × 푙표푔 ( ) [dB] Eq. 3-1 퐽푖푛(푓) 5 5 0 -5 -10 -15 Jitter Transfer [dB] -20 10 100 1000 SJ Freq [kHz] Figure 3-4. Example of Jitter Transfer Measurement Result The factor influencing the actual Jitter Tolerance of the receiver is this CDR circuit, but speaking more precisely, it is the design of the PLL band and the phase margin of the Decision Circuit. If the jitter modulation frequency of the recovered clock is sufficiently lower than the PLL band, the jitter is broadly the same as the jitter in the original signal and since the variation is synchronized with the Data signal too, the Decision Circuit (Flip-Flop) phase margin is not exceeded. However, if the jitter modulation frequency exceeds the PLL band, this causes a difference in the amount of jitter in the Clock and Data signals, causing a difference in the phase margin. If this phase difference exceeds the phase margin of the Decision Circuit, an error results. To prevent this, jitter must be measured at the design and manufacturing stages to ensure that the total of the transmitter Output Jitter and jitter generated by the transmission circuit does not exceed the phase margin of the receiver Decision Circuit. 6 4. Need for Separation and Definition of Jitter Components Most communications systems require an error rate of 1E-12 or less to assure communications quality. As a result, the amount of jitter must also meet the standards for bit counts to assure error rates of 1E-12 or less. For example, when measuring jitter at transmission speeds of 10 Gbit/s, it is necessary to measure for 100 s using a BERT to capture 1E+12 bits and determine the maximum value. Using a sampling scope, which generally has a sampling speed on the order of 30 to 100 ksps, assuming a speed of 100 ksps, measurement will require 10,000,000 s, which is an impractically long time. Consequently, the working group on Fibre Channel MJSQ (Methodologies for Jitter and Signal Quality Specification) examining FC jitter measurement methods proposed a method for estimating jitter equivalent to a BER of 1E-12 using a small measurement sample obtained by short-term measurement. This analysis was split into two jitter components called Deterministic Jitter (DJ) and Random Jitter (RJ). Additionally, the DJ division was further subdivided into a second level analysis called Level 2 Jitter (Figure 4-1). TJ 1 Total Jitter evel evel L RJ DJ Random Jitter Deterministic Jitter PJ DDJ BUJ 2 Periodic Jitter Data Dependent Jitter Bounded Uncorrelated

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