A 45 Nm CMOS Avalanche Photodiode with 8.4-Ghz Bandwidth

micromachines

Article A 45 nm CMOS Avalanche Photodiode with 8.4-GHz Bandwidth

Wenhao Zhi 1, Qingxiao Quan 2, Pingping Yu 1 and Yanfeng Jiang 1,*

1 School of IoT Engineering, Jiangnan University, Wuxi 214122, China; [email protected] (W.Z.); [email protected] (P.Y.) 2 Haobang high-tech Co. LTD, Wuxi 214074, China; [email protected] * Correspondence: [email protected]

Received: 20 November 2019; Accepted: 3 January 2020; Published: 7 January 2020

Abstract: Photodiode is one of the key components in optoelectronic technology, which is used to convert optical signal into electrical ones in modern communication systems. In this paper, an avalanche photodiode (APD) is designed and fulfilled, which is compatible with Taiwan Semiconductor Manufacturing Company (TSMC) 45-nm standard complementary metal–oxide–semiconductor (CMOS) technology without any process modification. The APD based on 45 nm process is beneficial to realize a smaller and more complex monolithically integrated optoelectronic chip. The fabricated CMOS APD operates at 850 nm wavelength optical communication. Its bandwidth can be as high as 8.4 GHz with 0.56 A/W responsivity at reverse bias of 20.8 V. Its active area is designed to be 20 20 µm2. × The Simulation Program with Integrated Circuit Emphasis (SPICE) model of the APD is also proposed and verified. The key parameters are extracted based on its electrical, optical and frequency responses by parameter fitting. The device has wide potential application for optical communication systems.

Keywords: CMOS compatible technology; avalanche photodiode; SPICE model; bandwidth; high responsivity; silicon photodiode

1. Introduction As one of the promising photoelectric sensors, avalanche photodiode (APD) breaks the limitations of electrical interconnects, which results in high-speed, dense, and low-power interconnects [1]. It has become one of the research hotspots in the field of optical communication in recent years [2]. Avalanche photodiodes are widely used in optical communication systems and optical interconnection equipment, such as local area network, chip-to-chip, and board-to-board interconnect [3]. As one of them, 850 nm optical interconnects are actively being investigated, because 850 nm can be easily available as light sources in the high-speed optical interconnects [4,5]. The monolithically integrated high speed 850 nm wavelength silicon APDs based on standard complementary metal–oxide–semiconductor (CMOS) technology are particularly attractive because of significant advantages in cost, power, and performance that CMOS technology brings [6]. However, the optical absorption coefficient of silicon is fairly low at 850 nm. Since in standard CMOS technology, the silicon substrate is thicker than the penetration depth of light, which generates a large number of carriers in the silicon substrate and diffuses around [6]. Secondly, the maximum support voltage is reduced as the CMOS technology shrinks, which limits the reverse bias voltage for the integrated APDs [7]. Several approaches have been proposed to overcome the deficiencies and improve the performance of CMOS silicon technology. In [8], Huang et al. fabricated a silicon photodiode in standard 0.18 µm CMOS technology. The basic structure of proposed photodiode is formed by multiple p-n diodes with shallow trench isolation (STI) between p and n region. The fabricated photodiode demonstrates

Micromachines 2020, 11, 65; doi:10.3390/mi11010065 www.mdpi.com/journal/micromachines Micromachines 2020, 11, 65 2 of 7

Micromachines 2020, 11, x FOR PEER REVIEW 2 of 8 the 3 dB bandwidth of 1.6 GHz and a high responsivity of 0.74 A/W. In order to reduce the limit of − bandwidth,photodiode Lee demonstrates [9] proposed the a spatially −3 dB bandwidth modulated of avalanche1.6 GHz and photodiode a high responsivity (SM-APD), of 0.74 which A/W. showed In a bandwidthorder to ofreduce 12 GHz the limit and of responsivity bandwidth, Lee of 0.03[9] pr Aoposed/W. Iiyama a spatially et al. modulated fabricated avalanche a triple-well photodiode structure Si photodiode(SM-APD), withwhich standard showed a 0.18 bandwiµm CMOSdth of 12 process GHz and [10 ].responsivity The N+ and of P0.03+ layers A/W. areIiyama alternatively et al. arrangedfabricated and a then triple-well the electrodes structure are Si photodiode interdigital with structure. standard The 0.18 device μm CMOS shows process a 10 GHz[10]. The bandwidth N+ withand 0.05 P+ A layers/W responsivity are alternatively [10]. arranged Deep N-well and then CMOS the electrodes technology are interdigital can greatly structure. improve The the device electrical isolationshows performance a 10 GHz bandwidth between with diﬀerent 0.05 A/W circuit respon blocks,sivity which [10]. isDeep especially N-well importantCMOS technology for integrating can RF-to-basebandgreatly improve mixed-mode the electrical circuits isolation in a performa single chip.nce between The device different with Deepcircuit N-wellblocks, structurewhich is can especially important for integrating RF-to-baseband mixed-mode circuits in a single chip. The device substantially increase the cut-oﬀ frequency. In the paper [11], Chou et al. used extra bias on the Deep with Deep N-well structure can substantially increase the cut-off frequency. In the paper [11], Chou N-wellet al. in standardused extra CMOS bias on technology, the Deep N-well which achievedin standard a highCMOS bandwidth technology, (8.7 which GHz) achieved with a responsivity a high of 0.05bandwidth A/W under (8.7 GHz) a 11.45 with V bias.a responsivity of 0.05 A/W under a 11.45 V bias. In thisIn this paper, paper, a P-well a P-well/Deep/Deep N-well N-well APD APD based based on on 45 45 nm nm CMOS CMOS technology technology is is proposed. proposed. TheThe light current,light dark current, current, dark current, responsivity, respon andsivity, photodetection and photodetection frequency freque responsency response are measuredare measured based based on the fabricatedon the APDfabricated device. APD The device. results The showresults that show the that fabricated the fabricated APD APD presents presents a high a high responsivity responsivity and a highand bandwidth. a high bandwidth. The 8.4GHz The 8.4 bandwidth GHz bandwidth is available is available at 850 at nm 850 with nm 0.56with A0.56/W A/W responsivity. responsivity. Finally, the keyFinally, parameters the key parameters of APD are of extracted APD are fromextracte thed frequencyfrom the frequency response. response. A SPICE A model SPICE ismodel established is for futureestablished integrated for future circuit integrated design circuit and simulation. design and simulation.

2. Design2. Design and and Analysis Analysis of of CMOS CMOS Compatible Compatible Avalanche Photodiode Photodiode (APD) (APD) P-well/Deep N-well structure is considered to be the most suitable structure for fabricating P-well/Deep N-well structure is considered to be the most suitable structure for fabricating CMOS CMOS photodiodes [12]. J. Goy et al. compared various photodiode structures, such as N-well/P- photodiodes [12]. J. Goy et al. compared various photodiode structures, such as N-well/P-substrate substrate structure, N+/P-substrate structure, and N+/P-well structure. The results indicated that the structure,P-well/Deep N+/P-substrate N-well structure structure, can andimprove N+/P-well the respon structure.sivity while The results reducing indicated the parasitic that thecapacitance P-well/Deep N-well[12]. structure can improve the responsivity while reducing the parasitic capacitance [12]. 2 2 TwoTwo types types of APDs,of APDs, with with di differentﬀerent active active areas,areas, 20 × 2020 μµmm2 andand 5050 × 50 50μmµ2,m are, arefabricated, fabricated, × × separately.separately. Figure Figure1 shows 1 shows the the schematic schematic structure structure of of the the 2020 × 2020 μµmm2 CMOS2 CMOS APD APD device. device. The Thesize of size of × 50 5050 ×µ 50m 2μdevicem2 device is proportionalis proportional to to the the20 20 × 2020 µμm22. .The The design design is iscompatible compatible with with TSMC TSMC 45 nm 45 nm × × standardstandard CMOS CMOS technology technology without without any any process process modiﬁcation modification or special or special substrate. substrate. The The APD APD is realized is by verticalrealized P-well by vertical/Deep P-well/Deep N-well with N-well shallow with trench shallow isolation trench isolation (STI). (STI).

Cathode

P+ Anode N+ P+ N+ S S S S S S T T 0.5μm T 1.5μm T 6μm T T I I P-well I I 7.9×1017cm-3 I I 1μm 1.2μm Deep N-well 2.36×1017cm-3 20μm P-substrate 1×1015cm-3

Figure 1. StructureFigure 1. Structure of the designed of the designed complementary complementary metal–oxide–semiconductor metal–oxide–semiconductor (CMOS) (CMOS) avalanche avalanche photodiode. photodiode. The contribution of slow diffusion photo-generated carriers in the P-substrate region can be excluded by the DeepThe N-wellcontribution [13]. of Moreover, slow diffus theion P-substrate photo-generated is grounded carriers or in connected the P-substrate to a negative region can potential, be whichexcluded can effectively by the Deep absorb N-well slow [13]. diffusion Moreover, photo-generated the P-substrate is grounded carriers. Asor connected a result, theto a P-wellnegative/Deep N-wellpotential, shows which a better can performance effectively absorb in photodetection slow diffusion bandwidth photo-generated than N-well carriers./P-substrate As a result, photodiode. the P- well/Deep N-well shows a better performance in photodetection bandwidth than N-well/P-substrate When the reverse bias voltage is high, the electric field of the p-n junction increases rapidly. Because photodiode. of curvature effect, the local electric field is increased, which makes the edge of the photodiode easily to When the reverse bias voltage is high, the electric field of the p-n junction increases rapidly. breakdownBecause [of14 ].curvature It has a detrimentaleffect, the local effect electric on the field stability is increased, and performance which makes of CMOSthe edge photodiodes. of the The most common method to prevent photodiode edge breakdown is to use a guard ring structure [15].

In this paper, STI with width of 0.15 µm is used as the guard ring (the junction depth is about 0.5 µm). Micromachines 2020, 11, x FOR PEER REVIEW 3 of 8

photodiode easily to breakdown [14]. It has a detrimental effect on the stability and performance of MicromachinesCMOS photodiodes.2020, 11, 65 The most common method to prevent photodiode edge breakdown is to use a 3 of 7 guard ring structure [15]. In this paper, STI with width of 0.15 μm is used as the guard ring (the junction depth is about 0.5 μm). The STI can improve the reverse bias by mitigating the premature The STI can improve the reverse bias by mitigating the premature edge breakdown during avalanche. edge breakdown during avalanche. A high reverse bias provides better avalanche gain and higher A high reverse bias provides better avalanche gain and higher responsivity. responsivity. µ To investigateTo investigate its characteristics,its characteristics, a 100a 100W, μW, 850 850 nm, nm, 10 Gb10 /sGb/s VCSEL VCSEL modulated modulated by Agilentby Agilent E8257D signalE8257D generator signal isgenerator used as is the used light as the source. light source. Figure Figure2 shows 2 shows I-V characterizations I-V characterizations of theof the APDs APDs under lightunder and light dark and environments, dark environments, separately. separately. All APDs All APDs show show very very low low dark dark currents, currents, whichwhich being being less thanless 0.1 than nA before0.1 nA the before avalanche the avalanche breakdown. breakdown. Due to Due the to inﬂuence the influence of the of STI the structure, STI structure, the avalanche the breakdownavalanche voltage breakdown is increased voltage fromis increased 14.5 V from to 21.5 14.5 V. V When to 21.5 the V. reverseWhen the bias reverse approaches bias approaches the avalanche breakdownthe avalanche voltage breakdown of 21.5 V,voltage the dark of 21.5 current V, the begins dark current to increase begins sharply to increase because sharply of because the occurrence of of thethe avalancheoccurrence breakdown.of the avalanche The breakdown. 50 50 µ Them2 APD50 × 50 active μm2 APD area active is larger areathan is larger 20 than20 µ20m ×2 ,20 so the 2 ×2 × photocurrentμm , so the of photocurrent 50 50 µm of2 APD50 × 50 is μ alsom APD larger. is also larger. ×

-2 -2 10 10 2 2 50×50m Ilight -3 50×50m Ilight -3 10 2 10 2 50×50m I 50×50m Idark dark -4 2 -4 2 10 20×20 m I 10 20×20m Ilight  light 2 -5 2 -5 20×20m Idark 10 20×20m I 10 dark 10-6 10-6 10-7 10-7 10-8 -8 10 10-9

-9 current(A) Anode Anode current(A) 10 10-10 10-10 10-11 10-11 10-12 03691215 0 2 4 6 8 10 12 14 16 18 20 22 Anode voltage(V) Anode voltage(V)

(a) (b)

FigureFigure 2. Electrical2. Electrical responses responses ofof thethe avalancheavalanche photodiodes photodiodes (APDs) (APDs) with with different diﬀerent sizes sizes (a) without (a) without shallowshallow trench trench isolation isolation (STI); (STI); ( b(b)) with with STI.STI.

ResponsivityResponsivity is is defined defined as as the the photocurrentphotocurrent per per incident incident optical optical power, power, which which is determined is determined by by thethe current current under under illumination illumination minus minus thethe dark curre currentnt [16]. [16 ].Figure Figure 3 shows3 shows the the avalanche avalanche gain, gain, and and thethe responsivity responsivity obtained obtained from from thethe measured measured I-V I-V ch characterization.aracterization. The dark The darkcurrent current will increases will increases to the same level as the photocurrent when the avalanche breakdown occurs. In order to reduce the to the same level as the photocurrent when the avalanche breakdown occurs. In order to reduce the influence of the dark current noise, the operating point should be slightly less than 21.5 V. influenceConsidering of the all dark the currentrelated aspects, noise, the the operating operating point is should set to be be 20.8 slightly V, and less the than gain 21.5is about V. Considering 23 dB. all theDue related to the STI aspects, structure, the operating the reverse point bias is signif set toicantly be 20.8 improved. V, and the As gain the reverse is about bias 23 dB.increases, Due to the the STI structure,photocurrent the reverse and the bias responsivity is significantly of APDs improved. are improved As theobviously. reverse When bias increases,the reverse thebias photocurrent voltage andis the 20.8 responsivity V, the responsivity of APDs of the are APD improved with area obviously. of 50 × 50 When μm2 is the 0.59 reverse A/W. On bias the voltage same condition, is 20.8 V, the responsivitythe responsivity of the APDof the withAPD areawith ofarea 50 of 2050 ×µ 20m 2μism2 0.59 is 0.56 A/ W.A/W. On the same condition, the responsivity × of theMicromachines APD with 2020 area, 11, x of FOR 20 PEER20 REVIEWµm2 is 0.56 A/W. 4 of 8 ×

60 1 50×50m2 2 50 20×20m

30 0.1

Responsivity(A/W) Avalance gain(dB) 10

0 0.01 0 6 12 18 24 Reverse bias voltage(V)

FigureFigure 3.3. OpticalOptical responses responses of of the the APDs. APDs.

Figure 4 shows the frequency response of the two APDs with different active areas. The bandwidth of 50 × 50 μm2 is much lower than that of 20 × 20 μm2. With the increasing of the active area, the parasitic capacitance and the carrier transit time increase accordingly, which deteriorates the frequency property. The APD with active area of 20 × 20 μm2 shows a bandwidth of 8.4 GHz at a reverse bias of 20.8 V.

-1

-2

-3

-4

-5 50×50m2 Normalized responses(dB) Normalized 20×20m2 -6 0.1 1 5 10 Frequency(GHz)

Figure 4. The frequency response of the fabricated APDs.

3. The SPICE Model of the CMOS APD In order to better understand the photodetection frequency response characterization of the CMOS APD, the SPICE model is set up in the section. We have adjusted and optimized the SPICE model proposed in reference [16] to fit the proposed structure in the paper. The values of the key parameters are extracted from the results of Figures 2–4 by parameter fitting. For the parameter fitting, the initial value comes from the theoretical equation and then is manually modified. Figure 5 shows the updated SPICE model based on the detailed structure of the device. The active part is composed by an inductor and a resistor in series, a resistor in parallel and a capacitor. The capacitor C denotes the capacitance of the depletion region. Resistor Rl denotes the resistance of the depletion region [17]. Inductor La indicates the phase delay between the current and voltage caused by the impact ionization [17]. Series resistor Ra indicates reverse saturation current and field-dependent velocity [17]. Rnw

Micromachines 2020, 11, x FOR PEER REVIEW 4 of 8

60 1 50×50m2 2 50 20×20m

30 0.1

20 Responsivity(A/W) Avalance gain(dB) 10

0 0.01 0 6 12 18 24 Reverse bias voltage(V) Micromachines 2020, 11, 65 4 of 7 Figure 3. Optical responses of the APDs.

FigureFigure4 shows 4 shows the frequency the frequency response response of the of two the APDs two withAPDs di withﬀerent different active areas.active Theareas. bandwidth The 2 2 of 50bandwidth50 µm ofis 50 much × 50 μ lowerm2 is much than thatlower of than 20 that20 ofµm 20 .× With20 μm the2. With increasing the increasing of the of active the active area, the × × parasiticarea, capacitancethe parasitic andcapacitance the carrier and transit the carrier time transi increaset time accordingly, increase accordingly, which deteriorates which deteriorates the frequency property.the frequency The APD property. with active The APD area with of 20 active20 µaream2 ofshows 20 × 20 a bandwidthμm2 shows a of bandwidth 8.4 GHz atof a8.4 reverse GHz at bias a of × 20.8reverse V. bias of 20.8 V.

-1

-2

-3

-4

-5 50×50m2 Normalized responses(dB) Normalized 20×20m2 -6 0.1 1 5 10 Frequency(GHz)

Figure 4. The frequency response of the fabricated APDs. Figure 4. The frequency response of the fabricated APDs. 3. The SPICE Model of the CMOS APD 3. The SPICE Model of the CMOS APD In order to better understand the photodetection frequency response characterization of the CMOS In order to better understand the photodetection frequency response characterization of the APD, the SPICE model is set up in the section. We have adjusted and optimized the SPICE model CMOS APD, the SPICE model is set up in the section. We have adjusted and optimized the SPICE proposedmodel in proposed reference in [16reference] to fit the[16] proposed to fit the propos structureed structure in the paper. in the The paper. values The of values the key of the parameters key are extractedparameters from are extracted the results from of the Figures results2– 4of by Figure parameters 2–4 by fitting.parameter For fitting. the parameter For the parameter fitting, fitting, the initial valuethe comes initial from value the comes theoretical from the equation theoretical and equation then is and manually then is modified.manually modified. Figure5 shows Figure the5 shows updated SPICEthe model updated based SPICE on model the detailed based on structure the detailed of the struct device.ure of The the active device. part The is active composed part is bycomposed an inductor and aby resistor an inductor in series, and a aresistor resistor in inseries, parallel a resistor and ain capacitor. parallel and The a capacitor. capacitor The C denotes capacitor the C denotes capacitance the capacitance of the depletion region.R Resistor Rl denotes the resistance of the depletion region [17]. L of theMicromachines depletion 2020 region., 11, x FOR Resistor PEER REVIEWl denotes the resistance of the depletion region [17]. Inductor5 of 8 a indicatesInductor the L phasea indicates delay the between phase delay the currentbetween andthe current voltage and caused voltage by caused the impact by the ionization impact ionization [17]. Series [17]. Series resistor Ra indicates reverse saturation current and field-dependent velocity [17]. Rnw resistorindicatesRa indicates the Deep reverse N-well saturation resistance. current Rsub indicates and field-dependent the substrate resistance. velocity [ 17Csub1]. Rdenotesnw indicates the the

Deepcapacitance N-well resistance. between Deep Rsub N-indicateswell and the P-substrate substrate [18]. resistance. Rsub and CCsub2sub1 aredenotes caused by the the capacitance parasitic effects between of P-substrate [18]. The effect of the photo-generated slow carrier transit time is denoted by the Deep N-well and P-substrate [18]. Rsub and Csub2 are caused by the parasitic eﬀects of P-substrate [18]. current source ftr [16]. The eﬀect of the photo-generated slow carrier transit time is denoted by the current source ftr [16]. Anode Cathode SiO2 ftr ftr SiO2 N+ P+ N+ P+ N+ S S S S S S T T La C T T C La T T I I Ra I I Ra I I Rl Rl Rnw Rnw Rnw Rnw

Csub1 Deep N-well Csub1 Csub1 Csub2 Rsub Csub2 Rsub Csub2 Rsub P-substrate

FigureFigure 5. Simulation 5. Simulation Program Program with with IntegratedIntegrated Circui Circuitt Emphasis Emphasis (SPICE) (SPICE) model model of the of CMOS the CMOS APD. APD.

FigureFigure6 shows 6 shows the the extracted extracted parameter parameter valuesvalues forfor the simulation. simulation. The The values values of L ofa, CL,a and, C, andRnw Rnw are calculatedare calculated by by the the following following equations. equations.

𝐿 =𝜏/(2𝛼′𝐼), 𝐶=𝜀𝐴/𝑊, 𝑅 ≈𝑊/2𝐴𝜀𝜈

where 𝜏 is the transit time across the avalanche region, α’ is the derivative of the ionization coefficient with respect to the electric field, 𝐼 is the bias current, 𝜀 is the semiconductor permittivity, A is the cross sectional area, 𝑊 is the depletion region width, 𝑊 is the drift region width, and 𝜈 is the saturation [19]. The ftr is estimated as 𝑓 ≈ (1⁄)(2𝜋𝜏) , and 𝜏 is expressed as 𝜏 ≈4L/(𝜋 D), where L is the diffusion length, D is the diffusion coefficient [20]. Later, these parameters will be re-corrected by the parameter fitting of the measured reflection coefficients and the frequency response. The reflection coefficients were measured by a vector network analyzer (Agilent E8362B) under a 100 μW, 850 nm, 10 Gb/s optical signal. From the measured reflection coefficients (shown in Figure 7a), Y-parameters and Z-parameters were calculated. Ra and Rl were extracted by the calculated Z- parameters. Ra and Rl were also re-corrected by parameter fitting. Then using ADS to perform parameter fitting of SPICE model to obtain the values of other parameters and manually modify them. The extracted parameters for Rl, La, and Ra are the same for all prepared devices. Rl is defined as the voltage to current ratio near 0 V. The slope of the I-V characterization for all APD is shown in Figure 2, making Rl the same for prepared devices. La does not vary with device area at the same bias voltage, because the prepared APDs have the same avalanche multiplication characteristics based on the P-well/Deep N-well junction and guard ring as shown in Figure 2. Ra denotes the series resistance associated with the avalanche inductor La, which determines the quality factor of the avalanche inductance [17]. It is not directly related to the device area. The junction capacitance C is proportional to the area. Csub1 and Csub2 are also proportional to the area. Rnw and Rsub do not change much because the increase in lateral resistance makes up for the decrease in vertical resistance.

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La = τa/(2α0I ), C = εsA/WD, Rnw W /2Aεsνs 0 ≈ d where τa is the transit time across the avalanche region, α’ is the derivative of the ionization coeﬃcient with respect to the electric ﬁeld, I0 is the bias current, εs is the semiconductor permittivity, A is the cross sectional area, WD is the depletion region width, Wd is the drift region width, and νs is the saturationMicromachines [19]. 2020, 11, x FOR PEER REVIEW 6 of 8

Anode Extracted parameters 20×20 50×50 La La (nH) 12 12 C R (Ω) 130 130 Micromachines 2020, 11, x FOR PEER REVIEWR R a 6 of 8 a l Rl (MΩ) 1.2 1.2 ftr C (fF) 137 760 Rnw Extracted parameters Anode Rnw (Ω) 45 28 20×20 50×50 Csub1 Csub1 (fF) 39 220 La (nH) 12 12 La Csub2 (fF) 56 363 Csub2 RCsub Ra (Ω) 130 130 R R Rsub (Ω) 230 186 a l Rl (MΩ) 1.2 1.2 ftr f tr (GHz) 3.6 1.3 R C (fF) 137 760 nw R (Ω) 45 28 FigureFigure 6. 6.SPICE SPICE modelmodel and the the extracted extractednw parameters parameters of the of theAPD. APD. Csub1 Csub1 (fF) 39 220 Figure 7 shows the difference between experimentCsub2 (fF) and simulation 56 363 of the reflection2 2 coefficients The ftr is estimated as ftrCsub2(1/(2πτtr))R,sub and τtr is expressed as τtr 4L / π D , where L is the ≈ R (Ω) 230 186≈ diffusionand frequency length, Dresponseis the di characterization,ffusion coefficient respectively. [20]. Later,sub Based these on parametersthe comparison will shown be re-corrected in Figure 7, by the f tr (GHz) 3.6 1.3 parameterthe simulation fitting ofresult the measuredbased on the reflection SPICE model coeffi coincidescients and with the the frequency experiment response. ones, showing the accuracy of the proposed SPICE model. The reflection coeffiFigurecients 6. wereSPICE measuredmodel and the by extracted a vector parameters network of analyzer the APD. (Agilent E8362B) under a 100 µW, 850 nm, 10 Gb/s optical signal. From the measured reflection coefficients (shown in Figure 7 shows the difference between experiment and simulation of the reflection coefficients Figure7a), Y-parameters and Z-parameters were calculated. Ra and Rl were extracted by the calculated and frequency response characterization, respectively. Based on the comparison shown in Figure 7, Z-parameters. Ra and Rl were also re-corrected by parameter fitting. Then using ADS to perform the simulation result based on the SPICE model coincides with the experiment ones, showing the parameter fitting of SPICE model to obtain the values of other parameters and manually modify them. accuracy of the proposed SPICE model.

(a) (b)

Figure 7. Comparison of the reflection coefficient and the frequency response between the measured and the simulated ones (a) reflection coefficients; (b) frequency response.

Table 1 shows the comparison of the performance of various silicon photodetectors fabricated with standard CMOS technology.(a) Our 20 × 20 μm2 CMOS APD shows the (responsivityb) with 0.56 A/W and a photodetection bandwidth of 8.4 GHz at a reverse bias voltage of 20.8 V. FigureFigure 7. Comparison 7. Comparison of of the the reflection reflection coecoefficientfficient and and the the frequency frequency response response between between the measured the measured and the simulated ones (a) reflection coefficients; (b) frequency response. and the simulated onesTable (a) reflection 1. The performances coefficients; of (variousb) frequency silicon photodetectors. response.

TheTableParameters extracted 1 shows parameters the comparison Ref. for[9] Rl ,ofL athe, Ref. and performance [11]Ra are the Re of samef. various[16] for silicon allRef. prepared [21] photodetectors devices. This Work fabricatedRl is deﬁned as thewith voltage standardTechnology to currentCMOS technology. ratio0.13 near μm Our 0 V. 20 The0.18 × 20 slope μμmm 2 CMOS of the0.13 I-VAPD μm characterization shows 0.13 the μ responsivitym for all45 with APD nm 0.56 is shownA/W in and a photodetection bandwidth of 8.4 GHzMultiple at a reverse bias voltage of 20.8 V. Double P- Figure2, making Rl the sameP+/N-well for prepared devices. LaP+/N-welldoes not varyN+/P-well with device area at the same bias Structure N+/P-sub well/Deep N-well voltage, because the preparedSM-APD APDs have the same avalancheAPD multiplicationAPD characteristics based on Table 1. The performancesAPD of various silicon photodetectors. APD the P-well/Deep N-well junction and guard ring as shown in Figure2. AreaParameters (μm2) Ref.5 × 5[9] Ref. 50 × [11]50 Re 10 f.× [16]10 Ref. 30 × [21]30 This 20 × Work 20 BandwidthTechnology (GHz) 0.1312 μ m 0.188.7 μ m 0.137.6 μ m 0.133.5 μ m 45 8.4 nm Responsivity Multiple Double P- P+/N-well0.03 0.05 P+/N-well0.48 N+/P-well3.92 0.56 Structure(A/W) N+/P-sub well/Deep N-well SM-APD APD APD APD APD Area (μm2) 5 × 5 50 × 50 10 × 10 30 × 30 20 × 20 Bandwidth (GHz) 12 8.7 7.6 3.5 8.4 Responsivity 0.03 0.05 0.48 3.92 0.56 (A/W)

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Ra denotes the series resistance associated with the avalanche inductor La, which determines the quality factor of the avalanche inductance [17]. It is not directly related to the device area. The junction capacitance C is proportional to the area. Csub1 and Csub2 are also proportional to the area. Rnw and Rsub do not change much because the increase in lateral resistance makes up for the decrease in vertical resistance. Figure7 shows the di fference between experiment and simulation of the reflection coefficients and frequency response characterization, respectively. Based on the comparison shown in Figure7, the simulation result based on the SPICE model coincides with the experiment ones, showing the accuracy of the proposed SPICE model. Table1 shows the comparison of the performance of various silicon photodetectors fabricated with standard CMOS technology. Our 20 20 µm2 CMOS APD shows the responsivity with 0.56 A/W × and a photodetection bandwidth of 8.4 GHz at a reverse bias voltage of 20.8 V.

Table 1. The performances of various silicon photodetectors.

Parameters Ref. [9] Ref. [11] Ref. [16] Ref. [21] This Work Technology 0.13 µm 0.18 µm 0.13 µm 0.13 µm 45 nm P+/N-well Multiple P+/N-well N+/P-well Double P-well/Deep Structure SM-APD N+/P-sub APD APD APD N-well APD Area (µm2) 5 5 50 50 10 10 30 30 20 20 × × × × × Bandwidth (GHz) 12 8.7 7.6 3.5 8.4 Responsivity (A/W) 0.03 0.05 0.48 3.92 0.56 Gain 10.6 62.3 15.4 18.8 23 Bias voltage (V) 9.7 11.45 10.25 10 20.8

4. Conclusions In this paper, an avalanche photodiode is designed and implemented based on 45 nm standard CMOS technology without any process modification. The fabricated CMOS APD shows a high response and high light detection bandwidth. Two types of CMOS APDs with different active areas are prepared, and their I-V characterization, photodetection frequency responses are examined. By reducing the active area from 50 50 µm2 to 20 20 µm2, the optical detection bandwidth of the prepared APD is × × increased to 8.4 GHz due to the decreased transit time, and the responsivity achieved 0.56 A/W. At the same time, the SPICE model of the fabricated CMOS APD device is set up for future circuit design and simulation. The key parameters based on the actual structure and the measurements are extracted. The simulation results show the accuracy of the proposed SPICE model. The proposed CMOS APDs are very useful for achieving high responsivity, and high speed 850 nm integrated optical receivers based on the standard CMOS technology. Our future work will focus on reducing the bias voltage and power consumption of the device, while improving its photoelectric detection performance. Improving the light absorption, optimizing the doping concentration and doping depth can further improve the photoelectric detection performance of the device. Light absorption can be increased by adding an anti-reflection layer on the surface of the device. The optimization of doping concentration and doping depth requires more experiments to explore. On the other hand, optimizing the structure and parameters of the design to suit different wavelengths of photoelectric detection is also one of our future research directions.

Author Contributions: Resources, Q.Q. and P.Y.; Writing—original draft preparation, W.Z.; Writing—review and editing, W.Z. and Y.J.; Funding acquisition, P.Y. and Y.J. All authors have read and agreed to the published version of the manuscript. Funding: This work was supported by NSFC (No.61774078), NSFC (No.51802124), the Natural Science Foundation of Jiangsu Province (BK 20180626) and the Fundamental Research Funds for the Central Universities (JUSRP11858). Conﬂicts of Interest: The authors declare no conﬂict of interest. Micromachines 2020, 11, 65 7 of 7

References

1. Tavernier, F.; Steyaert, M.S.J. High-Speed Optical Receivers with Integrated Photodiode in 130 nm CMOS. IEEE J. Solid-State Circuits 2009, 44, 2856–2867. [CrossRef] 2. Kostov, P.; Gaberl, W.; Hofbauer, M.; Zimmermann, H. Integrated 180 nm CMOS phototransistors with an optimized responsivity-bandwidth-product. In Proceedings of the Photonics Conference, Burlingame, CA, USA, 23–27 September 2012. 3. Kim, Y.S.; Jun, I.S.; Kim, K.H. Design and Characterization of CMOS Avalanche Photodiode With Charge Sensitive Preamplifier. IEEE Trans. Nucl. Sci. 2008, 55, 1376–1380. [CrossRef] 4. Woodward, T.K.; Krishnamoorthy, A.V. 1-Gb/s integrated optical detectors and receivers in commercial CMOS technologies. Sel. Top. Quantum Electron. IEEE J. 1999, 5, 146–156. [CrossRef] 5. Sale, T.E.; Chu, C.; Hwang, J.K.; Koh, G.H.; Nabiev, R.; Tan, L.C.; Giovane, L.M.; Murty, R.M.V.Manufacturability of 850nm data communication VCSELs in high volume. Proc. SPIE Int. Soc. Opt. Eng. 2010, 7615, 761503–761510. 6. Lee, M.J.; Choi, W.Y. Performance Optimization and Improvement of Silicon Avalanche Photodetectors in Standard CMOS Technology. IEEE J. Sel. Top. Quantum Electron. 2017, 24, 1–13. [CrossRef] 7. Atef, M.; Polzer, A.; Zimmermann, H. Avalanche Double Photodiode in 40-nm Standard CMOS Technology. IEEE J. Quantum Electron. 2013, 49, 350–356. [CrossRef] 8. Huang, W.K.; Liu, Y.C.; Hsin, Y.M. A High-Speed and High-Responsivity Photodiode in Standard CMOS Technology. IEEE Photonics Technol. Lett. 2007, 19, 197–199. [CrossRef] 9. Lee, M.J. First CMOS Silicon Avalanche Photodetectors with Over 10-GHz Bandwidth. IEEE Photonics Technol. Lett. 2015, 28, 276–279. [CrossRef] 10. Iiyama, K.; Shimotori, T.; Gyobu, R.; Hishiki, T.; Maruyama, T. 10 GHz bandwidth of Si avalanche photodiode fabricated by standard 0.18 µm CMOS process. In Proceedings of the Conference on Optical Fibre Technology, Melbourne, VIC, Australia, 6–10 July 2014. 11. Chou, F.P.; Wang, C.W.; Li, Z.Y.; Hsieh, Y.C.; Hsin, Y.M. Effect of Deep N-Well Bias in an 850-nm Si Photodiode Fabricated Using the CMOS Process. IEEE Photonics Technol. Lett. 2013, 25, 659–662. [CrossRef] 12. Goy, J.; Courtois, B.; Karam, J.M.; Pressecq, F. Design of an APS CMOS Image Sensor for Low Light Level Applications Using Standard CMOS Technology. Analog Integr. Circuits Signal Process. 2001, 29, 95–104. [CrossRef] 13. Yang, G.; Cansizoglu, H.; Polat, K.G.; Ghandiparsi, S.; Kaya, A.; Mamtaz, H.H.; Mayet, A.S.; Wang, Y.; Zhang, X.; Yamada, T. Photon-trapping microstructures enable high-speed high-efficiency silicon photodiodes. Nat. Photonics 2017, 11, 301–308. 14. Kang, H.S.; Lee, M.J.; Choi, W.Y. Si avalanche photodetectors fabricated in standard complementary metal-oxide-semiconductor process. Appl. Phys. Lett. 2007, 90, 63. [CrossRef] 15. Zul, A.F.M.N.; Iiyama, K.; Gyobu, R.; Hishiki, T.; Maruyama, T. Optimizing silicon avalanche photodiode fabricated by standard CMOS process for 8 GHz operation. In Proceedings of the International Conference on Telematics & Future Generation Networks, Kuala Lumpur, Malaysia, 26–28 May 2015. 16. Lee, M.J.; Choi, W.Y. Area-Dependent Photodetection Frequency Response Characterization of Silicon Avalanche Photodetectors Fabricated With Standard CMOS Technology. IEEE Trans. Electron Devices 2013, 60, 998–1004. [CrossRef] 17. Wang, Y.C. Small-signal characteristics of a read diode under conditions of field-dependent velocity and finite reverse saturation current. Solid-State Electron. 1978, 21, 609–615. [CrossRef] 18. Ahn, Y.; Han, K.; Shin, H. A New Physical RF Model of Junction Varactors. Jpn. J. Appl. Phys. 2003, 42, 2110–2113. [CrossRef] 19. Sze, S. Physics of Semiconductor Devices, 2nd ed.; Wiley-Interscience: New York, NY,USA, 1981; p. 1981. [CrossRef] 20. Wang, G.; Tokumitsu, T.; Hanawa, I.; Sato, K.; Kobayashi, M. Analysis of high speed p-i-n photodiode S-parameters by a novel small-signal equivalent circuit model. IEEE Microw. Wirel. Compon. Lett. 2002, 12, 378–380. [CrossRef] 21. Nayak, S.; Ahmed, A.H.; Sharkia, A.; Ramani, A.S.; Mirabbasi, S.; Shekhar, S. A 10-Gb/s 18.8 dBm Sensitivity − 5.7 mW Fully-Integrated Optoelectronic Receiver With Avalanche Photodetector in 0.13- um CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 2019, 66, 3162–3173. [CrossRef]

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