Will Avalanche Arrays Ever Reach 1 Megapixel?

Edoardo Charbon Swiss Federal Institute of Technology, CH-1015 Lausanne, Switzerland

Abstract— In this paper the miniaturization and performance one microsecond in CCD [4] and a few nanoseconds in potential of solid-state avalanche is discussed in CMOS APS [5] have been demonstrated. While CCD streak the context of large multi-pixel sensors. Technological and cameras can achieve a resolution of a few picoseconds, they design trade-offs are discussed in view of recent advances in require a 2D pixel array to resolve a string of photon CMOS imaging technologies and the emergence of new arrivals. Moreover, long acquisition latency and the added multiplication based architectures. complexity to form and deflect the photoelectron beam I. INTRODUCTION make this device unsuitable for miniaturization and low- cost operation. In the last four decades, solid-state multiplication based Sensors based on solid-state APDs have been proposed have gradually evolved from relatively decades ago to simultaneously achieve high sensitivity and crude devices to the sophistication of today. Almost every dynamic range, and low timing uncertainty [6]. In APDs, imaging technology has one such device and the range of carriers generated by the absorption of a photon in the p-n implementations is quite wide [1]. In this context, junction, are multiplied by impact ionization thus producing avalanche photodiodes (APDs), thanks to their relative an avalanche. APDs can reach timing uncertainties as low simplicity and ease of fabrication, have recently attracted as a few tens of picoseconds, thanks to the speed at which significant interest. an avalanche evolves from the initial carrier pair forming in There are two main lines of research in silicon APDs: the multiplication region. one that advocates the use of highly optimized processes to An APD is implemented as photodiode reverse biased boost performance and one that proposes to adapt APD near or above breakdown, where it exhibits optical gains design to existing processes to reduce cost and to maximize greater than one. When an APD is biased below breakdown miniaturization. it is known as proportional or linear APD. It can be used to In this paper we focus on the latter approach and we detect clusters of photons and to determine their energy. discuss how the latest advances in imaging CMOS When biased above breakdown, the optical gain becomes processes may be used to maximize performance and to virtually infinite. Thus, with a relatively simple ancillary boost miniaturization. We also discuss how advanced electronics, the APD becomes capable of detecting single processes can ensure in-pixel and on-chip processing of photons. The APD operating in this regime, known as ultra-high-speed signals that are typical of single-photon Geiger mode of operation, is called single-photon detectors. avalanche (SPAD). II. SINGLE-PHOTON DETECTION AND SILICON APDS III. APD DESIGN IN STANDARD CMOS PROCESSES Devices for single-photon detection are realizable in many solid-state and non-solid-state implementations. A. Basic Structure Design While an in-depth discussion on the subject is beyond the There exist two main implementation styles for APDs. scope of this paper, we mention here two classes of The first, known as reach-through APD (RAPD) [7], is a detectors that are currently the solution of choice in many vertical structure, incompatible with planar CMOS applications: multichannel or microchannel plates (MCPs) processes. The second involves a shallow p or n layer to and photomultiplier tubes (PMTs) [2]. form high-voltage pn junctions. Cova and others have A number of solid-state solutions have been proposed as investigated devices designed in this style since the 1970s, a replacement of MCPs and PMTs using conventional yielding a number of structures equipped with a zone imaging processes. The challenge though has been to meet designed to prevent premature edge breakdown (PEB) [8]. single-photon sensitivity and low timing uncertainty. An early example of one such structure is shown in Fig. 1. To address the sensitivity problem, cooled and/or intensified CCDs, and ultra-low-noise CMOS APS n+ architectures have been proposed. Multiplication of p+ photogenerated charges by impact ionization has also been p-epi used in conventional CCDs [3]. Meeting PMT’s picosecond timing uncertainty however, n-substrate to the best of our knowledge, has not been possible in FIG. 1. CROSS-SECTION OF APDS THAT CAN BE FABRICATED IN A PLANAR CCD/CMOS imagers, even though uncertainties as low as PROCESS.

246 More recently, researchers have developed APDs both of charges to be easily detected and thus requiring no in linear and Geiger mode using dedicated processes, further amplification. achieving superior performance in terms of sensitivity and SPADs however require mechanisms to quench the noise. A good example is the work of Kindt [9]. The main avalanche. There exist two main quenching mechanisms: disadvantage of using dedicated processes is the lack of passive and active. In passive quenching the avalanche libraries that can support complex functionalities and deep- current is used to drop the voltage across the diode. This is submicron feature sizes, thus limiting array sizes. An generally accomplished via a ballast placed on the interesting alternative is the use of a hybrid approach or the of the diode, as shown in Fig. 3. whereby the APD array and ancillary electronics are Avalanche detection is accomplished measuring the voltage implemented in two different processes, each optimized for across the ballast resistance (Fig. 3a, b) or the current APD performance and speed, respectively [10]. across a low- or zero-resistivity path (Fig. 3c, d). Pulse In 2003 the integration of linear and Geiger mode APDs shaping may be performed using a comparator (Fig. 3e). in a low-cost CMOS process has become feasible [11]. Excess bias voltage equals |VOP| - |Vbd|, where Vbd is the PEB prevention is accomplished forcing the electric field breakdown. The resistances may be implemented in everywhere to be lower than that on the planar polysilicon [11],[12] or exploiting the non-linear multiplication region, where it should be uniform. characteristics of PMOS or NMOS devices [13],[14]. V V V V p p+ OP OP OP OP n+ p- I R x X V Vx X x n n Vth IxR a) b) e)

a) b) c) d) p p FIG. 3. PASSIVE QUENCHING VARIANTS. VOLTAGE DETECTION MODE (LEFT); CURRENT DETECTION MODE (RIGHT). In active quenching mode, the avalanche activates an n active device to stop it. The literature on the subject is c) extensive. In [15] some of the existing schemes can be found. Other authors have recently revisited the issue [16]. After quenching, the device enters another phase known as recharge. During this phase the photodiode bias voltage FIG. 2. TECHNIQUES FOR PREVENTION OF PREMATURE EDGE BREAKDOWN must return to the pre-avalanche state as quickly as (PEB) IN PLANAR PROCESSES. possible. Again, there are passive and active schemes to Fig. 2 shows some of the most used structures. In a) the achieve recharge. The simplest approach is shown in Fig. 3. n+ layer maximizes the electric field in the middle of the The diode will automatically recharge to VOP via the ballast diode. In b) a lightly doped p- implant reduces the electric resistance. The recharge, in this case, follows the RC field at the edge of the p+ implant. In c) a floating p exponential, where R is the equivalent quenching resistance implant locally increases the . With a and C the total parasitic capacitance at node X. polysilicon gate one can further extend the depletion region In active recharge schemes, the photodiode is forced to (gray line in the figure). The figure also shows a 3D cross- the initial state generally via a fast controlled by a section of b) including a p-substrate and an n-well isolation. current sense . Even though these schemes are Modern imaging processes (with or without STI) attractive, they usually require extra complexity to a pixel, provide several lightly doped implants at three or more thus potentially hindering miniaturization. depths. Thus, an optimal layer combination (p+/p-/n-well) The quenching and recharge times are collectively generally exists that can yield a good trade-off between known as dead time. Dead time in passive timing uncertainty and noise. However, care should be used quenching/recharge methods is potentially longer than in so as to avoid full depletion of the well and punch- their active counterparts. However, the advantage of a through’s between shallow tubs and substrate. Buried reduced dead time in large array may be preempted by layers should also be used with care to prevent punch- limited speeds of pixel readout schemes. through across the n-well. C. The Importance of Miniaturization B. Quenching and Recharge Mechanisms The first SPAD implementations in 0.35µm CMOS Linear APDs are multi-photon detectors, when used as technology have demonstrated fully scalable pixels at a charge accumulators. Charges generated at each avalanche pitch of 25µm. However, for a realistic Mpixel sensor are integrated and amplification may not be needed. In realization, this limit should be further reduced. single-photon detection mode, fast are generally Pixel miniaturization has other benefits too. The used, adding to jitter and dark noise. SPADs on the reduction of anode and cathode areas, in SPADs generally contrary can only operate in single-photon mode. This is reduces the dark count rate (DCR), i.e. the average achieved operating the diode above breakdown by a voltage frequency of spurious pulses in the dark [11]. It also known as excess bias voltage. Upon photon absorption, an reduces parasitic capacitance at node X (Fig. 3), thus avalanche may be triggered involving a sufficient number possibly reducing dead time. In addition, the number of carriers involved in an avalanche is also reduced, thus

247 decreasing the probability of carrier trapping and, [19],[20]. In this readout scheme, the column is organized consequently, of afterpulsing. Finally, fewer carriers as a digital bus. When a photon is detected, the involved in impact ionization will cause smaller photon corresponding pixel takes ownership of the bus, sending emission, hence causing less interference with other pixels. timing related information as well as the ID of the pixel generating such information to the exterior of the array. IV. ACHIEVING MINIATURIZATION An alternative approach for non-LLL situations is the use of a latchless pipeline scheme. In this approach, the A. Pixel Miniaturization absorption of a photon causes the SPAD to inject a digital The first ingredient towards pixel miniaturization in a signal onto a delay line that acts as an ultra-fast conveyor given process is the simplest possible avalanche detection belt [21]. This method allows detection of photons mechanism. One possible solution consists of shifting VOP simultaneously on a column even though some restrictions + to VDD, and ground to a negative voltage VP . Hence, node apply on the timing of the optical setup. Fig. 5 shows the X (Fig. 3) can be made vary between VDD and ground, photomicrograph of chip implementing this readout style. thereby enabling the replacement of a relatively large comparator by a simple properly designed inverter [11], [12]. Fig. 4 shows an example of one such detector. The second ingredient is the reduction of feature size through processes that represent a good compromise between available layers, profiles, and design rules. Particularly important factors are the well-to-well minimum distance, the doping levels in the multiplication regions, Circular and the level of defects in the lattice. SPAD

VDD Quenching & Gating 25 µm

X FIG. 5. PHOTOMICROGRAPH OF A SINGLE-PHOTON DETECTOR WITH LATCHLESS PIPELINE READOUT. 10µm + VP V. PERFORMANCE ISSUES IN LARGE APD ARRAYS CMOS APDs are characterized by means of the same FIG. 4. PHOTOMICROGRAPH OF A SPAD IMPLEMENTED IN CMOS parameters of conventional photodiodes, except for an TECHNOLOGY. A GUARD RING SURROUNDS THE ANODE FOR PEB PREVENTION. optical gain higher than one. APDs operating in Geiger mode on the contrary require a specific set of parameters. The third ingredient is the readout scheme. In general, simpler pixel-level processing enables smaller sizes but it A. Fill Factor may have an impact on performance. Alternatively, more Due to the geometry of guard rings for PEB prevention, pixel parallelism may impact pitch. in SPADs the fill factor may be as low as 1%. Using B. Pixel Sharing modern readout techniques, fill factors of up to about 9% have been demonstrated [21]. We have also demonstrated a Due to the need for independent quenching and recharge fill factor reclaim ratio of 15 using commercial microlense in a SPAD array, the level of sharing cannot be pushed arrays [22]. unless one accepts time-sharing as well. This scheme however may not be appropriate for photon-starved B. Dead Time applications. For low photon-count, time-resolved In passive quenching/recharge devices dead time is applications it is possible for an entire pixel array or generally dominated by the recharge time, about 30-50ns, column to share high-resolution time discriminators at a and it varies a few percentage points across the array as a cost of a higher sensor complexity. function of temperature and process variability. This results C. Readout Techniques in mild saturation non-uniformity and time variability. APDs can potentially be read out using a conventional C. Time Uncertainty or Jitter scheme similar to CMOS APS architectures. SPADs on the In integrated SPADs jitter is limited from below by contrary, generate a digital pulse for each detected photon. geometry and process technology considerations. In arrays To avoid missing photon counts, a pixel-level counter or of significant size, jitter generally degrades from 50ps to as time discriminator can be used [17],[18]. However, large much as several hundreds of picoseconds due to electrical counters are not desirable due to the fill factor loss and/or path and electrical supply ripple. Techniques derived from extra time required to perform a complete readout. A partial memory design, such as non rail-to-rail readout and solution to this problem is the reduction of the counter shielding should be exploited. resolution (ultimately 1 bit), requiring more frequent readouts and/or lower saturation. Another solution is to D. Photon Detection Probability (PDP) access every pixel independently but sequentially using a The sensitivity is characterized in SPADs by the photon digital random access scheme [12],[13]. detection probability (PDP) and it is the overall probability In low-light-level (LLL) applications, an alternative that an impinging photon triggers a digital pulse. Detailed approach may be used known as event-driven readout physical models for PDP and its mechanisms can be found

248 in [11]. PDP is dependent on temperature and excess bias This research was supported by a grant of the Swiss voltage. A good pixel-to-pixel uniformity is generally National Science Foundation. The author is grateful to his observed. Based on on-going research, we expect that deep- graduate students. submicron SPADs achieve up to 40-50% PDP. In more advanced deep-submicron processes, the multiplication REFERENCES region will move to the surface and will be thinner. Thus, [1] E. Charbon, “Will CMOS Imagers Ever Need Ultra-High Speed?”, sensitivity in shorter wavelengths will be reinforced. Fig. 6 IEEE International Conference on Solid-State and IC Technology, plots PDP as a function of wavelength for two CMOS Vol. 3, pp. 1975-1980, Oct. 2004. technologies. In the inset PDP uniformity is shown [14]. [2] J. McPhate, J. Vallerga, A. Tremsin, O. Siegmund, B. Mikulec, A. Clark, “Noiseless Kilohertz-frame-rate Imaging Detector based on PDP Microchannel Plates Readout with Medipix2 CMOS Pixel Chip”, Proc. SPIE, Vol. 5881, pp. 88-97, 2004. 40% [3] J. Hynecek, “Impactron – A New Solid State Image Intensifier”, IEEE Trans. on Electron Devices, Vol. 48, N. 10, pp. 2238-2241, Oct. 2001. 30% [4] T. G. Etoh et al., An Image Sensor Which Captures 100 Consecutive Frames at 1,000,000 Frames/s, IEEE Trans. on Electron Devices, Vol.

20% 50, N. 1, pp. 144-151, Jan. 2003. [5] G. Patounakis, K. Shepard, and R. Levicky, “Active CMOS Biochip for Time-Resolved Fluorescence Detection“, IEEE Symposium on 10% 0.35µm CMOS VLSI, pp. 68-71, June 2005. 5% 0.8µm CMOS [6] R.H. Haitz, “Studies on Optical Coupling between Silicon p-n Junctions”, Solid-State Electronics, Vol. 8, pp. 417-425, 1965. 400 500 600 700 800 900 Wavelength [nm] [7] R.J. McIntyre, “Recent Developments in Silicon Avalanche FIG. 6. PHOTON DETECTION PROBABILITY (PDP) AS A FUNCTION OF Photodiodes”, Measurement, Vol. 3 N.4, pp. 146-152, 1985. IMPINGING RADIATION WAVELENGTH. [8] S. Cova, A. Longoni, and A. Andreoni, “Towards Picosecond Resolution with Single-Photon Avalanche ”, Rev. Sci. Instr., E. Dark Count Rate Vol. 52, N. 3, pp. 408-412, 1981. As mentioned earlier, DCR is a function of detector [9] W.J. Kindt, “Geiger Mode Avalanche Photodiode Arrays for Spatially area. It is also a function of temperature and excess bias Resolved Single Photon Counting”, Ph.D. Thesis, Delft University voltage. On a large chip, DCR may vary widely from a Press, ISBN 90-407-1845-8, 1999. minimum of a few Hertz to a few kilohertz. Generally, [10] B. Aull et al., “Geiger-Mode Avalanche Photodiodes for Three- Dimensional Imaging”, Lincoln Laboratory Journal, Vol. 13, N. 2, noisy pixels are less than 1% of the array, depending upon pp. 335-50, 2002. the distribution of traps across the chip and the overall [11] A. Rochas, “Single Photon Avalanche Diodes in CMOS Technology”, quality of the process. Hence, it is always a good practice Ph.D. Thesis, Lausanne, 2003. to foresee means to shut off pixels either temporarily or [12] C. Niclass, A. Rochas, P.A. Besse, and E. Charbon, “A CMOS Single permanently, depending on applications. Photon Avalanche Diode Array for 3D Imaging”, IEEE ISSCC, pp. 120-121, Feb. 2004. F. Afterpulsing [13] C. Niclass and E. Charbon, “A Single Photon Detector Array with Afterpulses are the result of secondary avalanches 64x64 Resolution and Millimetric Depth Accuracy for 3D Imaging”, related to earlier photon detections. The mechanisms IEEE ISSCC, pp. 364-365, Feb. 2005. behind afterpulsing are well understood and the literature [14] C. Niclass A. Rochas, P.A. Besse, and E. Charbon, “Design and on the subject is extensive [11]. In active recharge schemes, Characterization of a CMOS 3-D Image Sensor Based on Single a minimum recharge time needs to be allocated to allow for Photon Avalanche Diodes”, IEEE JSSC, Vol. 40, N. 9, Sep. 2005. single-photon detectors to recover from an avalanche, thus [15] S. Cova, M. Ghioni, A. Lacaita, C. Samori, F. Zappa, “Avalanche keeping afterpulsing probability below a threshold. Fewer Photodiodes Quenching Circuits for Single-Photon Detection”, Applied Optics, Vol. 35, N. 12, pp. 1956-1976, 1996. impact ionizations and fewer traps can reduce this time. [16] J. Richardson, R. Henderson, and D. Renshaw, “Dynamic Quenching G. Crosstalk for Single Photon Avalanche Diode Arrays”, to appear, Intl. Imaging Sensor Workshop, June 2007. Crosstalk can be optical and electrical. In optical crosstalk, luminescence released by an avalanche elsewhere [17] E. Charbon, “Techniques for CMOS Single Photon Imaging and Processing”, IEEE ASICON, Oct. 2005. may cause avalanches. In electrical crosstalk, a carrier [18] D. Stoppa et al., “A CMOS 3-D Imager based on Single Photon generated elsewhere may trigger avalanches. The Avalanche Diode”, to appear, Trans. Circuits and Systems I, 2007. techniques for preempting optical crosstalk include optical [19] C. Niclass, M. Sergio, E. Charbon, “A Single Photon Avalanche shields between pixels [6]. Electrical crosstalk is strongly Diode Array Fabricated in Deep-Submicron CMOS Technology”, reduced insulating the multiplication region, for example, Design Automation & Test in Europe (DATE), Mar. 2006. with a well (Fig. 2). The drawback of this approach is the [20] C. Niclass, M. Sergio, E. Charbon, “A 64x48 Single Photon reduction of fill factor and/or the increase of overall pitch. Avalanche Diode Array with Event-Driven Readout”, European Solid-State Circuits Conference (ESSCIRC), Sep. 2006. VI. CONCLUSIONS AND ACKNOWLEDGMENTS [21] M. Sergio, C. Niclass, E. Charbon, “A 128x2 CMOS Single Photon In the near future optical sensors might look Streak Camera with Time-Preserving Latchless Pipeline Readout”, increasingly like memories; pixels like single-photon IEEE ISSCC, pp. 120-121, Feb. 2007. detectors, thus generating increasing interest in linear and [22] Süss MicroOptics, http://www.suss-microoptics.com Geiger-mode APDs [23]. Yet, despite recent advances, [23] E. Fossum, “What To Do With Sub-Diffraction-Limit (SDL) Pixels? integrated APD technology still lags behind CCD and A Proposal for a Gigapixel Digital Film Sensor (DFS)”, IEEE Workshop on CCDs and Advanced Image Sensors, pp. 214-217, June CMOS APS. This paper addresses those issues and 2005. technological solutions for high-density APD arrays.

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