IBM System Z10 Business Class - the Smart Choice for Your Business
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Computer Organization and Architecture Designing for Performance Ninth Edition
COMPUTER ORGANIZATION AND ARCHITECTURE DESIGNING FOR PERFORMANCE NINTH EDITION William Stallings Boston Columbus Indianapolis New York San Francisco Upper Saddle River Amsterdam Cape Town Dubai London Madrid Milan Munich Paris Montréal Toronto Delhi Mexico City São Paulo Sydney Hong Kong Seoul Singapore Taipei Tokyo Editorial Director: Marcia Horton Designer: Bruce Kenselaar Executive Editor: Tracy Dunkelberger Manager, Visual Research: Karen Sanatar Associate Editor: Carole Snyder Manager, Rights and Permissions: Mike Joyce Director of Marketing: Patrice Jones Text Permission Coordinator: Jen Roach Marketing Manager: Yez Alayan Cover Art: Charles Bowman/Robert Harding Marketing Coordinator: Kathryn Ferranti Lead Media Project Manager: Daniel Sandin Marketing Assistant: Emma Snider Full-Service Project Management: Shiny Rajesh/ Director of Production: Vince O’Brien Integra Software Services Pvt. Ltd. Managing Editor: Jeff Holcomb Composition: Integra Software Services Pvt. Ltd. Production Project Manager: Kayla Smith-Tarbox Printer/Binder: Edward Brothers Production Editor: Pat Brown Cover Printer: Lehigh-Phoenix Color/Hagerstown Manufacturing Buyer: Pat Brown Text Font: Times Ten-Roman Creative Director: Jayne Conte Credits: Figure 2.14: reprinted with permission from The Computer Language Company, Inc. Figure 17.10: Buyya, Rajkumar, High-Performance Cluster Computing: Architectures and Systems, Vol I, 1st edition, ©1999. Reprinted and Electronically reproduced by permission of Pearson Education, Inc. Upper Saddle River, New Jersey, Figure 17.11: Reprinted with permission from Ethernet Alliance. Credits and acknowledgments borrowed from other sources and reproduced, with permission, in this textbook appear on the appropriate page within text. Copyright © 2013, 2010, 2006 by Pearson Education, Inc., publishing as Prentice Hall. All rights reserved. Manufactured in the United States of America. -
DB2 V8 Exploitation of IBM Ziip
Systems & Technology Group Connecting the Dots: LPARs, HiperDispatch, zIIPs and zAAPs Share in Boston,v August 2010 Glenn Anderson IBM Technical Training [email protected] © 2010 IBM Corporation What I hope to cover...... What are dispatchable units of work on z/OS Understanding Enclave SRBs How WLM manages dispatchable units of work The role of HiperDispatch What makes work eligible for zIIP and zAAP specialty engines Dispatching work to zIIP and zAAP engines z/OS Dispatchable Units There are different types of Dispatchable Units (DU's) in z/OS Preemptible Task (TCB) Non Preemptible Service Request (SRB) Preemptible Enclave Service Request (enclave SRB) Independent Dependent Workdependent z/OS Dispatching Work Enclave Services: A Dispatching Unit Standard dispatching dispatchable units (DUs) are the TCB and the SRB TCB runs at dispatching priority of address space and is pre-emptible SRB runs at supervisory priority and is non-pre-emptible Advanced dispatching units Enclave Anchor for an address space-independent transaction managed by WLM Can comprise multiple DUs (TCBs and Enclave SRBs) executing across multiple address spaces Enclave SRB Created and executed like an ordinary SRB but runs with Enclave dispatching priority and is pre-emptible Enclave Services enable a workload manager to create and control enclaves Enclave Characteristics Created by an address space (the "owner") SYS1 AS1 AS2 AS3 One address space can own many enclaves One enclave can include multiple Enclave dispatchable units (SRBs/tasks) executing concurrently in -
IDUG EU 2009 Patric Becker: Leveraging Data Warehouse
Session: A01 Leveraging Data Warehouse Performance with DB2 9 for z/OS and System z10 Patric Becker IBM Boeblingen Lab 05 October 2009 • 11:30 – 12:30 Platform: DB2 for z/OS This session looks into new feature delivered with IBM System z10 as well as the new capabilities of DB2 9 for z/OS and highlights those options which can be beneficial for Data Warehousing environments in terms of availability and performance. Not all the relevant features can be described at a very granular level, but the idea is to provide information to understand the important features to trigger further analysis to improve the availability and performance of existing Data Warehouses. IBM Deutschland Research & Development GmbH IBM D Research & Development Headquarter IBM Deutschland Research & Development GmbH Schönaicher Straße 220 D-71032 Böblingen Berlin Managing Director Erich Baier Employees 2008 Approx. 1.800 (2.200) Homepage ibm.com/de/entwicklung Very strong development portfolio Mainz Globally integrated in hardware and software Walldorf development One of the biggest IBM R&D location world wide IBM Forschung & Böblingen Acknowledged innovation team Entwicklung ~ 310 patent submissions 2008 München ~ 400 students 2008 IND GmbH ~ 80 new-hires 2007 2 IBM Research & Development Locations worldwide Böblingen Greenock ▲ Yorktown Heights Toronto Hursley ▲ Peking Rochester Krakau Boulder Dublin Moskau Beaverton Paris Fujisawa ▲ Zürich ▲ Tokio Burlington Rom Yasu Yamato Endicott San Jose Shanghai ▲ Almaden East Fishkill Santa Teresa Poughkeepsie -
Basic of Mainframe
Basic of Mainframe Mainframe computer Mainframe is a very large and expensive computer capable of supporting hundreds, or even thousands, of users simultaneously. In the hierarchy that starts with a simple microprocessor at the bottom and moves to supercomputers at the top, mainframes are just below supercomputers. In some ways, mainframes are more powerful than supercomputers because they support more simultaneous programs. But supercomputers can execute a single program faster than a mainframe. The distinction between small mainframes and minicomputers is vague, depending really on how the manufacturer wants to market its machines. Modern mainframe computers have abilities not so much defined by their single task computational speed (usually defined as MIPS ² Millions of Instructions Per Second) as by their redundant internal engineering and resulting high reliability and security, extensive input- output facilities, strict backward compatibility with older software, and high utilization rates to support massive throughput. These machines often run for years without interruption, with repairs and hardware upgrades taking place during normal operation. Software upgrades are only non-disruptive when Parallel Sysplex is in place, with true workload sharing, so one system can take over another's application, while it is being refreshed. More recently, there are several IBM mainframe installations that have delivered over a decade of continuous business service as of 2007, with hardware upgrades not interrupting service. Mainframes are defined by high availability, one of the main reasons for their longevity, because they are typically used in applications where downtime would be costly or catastrophic. The term Reliability, Availability and Serviceability (RAS) is a defining characteristic of mainframe computers. -
1. Types of Computers Contents
1. Types of Computers Contents 1 Classes of computers 1 1.1 Classes by size ............................................. 1 1.1.1 Microcomputers (personal computers) ............................ 1 1.1.2 Minicomputers (midrange computers) ............................ 1 1.1.3 Mainframe computers ..................................... 1 1.1.4 Supercomputers ........................................ 1 1.2 Classes by function .......................................... 2 1.2.1 Servers ............................................ 2 1.2.2 Workstations ......................................... 2 1.2.3 Information appliances .................................... 2 1.2.4 Embedded computers ..................................... 2 1.3 See also ................................................ 2 1.4 References .............................................. 2 1.5 External links ............................................. 2 2 List of computer size categories 3 2.1 Supercomputers ............................................ 3 2.2 Mainframe computers ........................................ 3 2.3 Minicomputers ............................................ 3 2.4 Microcomputers ........................................... 3 2.5 Mobile computers ........................................... 3 2.6 Others ................................................. 4 2.7 Distinctive marks ........................................... 4 2.8 Categories ............................................... 4 2.9 See also ................................................ 4 2.10 References -
Introduction to the System Z Hardware Management Console
Front cover Introduction to the System z Hardware Management Console Large scale hardware systems management concepts Design and implementation of a management controller Practical operational techniques and scenarios Merwyn Jones HMC & SE Development Team ibm.com/redbooks International Technical Support Organization Introduction to the System z Hardware Management Console February 2010 SG24-7748-00 Note: Before using this information and the product it supports, read the information in “Notices” on page xi. First Edition (February 2010) © Copyright International Business Machines Corporation 2010. All rights reserved. Note to U.S. Government Users Restricted Rights -- Use, duplication or disclosure restricted by GSA ADP Schedule Contract with IBM Corp. Contents Notices . xi Trademarks . xii Preface . xiii The team who wrote this book . xiii Acknowledgements . xvi Become a published author . xvi Comments welcome. xvi Chapter 1. Introduction to System z Hardware. 1 1.1 General introduction: Mainframes in our midst . 2 1.2 System z hardware architecture . 3 1.2.1 Consolidation of mainframes . 3 1.2.2 An overview of the early architectures . 4 1.2.3 Early system design . 5 1.2.4 Current architecture . 7 1.3 The raised floor . 7 1.4 Hardware management console . 9 1.5 Frames and cages . 9 1.6 Processor units . 10 1.6.1 Multiprocessors. 10 1.6.2 Processor types . 11 1.7 Memory hierarchy . 13 1.8 Networking the mainframe . 14 1.9 Disk devices . 14 1.9.1 Types of DASD . 16 1.9.2 Basic shared DASD . 17 1.10 I/O connectivity (channels) . 18 1.10.1 Channel subsystem . -
IBM System Z10 Capacity on Demand
Front cover IBM System z10 Capacity on Demand Describes the concepts and structure of Capacity on Demand Explains the offerings and how they can be applied Provides step-by-step examples Marian Gasparovic Greg Chambers Ivan Dobos Per Fremstad Torsten Gutenberger Damian Ortega Lumbreras Rolf Mueller Karl-Erik Stenfors Yi Li Zhou ibm.com/redbooks International Technical Support Organization IBM System z10 Capacity on Demand January 2009 SG24-7504-01 Note: Before using this information and the product it supports, read the information in “Notices” on page vii. Second Edition (January 2009) This edition applies to the IBM System z10 servers. © Copyright International Business Machines Corporation 2008, 2009. All rights reserved. Note to U.S. Government Users Restricted Rights -- Use, duplication or disclosure restricted by GSA ADP Schedule Contract with IBM Corp. Contents Notices . vii Trademarks . viii Preface . ix The team that wrote this book . ix Become a published author . xi Comments welcome. xi Chapter 1. Overview . 1 1.1 System upgrades . 2 1.2 Capacity on Demand on the System z10 . 3 1.3 Provisioning architecture. 7 1.4 z/OS Capacity Provisioning. 11 1.5 Terminology . 14 Chapter 2. Understanding the Capacity on Demand environment . 17 2.1 Capacity on Demand upgrades. 18 2.1.1 On-line Permanent Upgrade . 20 2.1.2 Capacity Backup . 20 2.1.3 Capacity for Planned Events. 26 2.1.4 On/Off Capacity on Demand. 27 2.2 Multiple activations . 35 2.2.1 Multiple active temporary offerings . 35 2.2.2 Permanent upgrade with temporary offerings active. 39 2.2.3 Subcapacity activation . -
IBM Zenterprise Redundant Array of Independent Memory Subsystem
IBM zEnterprise redundant P. J. Meaney L. A. Lastras-Montan˜o array of independent V. K. Papazova E. Stephens memory subsystem J. S. Johnson L. C. Alves A The IBM zEnterprise system introduced a new and innovative J. A. O’Connor redundant array of independent memory (RAIM) subsystem design as W. J. Clarke a standard feature on all zEnterprise servers. It protects the server from single-channel errors such as sudden control, bus, buffer, and massive dynamic RAM (DRAM) failures, thus achieving the highest System zA memory availability. This system also introduced innovations such as DRAM and channel marking, as well as a novel dynamic cyclic redundancy code channel marking. This paper describes this RAIM subsystem and other reliability, availability, and serviceability features, including automatic channel error recovery; data and clock interface lane calibration, recovery, and repair; intermittent lane sparing; and specialty engines for maintenance, periodic calibration, power, and power-on controls. Introduction and other symbol-oriented codes have been used by IBM and The IBM zEnterprise* 196 (z196) represents a significant others to improve memory reliability. This more advanced leap forward in reliability and availability of the memory ECC technology is capable of detecting, isolating, and subsystem. This new memory design, combined with the correcting full memory chip failures and memory bus microprocessor and cache subsystem enhancements, achieves failures [2]. higher capacity, higher performance, and higher reliability, In addition to ECC, other techniques have been used to compared with previous designs [1]. improve memory reliability. For instance, scrubbing was Memory size and density have continued to increase added to periodically read and write memory to correct substantially as computer systems have become more soft errors. -
IBM Z14 Model ZR1 (M/T 3907) Technical Leadership Library
IBM z14 Model ZR1 (M/T 3907) Technical Leadership Library April 10, 2018 Announcement John McLemore, z Client Architect [email protected] 214-679-8484 IBM Z (M/T 3907) TLLB1 © 2017, 2018 IBM Corporation Trademarks The following are trademarks of the International Business Machines Corporation in the United States, other countries, or both. Not all common law marks used by IBM are listed on this page. Failure of a mark to appear does not mean that IBM does not use the mark nor does it mean that the product is not actively marketed or is not significant within its relevant market. Those trademarks followed by ® are registered trademarks of IBM in the United States; all others are trademarks or common law marks of IBM in the United States. For a more complete list of IBM Trademarks, see www.ibm.com/legal/copytrade.shtml: *BladeCenter®, CICS®, DataPower®, Db2®, e business(logo)®, ESCON, eServer, FICON®, IBM®, IBM (logo)®, IMS, MVS, OS/390®, POWER6®, POWER6+, POWER7®, Power Architecture®, PowerVM®, PureFlex, PureSystems, S/390®, ServerProven®, Sysplex Timer®, System p®, System p5, System x®, z Systems®, System z9®, System z10®, WebSphere®, X-Architecture®, z13™, z13s™, z14 ™, z14 Model ZR1™, z Systems™, z9®, z10, z/Architecture®, z/OS®, z/VM®, z/VSE®, zEnterprise®, zSeries®, IBM Z ® The following are trademarks or registered trademarks of other companies. Adobe, the Adobe logo, PostScript, and the PostScript logo are either registered trademarks or trademarks of Adobe Systems Incorporated in the United States, and/or other countries. Cell Broadband Engine is a trademark of Sony Computer Entertainment, Inc. -
IBM System Z10 Enterprise Class Configuration Setup July 2008
Front cover IBM System z10 Enterprise Class Configuration Setup Plan I/O configuration for new processor or upgrade Configure I/O environment, STP, cryptographic adapters Step-by-step configuration definition examples Franck Injey Peter Hoyle Masaya Nakagawa Frank Packheiser Karan Singh ibm.com/redbooks International Technical Support Organization IBM System z10 Enterprise Class Configuration Setup July 2008 SG24-7571-00 Note: Before using this information and the product it supports, read the information in “Notices” on page vii. First Edition (July 2008) This edition applies to the System z10 Enterprise Class server. © Copyright International Business Machines Corporation 2008. All rights reserved. Note to U.S. Government Users Restricted Rights -- Use, duplication or disclosure restricted by GSA ADP Schedule Contract with IBM Corp. Contents Notices . vii Trademarks . viii Preface . ix The team that wrote this book . ix Become a published author . .x Comments welcome. .x Chapter 1. Channel Subsystem overview . 1 1.1 Channel Subsystem . 2 1.2 Logical partitions . 4 1.3 Subchannel sets . 5 1.4 Channels . 7 1.5 The definition for Multiple CSS . 15 1.6 Activation. 17 Chapter 2. Configuration planning . 19 2.1 Tools . 20 2.1.1 IBM Configurator for e-business (e-Config) . 21 2.1.2 Resource Link . 21 2.1.3 Hardware Configuration Definition (HCD). 21 2.1.4 Hardware Configuration Manager (HCM) . 22 2.1.5 Input/Output Configuration Program . 23 2.1.6 CHPID Mapping Tool . 24 2.2 Hardware Management Console (HMC). 26 2.2.1 Hardware Management Console Application V2.10.0 . 30 2.2.2 Remote Support Facility (RSF) . -
Z10 EC System Overview Level 06B, February 2011
System z10 Enterprise Class System Overview SA22-1084-06 Level 06b, February 2011 System z10 Enterprise Class System Overview SA22-1084-06 Level 06b, February 2011 Level 06b, February 2011 Note Before using this information and the product it supports, read the information in “Safety” on page xi, Appendix D, “Notices,” on page 151, and IBM Systems Environmental Notices and User Guide, Z125-5823. | This edition, SA22-1084-06, applies to the IBM System z10 Enterprise Class (z10 EC) server. This edition replaces | SA22-1084-05. Technical changes to the text are indicated by a vertical bar (|) to the left of the change. There might be a newer version of this document in a PDF file available on Resource Link.Goto http://www.ibm.com/servers/resourcelink and click Library on the navigation bar. A newer version is indicated by a lowercase, alphabetic letter following the form number suffix (for example: 00a, 00b, 01a, 01b). © Copyright IBM Corporation 2008, 2011. US Government Users Restricted Rights – Use, duplication or disclosure restricted by GSA ADP Schedule Contract with IBM Corp. Level 06b, February 2011 Contents Figures ..............vii Power sequence controller .........31 Additional features/functions supported ....31 Tables ...............ix Monitoring and estimating CPC power consumption and temperature .......31 Preplanning and setting up the Storage Area Safety ...............xi Network (SAN) environment .......32 Safety notices ..............xi World trade safety information .......xi Chapter 3. Software support .....33 Laser safety information ..........xi z/OS ................34 Laser compliance ...........xi z/VM ................35 z/VSE ................35 About this publication ........xiii Linux on System z ............36 What is included in this publication ......xiii TPF.................36 Revisions ..............xiii Prerequisite publications..........xiii Chapter 4. -
Classification of Computers
Classification of Computers Computer systems used for business purposes can be divided in to three classes: Microcomputers, Minicomputers and Mainframe computers. Though these divisions are loosely based on the size of the computer systems, there are no hard and fast rules for deciding exactly where one category ends and the next begin. Hence the largest minicomputer systems are often larger than the smallest mainframe computers. The “size” of a computer system is dependent on the size of a computer’s hardware configuration, the nature of its applications, and the complexity of its system software. This helps us to classify a system as a microcomputer, minicomputer or mainframe. Irrespective of size, all computers consist of two basic types of components. Those are processors and input/output (I/O) devices. The processor consists of three parts: the Central Processing Unit, or CPU, main storage and device controllers. The CPU executes instructions, main storage stores instructions and data processed by the CPU and device controllers let the CPU and main storage connect to I/O devices. Note: Though all computer systems consist of three basic components, the way those components are combined for a particular computer system varies depending on the system’s requirements. Microcomputer or Personal Computer Microcomputer is primarily intended for stand-alone use by an individual. Microcomputers are small, single-user systems which provide a simple processor and just a few input/output devices. This system consists of a processor with 2 or 4 GB of main storage, a keyboard, a display monitor, a printer, and a diskette drive with a capacity of 4GB and a 500 GB of hard disk.