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A Machine-Independent Microprogram

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A Machine-Independent Microprogram A MACHINE-INDEPENDENT MICROPROGRAM DEVELOPMENT SYSTEM THESIS Submitted in Fulfillment of t he Requirements for the Degree of MASTER OF SCIENCE of Rhodes University by MICHAEL JOHN WARD December 1986 SYSMW ACKNOWLEDGEMENTS. I express my sincere gratitude to my supervisor, Peter Clayton for his help and encouragement during the development of this thesis. His assistance with all aspects of the project is truely appreciated. I thank my mother for her love and support and especially my late father, who persuaded me to tackle the degree but who is unfortunately unable to witness its completion. I am deeply endepted to my fiancee, Carry for her love and inspiration throughout the year. To fellow students John, Karen, Pete and Glenn, thanks for helping to make this project a truely memorable and enjoyable one. Finally I acknowledge the financial support of the Council for Scientific and Industrial Research and Rhodes University. (-i-J Acknowledgements SYSMW ABSTRACT The aims of this project are twofold. They are firstly, to implement a microprogram development system that allows the programmer to write microcode for any microprogrammable machine, and secondly, to build a micro programmable machine, incorporating the user friendliness of a simulator, while still providing the 'hands on' experience obtained from working with actual hardware. Microprogram development involves a two stage process. The first step is to describe the target machine, using format descriptions and mnemonic-based template definitions. The second stage involves using the defined mnemonics to write the microcodes for the target machine. This includes an assembly phase to translate the mnemonics into the binary microinstructions. Three main components constitute the microprogrammable machine. The Arithmetic and Logic Unit (ALU) is built using chips from Advanced Micro Devices' Am2900 bit-slice family, the action of the Microprogram Control Unit (MCU) is simulated by software running on an IBM Personal Computer, and a section of the IBM PC's main memory acts as the Control Store (CS) for the system. The ALU is built on a prototypi ng card that pl ugs into one of the slots on the IBM PC's mother board. A hardware simulator program, that produces the effect of the ALU, has also been developed. A small assembly language has been developed using the system, to test the various functions of the system. A mini-assembler has also been written to facilitate assembly of the above language. A group of honours students at Rhodes University tested the microprogram development system. Their ideas and suggestions have been tabulated in this report and some of them have been used to enhance the (-ii-) Abstract SYSMW system's performance. The concept of allowing 'inline' microinstructions in the macroprogram is also investigated in this report and a method of implementing this is shown. (-iii- ) Abstract SYSMW CONTENTS. 0..!tline PART 1 5 Section 1 Introduction 6 1.1 Introduction to Microprogramming ..................... 6 1.2 History and Perspective .....•......................•.. 8 1.3 Vertical Migration ................................... 12 1.4 Microprogramming Terminology ......................... 14 1.5 Microprogram Development Systems ..••••..............•. 16 1.6 The Design Objectives of SYSMW ...•.•••.....•.......••• 19 Section 2 General Concepts and Scope 23 2.1 Requirements of Development Systems ..•.•....•.•.....•• 23 2.2 SYSMW in the context of Table Driven Assemblers . 25 2.2 .1 Ml.chine Description . • . • . • . • . • . • • . 25 2.2.2 Micro-code Development . • • . • • • . • • . • . 27 2.3 SYSMW and Microprogrammable Ml.chines and Simulators 29 2.4 SYSMW testing and Inline Microcode ..........•••.....•. 30 Section 3 Comparisons with other Systems 33 3.1 Microprogramming languages and Simulators 33 3 .1.1 Microprogramming Languages . .. .. ...••..... .. ... 33 3.1.2 AMD's SYS 29 ..................................... 38 3 .1.3 Simulators . .. .• . .. .. 39 3.2 Survey and Recent Developments in Bit-Slice components 41 Section 4 Discussion and Conclusions 43 4. 1 Discussion 43 4.2 Conclusions 45 (-iv- ) Contents SYSMW PART 2 47 Section 1 Design details 48 1.1 Introduction 48 1.2 The Target Ml.chine definition Program 50 1.3 The Microcode definition Program 56 1.4 The Development $ystem in Use 62 1.5 The Microprogrammable Ml.chine .............•... ..•.•••• 67 1.6 The Arithmetic Logic Unit hardware .......•....... .. ... 73 1.7 The Microprogram Control Unit emulator .....•••........ 80 1.8 ALU Simulator ....••...•.••...•...•...•................ 87 Section 2 Example 89 2 .1 Introduction 89 2.2 The Ml.chine Language Instructions 92 2.3 The Mini-Assembler program 96 Section 3 A User's guide ....•.............................. 100 3.1 Introduction . • . • . • . • 100 3.2 Micro 1 Program . • . • . 100 3.2.1 (N)ewfile option ................................. 102 3.2.2 (U )pdate option . 105 3.2.3 (P)rint option 107 3.2.4 (S)etup option 108 3.2 .5 Error messages 109 3.3 Micro2 Program • . .. 110 3.3 .1 (W)orkfile option .. .. .. 111 3.3.2 (E)ditfile option 112 3.3.3 (P)rintfile option 115 3. 3.4 (A)ssemble option 116 3.3.5 Error messages 117 3 . 4 Elnula tor Program 118 3.4.1 (R)un option 119 (- v- ) Contents SYSMW 3.4.2 (S)ingle option 119 3.4.3 (E)dit option 120 3.4 .4 (D) -bus option 120 3.4.5 (T)race option 121 3.4.6 (L)ook option 121 3.4.7 (M)PC option 121 3.4.8 (P)eek option ....•..••......••••...••••..•••••.•. 121 3 .4 .9 Error messages .•..•..•...•.•.••••.••••.•.••.•..•. 122 3.5 AssemMW Program ..•......•.••....•.••.•••••••••...•.... 122 3.5.1 (E)dit option ..•••••••••...••• •• .• ••• . ••• ....•.•• 123 3.5.2 (A)ssemble option .•.••.•••••••.•••..••.•••....••• 123 3.5.3 (P)rint option ..••...•••• •• ••• • •..•.•..••.••....• 123 Bibliography 124 Appendices . • . • . •. • • . .• • . • • • . •• . •. • . •. •• • . • • . •• . • A.1 A : Micro 1 program • . • • . • . • • . • • . • . • • . • A. 1 A. 1 Micro 1 listing • . • • . • • • . • • . • . • . • . • . • • . • . A. 1 A.2 Micro 1. PRN include file . • . • . • . • •• . • . •• • A.34 B Micro2 pr ogram .......•.••...•.....•....••.....•.......• B.1 B.1 Micro2 listing .•....•..••....•.•..•.....••.•..•..•• B.1 B.2 Micro2.PRN include file .•..•......•.•..••.••....• • B.30 B.3 Micro2. ASM include file • . • . • . • • • . • . • • B.40 C Elnulator program ......•..•. • ......•..••••.....•.•.....• C.1 C.1 Elnulator listing •......•................••...•...•. C.1 C.2 Elnulator .SIM include file ........•....••.........• C.33 D AssemMW program .•.••....... •••. ..........••.•....•..... D.1 D. 1 AssemMW listing .....••.••.............•.••...•..... D.1 E Help files E.1 E.1 Micro 1 helpfile E.1 E.2 Micro2 helpfile E.5 E.3 Elnulator helpfile E.8 (-vi- ) Contents SYSMW F Micro-order function tables . F. 1 G Example file listings . G. 1 G.1 Format file ........................................ G.1 G.2 Definition file .........................•.......... G.3 G.3 Table file ......................................... G.16 G.4 Macroinstruction definition file ................... G.29 G.5 Decode file . • . • . • . G. 34 G.6 Instruction file ......•............ • ......•...•...• G.35 G.7 Control Store . • . • . • • . G. 38 H Circuit diagrams H.1 H.1 Decode Circuits H.2 H.2 Wire-wrapped Circuit H.4 (-vii- ) Contents SYSMW TABLE OF FIGURES. Part 1.1 Schematic diagram of a generalised computer 6 1.2 Schematic diagram of a microprogrammable CPU 7 1.3 Graph of richness of instruction set repertoire vs cost 11 Part 2 1 .1 The microcode development system 48 1.2 The microprogrammable machine ...................•••.••. 49 1.3 The Micro 1 program files ..•••••....................•... 50 1.4 The Micro2 program files •...•....................••..•• 56 1.5 Layout of the code and micro files .................•..• 58 1.6 Schematic diagram of the processor circuit ..••......... 63 1.7 Control path schematic of the Triple-M machine ........• 69 1.8 Data path schematic of the Triple-M machine 70 1.9 The microinstruction fields 73 1.10 Schematic diagram of the ALU . • . .. 74 1.11 Connections between the ALU and MCU ..••................ 75 1 .12 The bread board ALU 76 1. 13 The wire wrapped prototyping board 77 /8 1. 14 Port assignment diagram 79 1 .15 The Emulator program files 80 2.1 The inline instruction data paths 95 2.2 The AssemMW program files 97 3.1 Micro 1 menu hierarchy 101 3.2 Micro2 menu hierarchy 110 3.3 Emulator menu hierarchy 118 C-viii- ) Table of figures SYSMW OUTLINE. This thesis, presented in two parts, describes SYSMW, a micropr ogram development system. Part 1 looks at the field of microprogramming in general and the underlying motivations for designing this type of system. SYSMW is discussed in terms of its broad principles and comparisons are drawn with other similar systems. Part 1 concludes with a critical assessment of the project and a discussion of possible research projects for which SYSMW may be used. Part 2 deals with the design details of the system. The software and the hardware are discussed and an example architecture is presented. Part 2 also includes a user's guide for the system. The appendices contain listings of the 'TURBO' Pascal [TUR] code, circuit diagrams, further data pertaining to the hardware, and the example architecture files. PART 1 1 : Introduction This section describes microprogramming systems in general. It includes a short history of microprogramming and discusses why microprogramming has become a plausible design option for the systems engineer. Two main areas of research in this field are identified, namely
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