Evolution of the Command Subsystem for the Nimbus Family of Satellites

The Space Congress® Proceedings 1968 (5th) The Challenge of the 1970's

Apr 1st, 8:00 AM

John Pluth California Computer Products, Inc.

Follow this and additional works at: https://commons.erau.edu/space-congress-proceedings

Scholarly Commons Citation Pluth, John, "Evolution of the Command Subsystem for the Nimbus Family of Satellites" (1968). The Space Congress® Proceedings. 3. https://commons.erau.edu/space-congress-proceedings/proceedings-1968-5th/session-17/3

This Event is brought to you for free and open access by the Conferences at Scholarly Commons. It has been accepted for inclusion in The Space Congress® Proceedings by an authorized administrator of Scholarly Commons. For more information, please contact [email protected]. EVOLUTION OF THE COMMAND SUBSYSTEM FOR THE NIMBUS FAMILY OF SATELLITES

John Pluth, Jr. California Computer Products, Inc. Anaheim, California

Summary General

There are four satellites included in the The command data link includes a Ground NIMBUS spacecraft family. Two satellites Station, Receiver, and Command Clock. The have been launched, the third is about to Ground Station transmits the data to the be launched, and the fourth is presently spacecraft receiver which demodulates, being developed for launch in 1969. A detects, and sends binary data bits on Command Clock Subsystem is part of every three channels to the Command Clock for NIMBUS Satellite, and each satellite has decoding and processing. The Ground Sta a Command Clock Subsystem which differs tion data to be sent to the Command Sub with its predecessor. A discussion of the system is processed by frequency modula differences among the Command Clock Sub ting three subcarriers and then trans systems is the purpose of this paper. mitted to the spacecraft by amplitude modulation. Four additional amplitude- modulated subcarriers are transmitted to Introduction perform emergency control. For NIMBUS D, the four individual subcarriers are added in pairs, before being amplitude-modulated, The NIMBUS family of satellites is used to provide six commands for emergency pur to support meteorological research and poses. It is through this Ground Station development. Included in this family are to spacecraft data link that control of the NIMBUS A, C, B, and D spacecrafts, all instrumentation on board the spacecraft which appear in that order. All NIMBUS is achieved. During the course of develop spacecrafts have been designed and devel ing the different Command Clock Subsystems, oped under the management of NASA's God- there have been refinements to increase the dard Space Flight Center. The function of reliability and functional capability of the spacecrafts is to serve as orbiting each. The increased performance was neces test beds for instrumentation to collect sary as each spacecraft added more instru weather data and perform other scienfitic mentation, thus, requiring more control experiments. Subsystems, other than exper with greater reliability. iments, are provided on the spacecraft to aid and control the experiments. These The basic operation of each Command Clock subsystems, among others, are used to pro Subsystem is similar in that they provide vide attitude control, primary power, precision frequency outputs for experiment telemetering, data recording, transmit synchronization, stored commands for ting, command control, and reference delayed command executions during the frequencies. course of an orbit, real time and time code modulated outputs for information correla Many organizations have collaborated in tion, and relay matrix drivers for satel developing the various subsystems for the lite subsystems control. The input/output NIMBUS satellites. Although each subsys functions of each Command Clock Subsystem tem was developed in accordance with are similar in function but differ in specific individual requirements, all had quantity. A comparison of the input/output to meet the design objectives of survival functions and quantity for each Command under severe environmental stresses during Clock Subsystem is shown in Table 1. launch and at least six months operation in orbit. For NIMBUS D, the design goal for operation in orbit is a minimum of one NIMBUS A, Command Clock Subsystem year. California Computer Products,'Inc. . (CalComp) has been involved in the NIMBUS program since 1960. The NIMBUS A Spacecraft was the first of the series. It was launched in autumn CalComp's responsibility has been the 1964. Its orbital, life lasted approxi design and development for all of the mately one month. The failure was due to Command Clock Subsystems used in the NIM a power lost because the solar cell panels BUS spacecrafts• Each succeeding Command could not be controlled to keep them Clock Subsystem provided more capability oriented toward the sun. The bearings in than its predecessor* Although each Com the motors to drive the solar cell panels mand Subsystem's external function is froze, making panel positioning inoperative* similar, it is the internal mechanization and increased functional capability that While on board the .NIMBUS A Spacecraft, varies . the Command Clock performed its functions well.

17.2-1

Level)

level)

200kHz, 200kHz,

10kHz

IkHz,

(high (high

(low (low

2.5kHz, 2.5kHz,

and and

Columns

50kHz, 50kHz,

Strobe

Plug

———————————————

500Hz, 500Hz,

3 3

30 30

2.5kHz, 2.5kHz,

phase phase

^ ^

Duration

(5)

*N/A

- -

Commands

(3)

2 2

1.6mHz

2 2

(46) (46)

(20) (20)

(40) (40)

Data, Data,

- -

10kHz, 10kHz,

2.4kHz, 2.4kHz,

Strobe, Strobe,

Strobe

lOHz, lOHz,

Keying Keying

480 480

Rows Rows

- -

Message Message

16 16

Mode, Mode,

PDM, PDM,

lOOHz lOOHz

Modulated Modulated

400Hz 400Hz

IHz, IHz,

5kHz, 5kHz,

*N/A

2kHz, 2kHz,

400kHz, 400kHz,

32 32

Data, Data,

————————— —————————

x x

are are

10kHz

and and

(some (some

Box)

clocks clocks

Columns) Columns)

Sync

——————————

Plug

PDM

2.5kHz, 2.5kHz,

phase

(48) (48)

(4) (4)

*N/A

J8 J8

16 16

(20) (20)

(18) (18)

(6)

2 2

Plus Plus

- -

Strobe, Strobe,

Command Command

Commands Commands

Keying Keying

Interface Interface

Rows Rows

- -

Character Character

redundant)

170 170

lOOHz lOOHz

Minitrack Minitrack

1.6raHz

400HZ 400HZ (Two (Two

Modulated Modulated

8 8

Data, Data,

(8 (8

———————— ————————

Satellite Satellite

50kHz

, ,

and and

NIMBUS NIMBUS

Columns

Sync

Plug

lOHz lOHz

PDM/NRZ

Word

phase

for for

16 16

Subsystems

(2) (2)

(24) (24)

(5) (5)

(20)

(19)

(3) (3)

2 2

*N/A

Signal

- -

Commands

- -

Strobe, Strobe,

Code Code

Hz Hz

Keying Keying

128 128

Clock Clock

Rows Rows

- -

Character Character

1/8 1/8

8 8

Data Data

lOOHz lOOHz

Minitrack Minitrack

Modulated Modulated

400Hz 400Hz

1 1

4 4

Data, Data,

Functions Functions

50kHz

Columns

Sync

lOHz, lOHz,

phase

16 16

Commands

2 2

(24) (24)

(3)

(20)

- -

(20) (20)

(3) (3)

*N/A

- -

*N/A

128 128

8 8

IHz,

400Hz 400Hz

Modulated Modulated

Pulse

nc nc

Dr Dr

•

1 1

: :

1 1 It interfaced with three experiments plus • The operation, of best the other service-type subsystems to pro be explained with aid of block vide them with timing and command signals. diagram. in Figure 1*

Interface .. outputs to Amplifiers Inter face

Sequence Input Control and Internal, Signals" Input Timing Register i i Logic Control and Recirculation Telemetry Telemetry Flip-Flops and Gates Signal Outputs to Condit ioning Interface

Write Delay Line Memory Buffer Minit rack AMP and Minitrack Storage Outputs to Interface

Write Delay Line Memory ,AMP Command Storage

Control Data

Outputs of Control Row and Column - 8' x 16 Control Matrix Flip- Matrix Matrix: to Plop Register Amplifier Interface

Internal D-C Power Levels

-24* 5 vole Flux OSC —— p» Secondary f ' Regulator

1 NIMBUS A Command Clock Subsystem Functional Block Diagram

17.2-3 The basic operational parts of the Command As can be seen, the W channel carried the Clock other than the power supply, drivers, command information in the form of a 5-bit and telemetry networks are a precision character transmitted NRZ (non-return-to- crystal oscillator, time-based generation, zero) ; four bits contained the data, and delay line memories, control matrix flip- the fifth bit contained the odd parity in flop register, and the relay matrix dri dication. The maximum data rate was 120 vers. The oven-controlled precision bits per second. The X and Y channels were crystal oscillator provided an 800-kHz 7 timing signals to ensure synchronization signal which was stable to 1 part in 10 . of the satellite clock. The X signal was a The oscillator drove an internal pulse reference square wave 90 degrees out of generator which clocked all the flip-flops phase with W, and Y was a character sync in the Command Subsystem. The time-based channel with a pulse marking the parity bit generator consisted of a series of flip- time of the channel. flops to divide the 800-kHz signal to pro vide various reference frequencies at the The data word for the Command Clock Sub interface. Each frequency exhibited the system consisted of 12 BCD characters (48 same relative precision due to its common bits). The first character was a flag origin. character for satellite identification, The next ten characters were data charac Three input channels were required to com ters, indicating time or indicating a com municate with the Command Subsystem. The mand instruction with time of execution. three channels provided data bits, bit The last character was an ENTER code to synchronization, and parity bit synchroni store the data into the command storage zation. Figure 2 shows the relationship delay line. Each command was transmitted among the three input channels which are twice; the second command was rejected* if designated as the W, X, and Y signals. the first entered the stored command mem ory correctly. As each character was received by the Command Clock, it was pro BCD Char-4 cessed through the timer delay line memory Data where the message was parity checked and stored until a full word was received. The timer memory was divided into four 0 X sectors as shown in Figure 3. 1 Strobe 0 ~LJ Char. Y 1 u J Sync. FIGURE 2 NIMBUS A Command Clock Input Channels Waveform, Relationship

Ty ^m. 1 " I 1 Write Coarse Time Fine Time Input Buffer Input Buffer [ ,^| Read |_j 1 FF 40 Bits 40 Bits Ho. 2 40 Bits | No. 1 40 Bits | ^ FF f~^ Timer Delay Line Memory

CM H O CTi CD l> VD U"» IT)01 roCO m ro ro r^r^mrnf^cvicNrxicNicxtcNi CM CM CM CM H 1 H i— i H; H H H ' H •— i H o o oooooooo BCD 10 I All input !••••••— characters Input Buffer No. ' 1 entered here BCD 9 BCD 8 BCD 7 BCD BCD BCD BCD BCD' BCD BCD or or or 10 Oct 3 Oct 2 Oct 1 6 5 4 3 2 1 Station Hundreds Tens Units Tens Units Tens Units Tens '-Units Data Days or Days or Days or Hrs. Hrs. Min, Min, Sec., Sec., • Com, Bits Com, Bits Com. Bits Input Buffer No. 2 BCD BCD

Tenths Hundredths Seconds Seconds JEjLne Tinte Counter

BCD BCD BCD BCD BCD BCD BCD BCD BCD BCD 10 9 8 ? 6 5 4 3 2 1 slalloii Hundreds fens ifnlti Tens Units fens Units Tens Units Data Days Days Days Hrs* Hrs. Min. Min., Sec* Sec,. Coarse Time Counter

FIGURE 3 Timer Delay Line Memory Sectors 17,24 Two sectors served1 as input buffer regis execution compared with the coarse time ters* The third sector was a real time counter in the timer loop. When agreement counter capable of being updated by com occurred, the command was gated into the mand. The fourth sector, designated the control matrix flip-flop register where it fine time counter, served as a divider of was decoded to select the appropriate the IQQ-Hz signal to provide a 1-Hz signal column and row drivers of the relay matrix output• drivers. Since it had an 8 x 16 matrix, the Command Clock was capable of executing The Buffer No, 1 register held each, char 128 different commands. The duration of acter until parity checked. The character the command execution was 68 milliseconds. was then shifted into the Buffer No. 2 All five storage commands could be exe register where the ten data characters cuted, within, a minimum time of five sec were collected, before being transferred to onds or be delayed up to 24 hours. the command storage delay line memory shown in. Figure 4 * The infoxma.ti.on was Aside from the frequency outputs, telem stored in the command storage delay line etry outputs, and command outputs, the 1 ocat i on, de s ignated by the ENTER code . Command Clock Subsystem transmitted B. There were five different ENTER codes, one Minitrack time code output, which contained for each command storage memory location. the clock real-time information. This output was a continuous pulse-width modu The command storage memory contained in lated (PWM) signal divided into ten 100- formation on. what command was to be exe millisecond intervals, representing a real cuted and the time of execution. Each time. Figure 5 shows the Minitrack Time word of the stored co^mmand had its time of Code Format.

Write Read -fc*. Sector 14 Sector 13 Sector 12 Sector 11 Sector 10 —^. FF FF

Capacity - 200 bits Circulation - 800 kHz Bit Time "- 1.25 |j,sec

FIGURE 4 Stored Command Delay Line Memory

fford Syncj fharac. Sync, •^-100 ms ———*•

111110 BCD 000001 BCD BCD BCD BCD BCD 8421 8421 8421 000001 8421 000001 8421 000001 8421 Units Tens l\ Units Tens Hundreds Seconds Days One bit = 10 ms

FIGURE 5 Minitrack Time Code Format Construction

Packaging

Weight

Size

Components

Memory

Printed

Environment

Reliability

Power

(nominal)

Characteristics

Input

Device

Physical

Circuits

One

Volume: 6"

Discrete

Two

only Non NIMBUS 5 2 NASA 18

-24.

Nickel-plated, Covers

magnesium

ined

MTBP*

delay

stored

pounds

Nov.

^Redundant

Box

sided

Specification

case

logic

Clock

NIMBUS

are

lines

1960

components,

0.36

commands

5 s

alloy.

boards

one

percent

flat

gates

components

Subsystem

cast

13 cu.

Physical A

side

mach

stock.

(orbit)

ft.

for

Characteristics

Command

One

Volume:

Discrete

diode

Two mounted 20

only Meteorological NASA

2 Specification craft

-24,

magnesium Nickel-plated, Covers

ined

delay

pounds

stored

-Redundant

Box

sided:

Environmental

—

case

logic

5 ±

Clock

NIMBUS

are

on one on

lines

components,

0.36

of alloy.

boards

gates flat

components

Subsystems

cast

cu 13"

for

2 of C

side

mach

Apr

stock.

NIMBUS

ft.

,1964

Satellite

-24*5v

Three

Volume:

Discrete 2

mechanical

diode

Total

Nickel-plated,

Covers

magnesium

ined

Boxes

Box-

sided;

—

16, 51.1

logic

± 6

0,90

alloy. of

u ft, cu,

mach

-24.5v

32 8

22,

13"

I :

I | ; | |

I 1 | | | : |

1 I This time code was made available to the addition to its output capability increase, other subsystems in the satellite in serial it also had some refinements in its inter fashion. The NIMBUS A Command Clock Sub nal logical operation. The NIMBUS A Com system generated two other Mini-track out mand Clock Subsystem block diagram shown puts. These were coherent 10-kHz and in Figure 1 is still applicable for 50-kHz carriers amplitude modulated by the describing the operation of the NIMBUS C Minitrack binary time code. Command Clock Subsystem? however, changes have been made within, the blocks. The Information pertaining to the physical most significant changes have been the ••characteristics of the NIMBUS A Command replacement of the 800-kHz signal source Subsystem is shown in. Table 2. with a 3,2-mHz oven-controlled crystal oscillator. The reason for the increased frequency is that the 3.2~mHz crystal, oscillator exhibited, more stability as crystals are more suitable for operation at the higher frequencies. Another change The NIMBUS C spacecraft was launched on in the C. internal mechanization was 15 May 1966. As of this writing! some of the Increase in the amount of storage in its subsystems have stopped operating, but both the timer and command storage delay others are still functioning to provide 1 i. ne memor I e s. A n add it I ona 1 woo:A wa s useful weather data. For the most part, to the -timer memory, and 11 words the satellite has exceeded its operational were to the storage memory* goal of six months in orbit and the Com The new word, added to the tinier memory mand Clock Subsystem on board is one of used as a data output buffer register. the subsystems still operating. Besides the addition of this output buffer, additional, functions were implemented in The NIMBUS C Command Clock Subsystem the input buffer No. 1 and. the fine time- interfaced with four experiments. Its counter registers,. Figure 6 shows the operation is the same as that of NIMBUS A configuration of the timer memory. except that it had an increase in its out put capacity as indicated in Table 1. In

Input Buffer No. 1

totototoiototoroM- • - • - HJoo i-j j-j f-j * p o p p o p 2 19 2 18 2 17 2 16 2 B 2 14 ^l^ll^^S ;27262524 | 2 3 2 2 2 12 0> 8421 1 Enter Code . Timeout Counter

Input Buffer No. 2

LO GO LO LO CO LO LO OO to u> ro to to to to to to 10 to ro h-1 M O O oooo o o o o kD CD ~-J O^ UI ,£> LO tO M O kD 00 to to H-' o O 00 -0 CT* KEC£ h-* O <£> 00 -~j (Pi Ln rf^ UJ NJ J— * O | 8 4 2 1 | 8 4 2 1 | 8 4 2 1 8 4 2 1 | 8421 8421 8421 8421 8421 8 4 2 1 | Station H.Days T.Days U.Days Tens Units Tens Units Tens Un its Data or or or Hours Hours Minutes Minutes Seconds Seconds H .Command T. Command U. Command Fine Time

(A) U) U> U> UJUJOJU! UJUJlONJ tOOOWtO tOtOKJK) (—< |—' H-4 I—' 'MOO OOOO OOOO U) QQ -J Cft Ui*>>U>tO I—'O^DOD -JCTsinj^ OJtOh-'O ^00-J "O^DOO -J CT» U~i .£*, LO to t—« o

b 4 2 1 I 8 4 2 1 i i 1 1 8421 8421 All 1's Fill Sector .1 .01 A11 O's Counter Seconds Seconds —i (Binary) (Binary) -«* ——— Frame —— >- Counter I Coarse Time

OJ UJ CO U) OJ OJ LO OJ j (V5 tO (O tO co to to to H* M O O oooo oooo VO' 00' **«J O** h-1 O IO GO OJ to M O ss^s KECK M O VO 00 U> IO (-» O 8 4 2 1 | 8 4 2 1 18421 8 4 2 1 8421 >8 4 2 ] 1 OQ *s/* OZ .L| 8 4 2 1 8421 8421 Station Hundreds Tens Units Tens Units Tens Units Tens Units Data Days Days Days Hours Hours Minutes Miniates Seconds Seconds Output Buffer

OOOO' u» u> to to to to to to HHOC3)i™* o : yD 'ijo OOOO*«4 ! Cr\ : i

FIGURE 6 NIMBUS C Command Clock Timar Delay Line Registers 17.2-7 Input buffer No. 1 register contained a Clock were not directed toward a more com binary "timeout" counter which determined plex system and increased capability/ but the time duration since the last Ground rather a tend toward simplifying the func Station command access, and issued two com tional operation and increasing the relia mand matrix timeout commands for emergency bility to ensure the probability of mission purposes if the duration exceeded nine hours, success, Other functions of the buffer No. 1 register are the same as for the buffer in the NIMBUS To achieve redundancy and. "keep development A Command Clock Subsystem, The input buffer costs down., CalComp used modified NIMBUS C No. 2 register performed the same function type Command Clocks and OR'd their outputs as it did in NIMBUS A, through a third box* The third box served as an interface box and contained relays to The fine time counter register was changed. switch the output lines of either of the In addition to containing the counter which two Command Clocks, Operationally, both divided the 100-Hz signal to a 1-Hz signal, Command Clocks are turned on during launch* it also contained four other counters. These were a 6-bit binary counter to divide The basic individual NIMBUS B Command Clock a 1-Hz signal by 40 for establishing the differs from the NIMBUS C Command Clock as data code output word length; a 4-bit bi the result of some minor modifications. nary readout counter whose setting determined One modification was the addition of a log which of the 16 memory locations would be ical mechanization to reject patterned, transmitted over the data code word output spurious input pulses received on the three channel? a 4-bit binary sector counter which input channels. During the orbit of the defined the 16 memory word locations in the NIMBUS C spacecraft, it was discovered that stored command delay lines? and a 4-bit, this type of spurious noise was occasion binary counter which specified the memory ally being processed into the command sub location last filled. system. Another modification was the elimination of the data code words f thus The capacity of the command storage memory enabling the stored command memory to use was increased, to sixteen 40-bit words. a full 16 words of storage for delayed This memory was divided into two sections command executions. With the elimination designated as hot storage and cold storage. of the data code word, the Z. channel input The hot storage portion contained twelve was also eliminated as the "timeout 11 words for delayed command execution. The counter function. hot storage portion contained the remaining four words which were accessible by command The interface box is a self-contained unit only for use with other subsystems aboard housing 48 relays mounted on twelve printed the spacecraft. A fourth channel (Z chan circuit boards. The relays consist of nel) added to the NIMBUS C Command Clock latching and non-latching types. In addi Subsystem, was used to provide the input' to tion, the printed circuit boards contain initiate the data code word output action. discrete component OR gates for the input lines from the Command Clock Subsystems. Another change in the .Command Clock was Some of the relays can be pulsed: by either brought about by a NASA request that there Command Clock's command matrix through the be some new means Q : £ indicating that a OR gates. Further, for redundancy purposes, command was stored in the memory. In relay switching can be initiated by an NIMBUS A, the fact that a command must have unencoded command issued under Ground been stored properly could not be verified Station control. The signal flow diagram until telemetry signified a change in the of the interface box is shown in Figure 7. subsystem's condition as a result of that particular command being stored. To im The two command clocks and interface box prove upon this, a provision was made in combination not only provided, an increase the NIMBUS C Command Clock to send a veri in reliability through redundancy, but fication tone back to the Ground Station also an increase in stored commands to 32, by Way of the telemetry transmitter when and matrix driver fan outs to execute ever a command was successfully entered approximately 170 commands. The increase into the command storage memory. in the total commands which could be exe cuted was mechanized by using particular Physical characteristics of the NIMBUS C matrix drive lines of each Command Clock Co^mmand Clock Subsystem are shown in Subsystem independently of each other,. Table 2, Redundancy on certain, relay driver output lines considered to perform, prime functions limited the total, number of different com NIMBUS B_Ccjranan_d_C.lgck Subsystem mands to the 170 amount rather than the full 256. The NIMBUS B spacecraft is scheduled to be Physical characteristics of the NIMBUS C launched sometime during spring 1968* The Command Clock Subsystem are shown in Command Clock for this spacecraft is the Table 2. third of the series and interfaces with nine experiments on board the spacecraft* Because of the increase in the number of experiments arid because of the important role of' the Command Clock, NASA specified that this Command Clock be redundant. The design, objectives of the NIMBUS B Command 17.2-8

by by

lines lines

lines. lines.

lines.

each each

Clock Clock

5 5

Source. Source.

Telemetry Telemetry

or or

pulsed pulsed

A A

matrix matrix

be be phase, phase,

be be

Spacecraft Spacecraft

100 100

lines, lines,

Spacecraft

Spacecraft-

Lines

4 4

20 20

Digital Digital

To To

Voltage Voltage

Spacecraft

Clock Clock of of

per per Spacecraft

Clock Clock

To To

Spacecraft

To To

Spacecraft

To To

^»

>•

**•

—— ——

——— ———

_L^

— —

Plow

and

(MA),

100

(nonlatchinq)

relays.

redundancy

Set Set

reset

parallel.

of of

Signal Signal

transfer

gates gates

in in

and and

"OR" "OR"

to to

Box Box

-Fanning

Set Set

relays. relays.

wired wired

Used Used

(nonlatching) (nonlatching)

7 7

Network Network

negative negative

each each

signals.

Provide Provide

8 8

Buffer Buffer

coils coils

« «

for for

Interface Interface

BR13K-850-B2-12v BR13K-850-B2-12v

BR20AX BR20AX

relays. relays.

Each

FIGURE FIGURE

drive drive

Set Set

(MB) (MB)

4 4

Divider Divider

set set

available available separately

-Diode -Diode

type type

parallel. parallel.

gates. gates.

separately separately

Clock Clock

one one

in in

all all

type type SL

diodes.

matrix matrix

gates gates

"OR" "OR"

Voltage Voltage

relays. relays.

Resistor Resistor

Babcock Babcock

P&B P&B

coils coils

Command Command

wired wired

'sets: 'sets:

available available

D D

4 4

DPDT DPDT

DPDT DPDT steering steering

DPDT DPDT

positive positive

Drive Drive

P&B P&B SL

Reset Reset

4 4

coils coils

all all

12 12

16 16

of of

Quad-Diode Quad-Diode

NIMBUS NIMBUS

DPT DPT

Motor Motor

68K

16 16

replace replace

Reset Reset

1JJK 1JJK

,,,,„ ,,,,„

1 1

~^. ~^.

^""""""

>•

>»

>•

i*- ^

-»

-•->i

1 1

~~>fci

-T*

—— ——

«t

•€

«*-•

a€

A A

Clock Clock

YA1NS

Clock Clock

MA MA

From Clock Clock From

From From

W W

32 32

P&B P&B

of of

in in

in 8 NIMBUS p Command Clock Subsystem command executions, repeatability of exe cutions initiated by stored commands, and return to a one-package subsystem. The NIMBUS D Command Clock Subsystem is The logic mechanization requires the use the last of the series and is presently of integrated circuits, hybrid circuits, under development. It is a new design and and MOS shift registers. Packaging re will interface with eleven experiments on quires the use of multilayer printed board the spacecraft. The new design for circuit boards and flexible cabling for the NIMBUS D Command Clock Subsystem is interboard interconnections. required to incorporate the changes in design objectives. Its functional objec To achieve reliability, the NIMBUS D Com tives are the same, to process and issue mand Clock Subsystem is designed to be timing and command signals. selectively redundant. Selective redun dancy refers to switching various The design changes require an increase in sections of the total redundant sections reliability to achieve an orbital life of to obtain a full operating subsystem. at least one year, conformance to a stan Figure 8 shows a functional block diagram dard up-data link PCM format, real time of the full redundant subsystem.

Serial Data

W X Y

Real Time External

Real Time Commands

Command Clock ComDec (P) Internal Timing Space craft Input Powe r

: Unencoded • I Command ON I —' Precision eal Time Com-I Frequency Outputs r mand OFF l Time Code r Stored Command Verification

(P) = Primary (R) = Redundant FIGURE 8 NIMBUS D Co^mraand Subsystem Functional Block 17.2-10 Operationally, three input channels pro inputs data bits in NRZ form at the rate vide the data inputs to a real time com of 128 per second. The X channel is the mand decoder (ComDec) where all incoming W channel frequency and is positioned so data is processed. The input signal time that it has a positive-going transition relationship is different than that used in the middle of every data bit to pro with the other command subsystems. Figure vide the data strobe. The Y channel 9 shows the relationship among the three serves as a message duration pulse. The input channels relative to the NIMBUS D absence of the Y signal disables the Command Clock Subsystem. The W channel ComDec input operation.

50 Bits 7..8ms Bit Time

W n . Binary Data (NRZ)

Strobe h*- 7 .8ms

Duration of Message or 2048 Bits

I 1 ———————l I—————— r

FIGURE 9 NIMBUS D Command Clock Input Waveform Relationship There are five modes of operation pertain The command data format message sent to ing to the ComDec; real time command inter the CoraStor is shown in Figure lOb. Only nal, real time command external,, command bits 11 through 50 have any real signifi data storage, time code set, and serial cance. The 15 D bits contain the time data output. Four data input formats are for command execution; the 14 E bits required to operate in these five modes. determine the repeat time; and the C bits hold the command to be executed.- The R The real time command message format is and A bits are used to establish if a shown in .Figure 10a. The message consists command is to be repeated or not. The of 50 1 bits. Twenty-five bits define the address and mode bits are used for a mes sate11i te addres s, Co mDec key, operational sage validity check by the ComDec section mode and command to be executed. The only. remaining twenty-five bits are the cample- me nt of the preceding twenty-f iv e bits, The D bits are decremented at the rate of All bits are checked for accuracy before once every two seconds and then tested for any action takes place. The address bits zero (the condition which will cause the a nd key b i t s* inc lud i ng the i r c o mp 1 erne n t s, command to be executed). If R is "one" are compared with hard wired data. bits. and A is "one," the repeat time held in The mode and command bits which are cap-. the E bit position is rewritten into the tured in flip-flop registers are com corresponding bit position of the D posi pared against their corresponding comple tions. If R is "zero" and A is "one", mentary bits. The fiftieth bit is the then the command is executed one time. parity bit. If the bit-by-bit comparison Because the D bits are decremented once and parity test pass,, the command is every two seconds, 15 bits will provide accepted , decoded and exe cuted. up to 18 hours delay. If the repeat bit is used, then delays can be repeated at I f the b i, t -by —b 11 c o mpar i s on fails , th e intervals up to nine hours. ComDec control logic will set a telemetry error flag, reject the erroneous word and Each of the two ComStors are individually continue to accept the incoming data. controlled. Their MOS registers can be sequentially or selectively filled, have The real, time command execution is initi their contents verified, be placed in an ated through the 2 x 16 matrix which is activate mode for command delayed execu used for internal, switching control or tions or be completely inoperative by through the 16 x 30 matrix for external turning off their power supplies. The control. The decision as to whether the ComStor operating modes are initiated command is to be internal real time or under real time command control issued external, real time is established by the by the ComDec. In the fill mode, the fill mode bits in the message. counter is reset to service the MOS registers. As each device is loaded the The ComDecs are independent in that they counter is incremented. However, if a require secondary power plus the signals MOS register contains information that is from the three Input channels to operate. to be retained, a real time command is No i nterna1 system clock is required. In issued which increments the counter to addition, the ComDecs are exempt from the skip that register and preserve its con selective redundancy concept as each has tents . The verify mode allows each MOS its own power supply source which cannot register to be interrogated, formatted in be switched to work with each, other. The the time code data format, and transmitted initializing action to place a ComDec into to the Ground Station at the rate of one the operational, mode is to transmit an word per second for comparisqn with com unen c o de d c o mman d f r om, the G r ou n d Station. mand storage data initially transmitted. Th is command act iv ate s bo th ComDecs. By The time portion of the stored data is internal real time command execution and decremented once every two seconds during proper ComDec identification through, the the verify mode to preserve the time of key bits, one ComDec can turn the other stored command execution. However, dur off, ing this mode no commands will be executed should any register happen to be all zeros. The command storage data mode transfers The activate mode enables the ComStor to input data to' the command storage (Com- issue a command each time a MOS register Stor) section for processing and storage. is decremented to zero provided that the The ComStor performs data, storage by using A bit is a "one." All ComStor commands dynamic type MOS shift registers which are to be issued are sent to the matrix capable of holding 50 bits of information* decoder/driver section for execution. These shift registers are circulated, at a 100 -kHz .r 1 a te a nd r e qu ir e a 2 -ph a s e The matrix decoder/driver section receives clock for the shifting operation. There commands for execution from the ComDec or are two ComStor sections which provide the either of the two ComStors. To solve the capab i 1 i, t y o f 3 0 s t ore d c omma n d s, 1 5 i n race to the matrix problem, the ComDec is e a ch s e c t I on . The 1 ComS t or s a r e not c on - given priority over the ComStors and each side red to be redundant as both, can. be ComStor is time phased so that only one active at the same time* However, redun ComStor section can output commands at a dancy can be achieved by storing the same particular second. If a ComStor is ready commands with the same time of execution to issue a command, and a real time com- in both ComStors. mand is being processed in the ComDec/ the ComStor command will be held up until the real time command is executed. 17.2-12

LSB

^- ^-

sKK

Command Command

C 3

CQ* CQ*

Key*

Mode* Mode*

321

———————————————————————————————————————————————— ————————————————————————————————————————————————

bits bits

36 36

(SCD)

Formats

(RTC-1)

Address* Address*

(TCD)

(SER)

10 10

Data Data

D7 D7

Word Word

Data Data

(d) (d)

(b) (b)

(a) (a)

Data Data

Command Command

FIGURE FIGURE

Code Code

Command Command

C..

Time Time

D D

Serial Serial

Time Time

Stored Stored

Real Real

E10

NIMBUS NIMBUS

Command Command

(RTCE)

(RTCI)

Dl2|EiaDlJEllplO

————————————————————————————————————————— —————————————————————————————————————————

C C

E13

MSB MSB

(SCD)

Internal Internal

External External

Bits Bits

El4pl3

K4 K4

5 5

(TCD)

Data Data

X X X

D14

(SER)

X X

K2 K2 K3

Data Data Command Command

Command Command

X X

Kl Kl

Key Key

D15

Command Command

Data Data

Time Time

Code Code Time Time

!r !r

Serial Serial

Stored Stored

Time Time

Real Real

0's

Mode Mode

X X

o o z

3 3 2

321

Mode Mode

1 1

13 13

- -

_ _

o o

Q Q

complement complement

Sync

- -

0 0 -

(026) (026)

1 1

110 110

111 111

0 0 1

- -

M3 M3 M2

Minimum Minimum

/ /

? ?

/ /

Bits- Bits-

Indicates Indicates

Bits- Bits-

Bits

Bits- Bits-

* *

Mode Mode

Address Address

ooooooooo

NOTE: NOTE: c The matrix decode driver section performs The other sections shown in the block the same function as the other Command diagram contain the secondary power levels, Subsystems. However, it is mechanized with telemetry networks, and amplifiers. hybrid circuit type relay drivers. The matrix is 16 x 30 to execute 480 commands. Physical characteristics pertaining to the The matrix is redundant and because of the NIMBUS D Command Clock Subsystem are shown redundant driver mechanization, the space in Table 2. craft has four chances of executing each particular command. The time duration for any command execution is 53 milliseconds. Conclusion In two seconds, it is possible to execute all stored commands plus two real time commands. The evolutionary process of the NIMBUS Command Clock Subsystems has progressed The third operating mode of the ComDec is from the single box, non-redundant, dis to transfer a time code set message to the crete component type to a three box, dual- time code generation section. The time redundant, discrete component type and back code generation section performs two func to a single box, selectively redundant, tions. It provides real time and generates state-of-the-art component type. The trend the precision frequencies for the space has been to provide more capability into craft subsystems. Time code data is gen the same or less space, exhibit a high erated in conjunction with a 50-bit MOS probability of successful operation and shift register which contains 10 BCD char provide system flexibility for additions acters signifying time from one second or delections without going through a full increments, the smallest, to hundreds of design and development program. The NIMBUS days, the largest. If the time code regis D Command Clock Subsystem is designed to ter is to be updated, a time set code meet these requirements. message consisting of the format shown in Figure lOc is processed through ComDec and stored in the time code data MOS register which can be commanded to a fill mode. The time code data format uses only 40 bits, 11 through 50 inclusively, for time processing. The time code generation section divides the signal from the 3.2-mHz oscillator to generate the various coherent precision frequencies for other subsystems. Signal division is accomplished with flip-flop ripple counters whereas synchronous flip- flop operation was used in the preceding NIMBUS Command Clock Subsystems. The integrated circuit ripple counters are much faster than their discrete component counterparts; therefore, synchronous clocking is not necessary to keep the signals coherent. The last mo^de of operation for the ComDec is the serial data transfer mode. The serial data transfer mode is associated with another subsystem on the spacecraft. The serial data mode format is shown in Figure lOd. The ComDec switches the receiving subsystem into its data input mode. As the serial data is transmitted to the spacecraft, the ComDec receives, checks the address, parity and key bits. These items are stripped out and only the 36 data bits are sent to the subsystem. The ComDec has been designed not to inter rupt, this serial data transmission mode under any circumstances* Therefore, dur ing the checking portion of the input word, if an error is detected, a flag is set and telemetered back to the Ground Station, The only manner in which the Command Clock Subsystem can be taken out of the serial data mode is to drop the Y input pulse which resets the ComDec to the look-for- sync-word condition.

17.2-14