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Monolithic Dual-Tone

Multi-Frequency (DTMF) Receivers

APPLICATION NOTE

July 2005

INTRODUCTION must be separated by a valid pause. The TERIDIAN Corporation Transceivers are complete Touch-Tone™ detection Table 1 gives the established Bellcore standards for and generation systems. Each can operate in a a valid DTMF signal and valid pause. The TERIDIAN stand-alone mode for the majority of DTMF Receivers meet or exceed these standards. applications, thereby providing the most economical implementation of DTMF Similar device architecture is used in all TERIDIAN signaling systems possible. Each combines DTMF Receivers. Figure 1 shows the TERIDIAN precision active filters and analog circuits with digital 75T202 Block Diagram. This architecture is control logic on a monolithic CMOS integrated implemented in all TERIDIAN Semiconductor Corp. circuit. TERIDIAN DTMF device use is DTMF receivers. In general terms, the detection straightforward and the external component scheme is as follows: The input signal is pre-filtered requirements are minimal. This application guide and then split into two bands, each of which contains describes operation, performance, system only one DTMF tone group. The output of each requirements and typical application circuits for the band-split filter is amplified and limited by a zero- TERIDIAN DTMF products. crossing detector. The limited signals, in the form of square waves, are passed through tone frequency HOW THE TERIDIAN DTMF CIRCUITS bandpass filters. Digital logic is then used to provide detector sampling and determine detection validity, WORK to present the digital output data in the correct The task of a DTMF Receiver is to detect the format, and to provide device timing control. presence of a valid DTMF signal on a line or other transmission medium. The presence of a valid DTMF signal indicates a single dialed digit; to generate a valid digit sequence, each DTMF signal

PARAMETER VALUE One Low-Group Tone, and 697, 770, 852 or 941 Hz One High-Group Tone 1209, 1336, 1477 or 1633 Hz Frequency Tolerance fo ± (1.5% + 2 Hz) Amplitude Range -24 dB ≤ A ≤ 6 dBm @ 600Ω (Dynamic Range 30 dB) Relative Amplitude (Twist) High Group Tone -8 dB ≤ ≤ + 4 dB Low Group Tone Duration 40 ms or longer Inter-tone Pauses 40 ms or longer TABLE 1: Standards

Monolithic Dual-Tone Multi-Frequency (DTMF) Receivers

PERFORMANCE CONSTRAINTS 2- Zero-crossing detection. Limits the acceptable SPEECH IMMUNITY AND NOISE TOLERANCE level of noise during detection of a tone pair. The two largest problems confronting a DTMF This is important for speech rejection. Receiver are: 1- Distinguishing between a valid DTMF tone pair 3- Valid tone pair/pause sampling. Samples the and other speech or stray signals that contain detection filters and checks for consistency DTMF tone pair frequencies. This is referred to before a valid tone is declared. as Speech Immunity or “talk-off”. DETAILED DESCRIPTION OF 2- Detecting valid tone pairs in the presence of OPERATION noise, which is typically found in the telephone AUDIO PREPROCESSOR (or other transmission medium) environment. The Audio Preprocessor is an analog filter that band This is referred to as Noise Tolerance. limits the input analog signal between 500 Hz and 6 kHz. In addition, it emphasizes the 2 kHz to 6 kHz The TERIDIAN DTMF Receivers use several voice region. techniques to distinguish between valid tone pairs and other stray signals. These techniques are Band limiting suppresses supply noise, explained in later sections. Briefly, the techniques frequencies and high frequency noise. The are: emphasized voice region helps to equalize the audio response since many phone lines tend to roll off at 1- Pre-filtering of audio signals. Removes supply about 1 kHz. In addition, preservation of the upper noise and dial tone from input audio signal and voice frequencies is important in providing speech emphasizes the voice frequency domain. immunity.

TONE BAND SPLITTING

BANDPASS FILTERS

697 AMPLITUDE DETECTORS BAND ZERO SPLIT CROSSING 770 PRE-PROCESSOR FILTERS DETECTORS 60 Hz ANALOG PREEMP REJECT BS1 852

75T203 941 ED TIMING ONLY CIRCUITRY BS2 1209 CLRDV

1336 CLR

ATB 1477 DV DV F.F. DV XEN 1633 DATA STROBE

HEX/B28 XIN ÷ 8 CLOCK GENERATOR CHIP CLOCKS D1 1Mz

XOUT D2

OUTPUT OUTPUT DECODER REGISTER D4

D8 POWER REGULATOR VOLTAGE REF DATA CLEAR

EN

VP GND IN1633

2 Monolithic Dual-Tone Multi-Frequency (DTMF) Receivers

After the analog signal is preprocessed, it is split into this code into the output register and raises the data two bands, each of which contains only one DTMF valid (DV) flag. The only external precision tone group. The band split filters are actually band- component needed for the TERIDIAN DTMF stop filters to maintain all frequencies except the Receivers is a 3.58 MHz parallel resonant crystal other tone group; this is done to maintain all analog (color-burst frequency) with a .01% tolerance for the information to enhance speech immunity but not onboard oscillator. A 1 ΜΩ 10% resistor should be allow the other tone group to act as interfering noise connected in parallel with the crystal. This generates for the band being detected. These band stop filters the precise clock for the filters and for the logic have “floors” that limit the amount of tone pair twist timing and control of the chip. that further enhances speech immunity. See device data sheets for acceptable twist limits. CIRCUIT IMPLEMENTATION Standard CMOS technology is used for the entire ZERO-CROSSING DETECTORS circuit. Logic functions use standard low-power The output of each band-split filter is amplified and circuitry while the analog circuits use precision limited by a zero-crossing detector (limiter). The switched-capacitor-filter technology. function of the zero-crossing detector is to produce a square wave at the prime frequency emanating from HOW TO USE THE TERIDIAN DTMF the band-split filter. If a pure tone is not present, as RECEIVERS in the case of voice or other interfering noise, a PRECAUTIONS rectangular wave with a variable period will result. Although static protection devices are provided on Proportional to the interference, the limiter output the high-impedance inputs, normal handling power is spread over a broad frequency range as precautions should be observed for CMOS devices. the zero-crossings “dither”. When a high level of noise or speech occurs, no single bandpass filter All CMOS parts are prone to a destructive latch-up pair will contain significant power long enough to mode. This behavior is inherent to these parts due to result in a tone detection. On the other hand, when a their physical structure. The latch-up mode can best pure DTMF tone exists with acceptable noise levels, be described as a low impedance, high current state the output of the limiter will not have any significant existing between the power supply connections on a dither and tone detection will occur. The zero- CMOS chip. This is also referred to as triggering of crossing detector also acts as a AGC (Automatic parasitic SCR behavior. Gain Control) in that the output amplitude is independent of input amplitude; this additionally The most common cause of latch-up mode is establishes an acceptable signal-to-noise ratio not operating a CMOS part outside of its rated power dependant on tone amplitude. supply voltage. Over-voltage at any pin can cause

latch-up. For the TERIDIAN DTMF Receivers and BANDPASS FILTERS & AMPLITUDE Transceivers, the pin voltage should be constrained DETECTORS to the range between VN – 0.5V and VP + 0.5V (except The bandpass filters perform tone frequency the analog input pin whose conditions are discussed discrimination. Their responses are tailored so that if below). Clamping diodes should be utilized wherever the frequency of the limited square wave from the necessary to ensure that voltage ratings are not zero-crossing detector is within the tone frequency exceeded. tolerance, the filer output will exceed the amplitude detector threshold. The amplitude detectors are Another cause for latch-up is fast dv/dt transients interrogated periodically by the digital control affecting the chip. These transients are encountered circuitry to ascertain the presence of only one tone in applications that require the in each band for the required duration. In a similar connection/disconnection of “live” boards. While fashion, valid pauses are measured by the absence these applications are very rare and their of valid tone pairs for the specified time. implementation is best avoided, it must be mentioned that whenever they are necessary, they TIMING AND LOGIC present a severe environment for CMOS parts. Care During the qualification process, the output decode must be taken in such instances to ensure that generates the proper digital code for the received ground planes and supply rails are connected first DTMF tone pair. After the fidelity and duration of this and disconnected last. This will go a long way in signal have been verified, the timing circuitry latches eliminating voltage transients.

2 Monolithic Dual-Tone Multi-Frequency (DTMF) Receivers

Voltage transients that exist on power lines must DIGITAL INPUTS also be controlled. High voltage transients caused The digital inputs are directly compatible with by switching of high current devices can trigger standard CMOS logic levels powered by VP and VN latch-up. High frequency decoupling is a (or VND). The input logic levels should swing within requirement for the proper operation of TERIDIAN 30% of VP or VN to insure detection. Any unused DTMF devices. A 0.01mF to 0.1mF ceramic input must be tied to VN or VP. decoupling capacitor should be connected to the power supply pin at the chip. ANALOG INPUT

The analog input is the signal input pin for the POWER SUPPLY devices, and is specially biased to facilitate its Excessive power supply noise should be avoided, connection to external circuitry, as shown in Figure and to aid the user in this regard, power supply 2. The signal level at the analog input pin must not hook-up options are provided on some devices. exceed the positive supply as stated on the device data sheets. If this condition cannot be guaranteed Since the digital circuitry of the devices possess a by the external circuitry, the signal must be AC high noise immunity characteristic of CMOS logic, it coupled into the chip with a .01 mF ± 20% capacitor. is the analog section that is affected the most by power supply noise. On those TERIDIAN DTMF ANALOG INPUT NOISE Receivers that have separate Analog Negative and The TERIDIAN DTMF Receivers will tolerate wide- Digital Negative supply connections (grounds), band input noise of up to 12 dB below the lowest namely VNA and VND, an unfiltered supply may be amplitude tone component during detection of a used at VND. It is necessary that VND and VNA vary valid tone pair. Any single interference frequency by no more than 0.5V. (including tone harmonics) between 1 kHz and 6

kHz should be at least 20 dB below the lowest The analog circuitry of the devices require low power amplitude tone component. Adherence to these supply noise levels as specified on the device data conditions will ensure reliable detection and full tone sheet. The effects of excessive power supply noise detection frequency . Because of the are decreased tone amplitude sensitivity and less internal band limiting, noise with frequencies above tone detection frequency bandwidth. Power supply 8 kHz can remain unfiltered. However, noise near noise can be significantly reduced by decoupling the the 56 kHz internal switched-capacitor-filter sampling IC with a 0.1 mF ceramic capacitor. Power supply frequency will be aliased (folded back) into the audio noise effects will be slightly less if the analog input is spectrum; noise above 28 kHz therefore should be referenced to VP. This is can be accomplished by low-pass filtered with a circuit shown in Figure 3 connecting VP to ground and utilizing the negative using a cut-off frequency ( fc) of 6.6 kHz. power supply. Obviously this means the digital logic must also have a negative supply.

VP VP

VIN < VP VIN > VP

0.01 µF

Analog in Chip) (On 10 pF Analog in Chip) (On 10 pF

>100 kΩ >100 kΩ

GND GND

FIGURE 2: Direct and AC Coupled Configurations

3 A 1 kHz frequency cut-off frequency filter can be tone) with a valid DTMF tone, detection is disabled. used on “normal” phone lines for special To inhibit the more common higher frequency third applications. When a phone line is particularly noisy, tones from arriving at the receiver, the circuit shown tone pair detection may be unreliable. A 1 kHz low in Figure 4 is suggested. pass filter will remove much of the noise energy but maintain the tone groups; however, decreased INTERFACE speech immunity will result. This usage should only In applications that use a TERIDIAN DTMF Receiver be considered for applications where speech to decode DTMF signals from a phone line, a DAA immunity is not important, such as control paths that (Direct Access Arrangement) must be implemented. carry no speech. Equipment intended for connection to the public telephone network must comply with and be Some DTMF tone pair generators output distorted registered in accordance to FCC Part 68. For PBX tones that the TERIDIAN DTMF Receivers may not applications, refer to EIA Standard RS-464. Some of detect reliably (inexpensive extension the basic guidelines are: are an example). Most of the interfering harmonics 1- Maximum voltage and current ratings of the of these may be removed by use of a 3 kHz low- TERIDIAN DTMF Receivers must not be pass filter as in Figure 3. Some speech immunity exceeded; this calls for protection from ringing degradation will result. It should be mentioned that voltage, if applicable, which ranges from 80 to when using low-pass filters, a higher cut-off 120V RMS over a 20 to 80 Hz range. frequency will preserve more of the speech immunity 2- The interface equipment must not breakdown advantages. with high-voltage transient tests (including a 2500V peak surge) as defined in the applicable The TERIDIAN DTMF Receivers provide superior document. speech immunity and noise rejection. The analog 3- Phone line termination must be less than signals are subjected to stringent criteria and 200Ω DC and approximately 600Ω AC (200- rigorous qualification in order to assure that only true 3200 Hz). DTMF tone pairs are detected and decoded 4- Termination must be capable of sustaining properly. Stray signal and noise with sufficient phone line loop current (off-hook condition) amplitude will cause a DTMF receiver to disqualify a which is typically 18 to 120 mA DC. valid DTMF tone pair. 5- The phone line termination must be electrically balanced with respect to ground. Such a condition can be occasionally encountered 6- Public phone line termination equipment must when using DTMF “beepers.” Beepers are normally be registered in accordance to FCC part 68 or used to transmit DTMF signals from dial-pulse connected through registered protection phones. It has been observed that non-linearity in circuitry. the response of carbon microphones in telephone Figure 5 shows a DAA. Features include: handsets introduces intermodulation products, which 1. 150V surge protector to eliminate high voltage actually produce new frequency components. These spikes. components happen to fall directly into the useful An optocouplter ring detector, optically isolated from bandwidths of some of the basic tones that the the supervisory circuit receiver must detect. Because of the presence of these components (normally referred to as third-

FC R C (kHz) (kΩ) (µF) (=5%) (=20%)

NOISY ANALOG IN DTMF 1.0 1.6 0.1 SIGNAL RCVR 3.1 5.1 0.01

6.6 2.4 0.01

SUGGENSTED COMPONENT VALUES

FIGURE 3: Filter for Use in Noisy Environments

Monolithic Dual-Tone Multi-Frequency (DTMF) Receivers

51K

0.01 µF 5K

INPUT – 0.01 µF ANALOG IN TDK

DTMF + 12.9K RCVR

0.0082 µF

VCC 20K 20K

FIGURE 4: Filter for Use in Environments Where a Third Tone Exists

2. Back-to-back Zener diodes to protect the DTMF (and optional multiplexer Op-Amp) from ringer TIMING voltage. Within 40 ms of a valid tone pair appearing at the 3. Audio multiplexer which allows voice or other DTMF Receiver Analog Input, the Data Outputs D8, audio to be placed on the line (a recorded D4, D2 and D1 will become valid. Seven message, for example) and not interfere with microseconds after the data outputs have become incoming DTMF tone detection. valid DV will be raised. DV will remain high and the outputs valid while the valid tone pair remains present. Refer to individual data sheets for the OUTPUTS timing of signals. The digital outputs of the TERIDIAN DTMF Receivers (except XOUT) swing between VP and VN SYSTEM INTERFACE (or VND) and are fully compatible with standard Provision has been made on the TERIDIAN DTMF CMOS logic devices powered from VP and VN. The receivers and transceivers (with the exception of 5V DTMF devices will also interface directly to TERIDIAN 75T204) for handshake interface with an LSTTL. outside monitoring system. In this mode, the DV strobe is polled by the monitoring system at least Data Outputs D8, D4, D2 and D1 are three-state once every 40 ms to determine whether a new valid enabled to facilitate an interface to a three-state bus. tone pair has been detected. If DV is high, the coded Care must be taken to prevent the substrate diodes data is stored in the monitoring system and the from becoming forward biased or damage may monitoring system pulses CLRDV digit “high. result.

22k

22k TRANSMIT AUDIO 600

ON/OFF HOOK RELAY TIP 0.47 F 3.9V 3.9V 200V 22 k ANALOG INPUT RING 1:1 TIL 600 TDK DTMF 119 RECEIVER

RING

FIGURE 5: Full Featured Phone Line Interface

5 With some systems operating in the handshake required for the ATB input device; XIN must be tied high mode, it may be desirable to know when a valid if unused. Several TERIDIAN DTMF Receivers can be pause has occurred. Ordinarily this would be driven with a single crystal (refer to device data sheet indicated by the falling edge of DV. However, in the for fan-out limit). handshake mode, DV is cleared by the monitoring system each time a new valid tone pair is detected XOUT is designed to drive a resonant circuit only and is and, therefore, cannot be used to determine when a not intended to drive additional devices. If a 3.58 MHz valid pause is detected. The detection of a valid clock is needed for more than one device and it is pause in this case may be observed by detecting the desirable to use only one resonant device, an separate clearing of the Data Outputs. Since, in hexadecimal inverter should be used for the oscillator inverter, format (the mode usually used with a handshake buffered by a second inverter or buffer. The buffer interface), the all zero state represents a commonly output would then drive XIN of the TERIDIAN DTMF unused tone pair (digit “D”), the detection of a valid Receiver as well as the other device(s); XOUT must be pause may be detected by connecting a four input left floating and XEN tied high. NOR gate to the device outputs and sensing the all zero state. DIAL TONE REJECTION The TERIDIAN DTMF Receivers incorporate enough TIME BASE dial tone rejection circuitry to provide dial tone tolerance The TERIDIAN DTMF Receivers contain an on-chip of up to 0 dB. Dial tone tolerance is defined as the total oscillator for a 3.5795 MHz parallel resonant quartz power of precise dial tone (350 Hz and 440 Hz as equal crystal. The crystal is placed between XIN and XOUT in amplitudes) relative to the lowest amplitude tone in a parallel with a 1 ΜΩ resistor, while XEN is tied high. valid tone pair. The filter of Figure 6 may be used for Since the switched-capacitor-filter time base is derived further dial tone rejection. This filter exhibits an elliptic from the oscillator, the tone detect band frequency highpass response that provides a minimum of 18 dB tolerance is proportional to the time base tolerance. The rejection at 350 Hz, and 24 dB rejection at 440 Hz so TERIDIAN DTMF Receiver frequency response and long as the component tolerances indicated are timing is guaranteed with a time base accuracy of at observed. The DTMF on-chip filter rejects 350 Hz at least ±0.01%. To obtain this accuracy, use CTS Part least 6 dB more than 440 Hz. Therefore, employing the No. MP036, Fox Part No. FOX36S or equivalent quartz filter of Figure 6 yields a dial tone tolerance of +24 dB. crystal. PRINTED CIRCUIT BOARD When the oscillator is connected as above, and XEN is tied high, the ATB (Alternate Time Base) pin delivers a IMPLEMENTATION square wave output at one-eighth the oscillator The TERIDIAN DTMF Receivers are analog in nature frequency (447.443 kHz nominal). The ATB pin can be and should be treated as such; circuit noise should be converted to a time base input by tying XEN low; ATB kept to a minimum. can then be externally driven from another device such as the ATB output of another DTMF. No crystal is

VP

715K +5V 0.027 µF V P + – 715K 12.1K 0.027 µF 100K VN PHONE LINE VN TO TDK DTMF 600Ω 12.1K 59K ANALOG IN PIN 60.4K 100K

+5V

VN – 0.027 µF +

Note: All resistors 1%, all caps 5%, unless noted, op-amps: 1/2 LM1458 or equivalent

FIGURE 6: Dial Tone Reject Filter

Monolithic Dual-Tone Multi-Frequency (DTMF) Receivers

To be certain of this, all input and output lines should Figure 7 was used to characterize the TERIDIAN be kept away from noise sources (high frequency 75T202. The speed and output level of the tape data or clock lines); this is especially true for the deck must be adjusted so that the calibration tone at Analog Input. Noise in the ground or power supply the beginning of the tape is exactly 1000 Hz at 2V lines can be avoided by running separate traces to RMS. support logic circuits or by running thicker (lower resistance) busses. Capacitive power supply The Mitel tape yields similar results on all of the bypassing should be performed at the device. Refer TERIDIAN DTMF Receivers. Test results for the to the Power Supply section above. TERIDIAN 75T202 are summarized in Table 2 (performance of other receivers is identical to the PERFORMANCE DATA 75T202). In short, the measured performance data A portion of the final TERIDIAN DTMF Receiver demonstrates that the TERIDIAN DTMF Receivers device characterization uses the Mitel CM7290 tone are monolithic realizations of a full “central office receiver test tape. The evaluation circuit shown in quality” DTMF receiver.

TEST # RESULTS 2a, b B.W. = 5.0% of fo 2c, d B.W. = 5.0% of fo 2e, f B.W. = 5.3% of fo 2g, h B.W. = 4.9% of fo 2I, j B.W. = 5.0% of fo 2k, l B.W. = 5.3% of fo 2m, n B.W. = 5.3% of fo 2o, p B.W. = 4.8% of fo 3 160 decibels 4 Acceptable Amplitude Ratio (Twist) = -19.1 dB to +15.2 dB 5 Dynamic Range = 32.5 dB 6 Guard Time = 23.3 ms 7 100% Successful Decodes at N/S Ratio of –12 dBV 8 2-3 Hits Typical on Talk-Off Test TABLE 2: Mitel #CM7290 Test Tape Results for 75T202 (Averaged for 10 parts)

CASSETTE PLAYER WITH SPEED ADJUST Vp

4 11 VP XIN

7 1M XEN 3.579545MHz

FREQUENCY 12 10 COUNTER ATB XOUT 3 15 EN D8

TDK 75T204 16 TO MEASURE D4 CALIBRATION TONE 14 1 ANALOG D2 IN 2 D1

9 8 RMS GND DV VOLTMETER

EVENT COUNTER

0.1 F

FIGURE 7: Circuit for Receiver Evaluation

2 Monolithic Dual-Tone Multi-Frequency (DTMF) Receivers

APPLICATIONS when in the hexadecimal code format. However, CREATING HEXADECIMAL “0” OUTPUT UPON some applications may instead require a DIGIT “0” DETECTION hexadecimal “0” with a digit “0” detection. The circuit To be consistent with pulse-dialing systems, the of Figure 8 shows an easy method to recode the TERIDIAN DTMF Receivers provide hexadecimal hexadecimal outputs to do this using only 4 NOR “10” output upon the detection of a digit “0” tone pair gates.

D8

D4

D4 D3

TDK DTMF D2 RECEIVER

D2

LOGIC 0

D1 D1 EACH NOR GATE 74HCT02

FIGURE 8: HEX “0” out with Digit “0” Detect Conversion Circuit

Hexadecimal Hexadecimal & Figure 8 Circuit Digit D8 D4 D2 D1 Digit D8 D4 D2 D1 1000110001 2001020010 3001130011 4010040100 5010150101 6011060110 7011170111 8100081000 9100191001 0101001010 . 1011 . 1011 #1100#1100 A1101A1101 B1110B1110 C1111C1111 D0000D0000 TABLE 3: Output Code of Figure 8

2 Monolithic Dual-Tone Multi-Frequency (DTMF) Receivers

Note that the circuit will not give proper code for the detection and counting to a TERIDIAN DTMF “*”, “B” or “C” digits and will cause both digits “D” and Receiver. “0” to output hexadecimal “0”. This circuit should therefore be considered for numeric digits only. The The loop detector provides a digital output output code format is shown in Table 3. representing the telephone loop circuit “make” and “break” condition associated with rotary pulse This circuit is useful for applications that require a dialing. For the circuit of Figure 12, ground display of dialed digits; the digit display usually represents a “make” and VP a “break”. The loop requires a hexadecimal “0” input for “0” to be detector feeds dial pulses to IC-1, a binary counter, displayed. and to IC-2A, a re-triggerable “one-shot”. When a dial pulse appears the 4_ output of IC-2A 16-CHANNEL REMOTE CONTROL immediately goes low, resetting IC-1. The clock input DTMF signaling provides a simple, reliable means of to IC-1 is delayed by R1-C1 so that reset and count transmitting low speed information over a 2-vire input do not overlap. The binary outputs of IC-1 will twisted pair. The complete schematic of a 16- reflect the pulse count and 0.2 seconds after the last channel remote control is shown in Figure 9. When pulse the 4_ output will go high. C3-R3 differentiates one of the keypad buttons is depressed, a tone pair this pulse and clocks the output latch, IC-3, holding is sent over the transmission medium to the the output pulse until the next digit. TERIDIAN DTMF Receiver. The 0.2 second timeout of IC-2A indicates the end of The 74HC4514 raises one of its 16 outputs in dial pulsing since even a slow (8 pps) dial would response to the 4-bit output code from the DTMF. input another pulse every 0.125 seconds. The binary The output at the 74HC4514 will remain high until outputs of IC-1 are paralleled with those of the the next button is depressed. TERIDIAN DTMF Receiver circuit through diodes to the inputs of IC-3. A pull-down resistor is necessary 2-OF-8 OUTPUT DECODE on each IC-3 input pin. IC-1 must be a binary, not BCD, counter. The circuit shown in Figure10 can be used to convert the binary coded 2-of-8 to the actual 2-of-8 With a 74HC175 for IC-3 the output data is latched code (or 2-of-7 if detection of the 1633 Hz tone is until the next valid input, whether from a inhibited). The output data will be valid while DV is or dual tone instrument. A unique situation exists, high. If it is desired to force the eight outputs to zero however, when going on-hook. The loop detector will when a valid tone is not present, DV should be output a continous level of VP, which would trigger inverted and connected to both (inputs of the IC-2A and put a single count into IC-1. A high level MC14555B. from the loop detector also turns on Q1, pulling the

clock input of IC-3 to ground. Since the loop detector DTMF TO ROTARY DIAL PULSE output will be low at the completion of dialing, all CONVERTER outputs are valid even when the telephone is placed The 2-of-8 output of Figure 10 can be modified to on-hook, an important consideration if output data is interface with a pulse dialer as shown in Figure 11. recorded. Figure 12 shows the interface for adding pulse

2 Monolithic Dual-Tone Multi-Frequency (DTMF) Receivers

Monolithic Dual-Tone Multi-Frequency (DTMF) Receivers Application Note

Vp

4 11 VP XIN 7 1 M 3.579545MHz XEN 12 10 10pF ATB XOUT 3 15 EN D8 10 M TDK 75T204 16 D4 10% 3.579545MHz V+ 14 1 ANALOG D2 COL1 3 VDD 7 8 TRANSMISSION IN 2 D1 COL2 4 MEDIUM 9 8 GND DV COL3 5 COL4 CD22859 9 ROW1 VOUT Vp 1 2 3 A 14 16 ROW2 4 5 6 B 13 24 D 11 6V or 9V ROW3 VDD 7 8 9 C 12 S0 _ battery ROW4 1 9 S1 0 # D 11 VSS 1k * 2 10 V- S2 3 8 S3 4 7 2 S4 D1 5 6 3 S5 D2 6 5 21 S6 D3 7 4 22 S7 D4 8 18 S8 9 17 74HTC4514 S9 0 20 S10 * 19 S11 # 14 1 S12 STROBE A 13 23 S13 EN* B 16 S14 C 15 S15 VSS 12

FIGURE 9: 16-Channel Remote Control

VP

6 2 VP 14 3.579545 MHz H/B28 XOUT 3 EN 16 1M XEN 15 XIN 9 S1 TDK DTMF 0.01 µF = 20% RECEIVER 4555 10 S2 3 4 697 B Q0 0.01 µF = 20% 5 770 1 Q1 E 6 852 5 20 Q3 IN1633 D8 2 7 941 Q4 19 21 A CLRDV D4 12 22 INPUT ANALOG IN D2 13 1209 13 1 B Q0 VNA D1 11 15 Q1 1336 4 OR VIN E 10 VND Q2 1477 DV 14 9 A Q3 1633 18 Vss Vdd

8 16 VP

DV

FIGURE 10: Touch-Tone to 2-of-8 Output Converter

2 Monolithic Dual-Tone Multi-Frequency (DTMF) Receivers

VP

+5V 6

CLASS A KEYBOARD 2 VP 14 3.579545 MHZ ROW 1 H/B28 XOUT 123A 14 7 3 EN 456BROW 2 16 1M 13 XEN 3.579545 MHz 15 ROW 3 XIN 789C 12 9 S1 8 ROW 4 * 0#D 11 TDK DTMF 0.01 µF = 20% U1 RECEIVER MK 5087 10 COL 4 S2 9 0.01 µF = 20%

COL 3 5 20 5 IN1633 D8 19 21 COL 2 CLRDV D4 4 TONE OUT 12 22 16 TRANSMISSION ANALOG IN D2 COL 1 MEDIUM 3 13 1 VNA D1 6 4 OR VN V- VND DV 18

4556 4049

MK5099 4 A 2 5 5 1 C3 1 DIAL PULSES OUT 18 4 6 (658) { C2 3 7 3 12 C1 B

13 12 14 R4 A 14 11 VP V+ R3 15 1 15 10 (658) R2 V- 16 9 13 6 R1 B

RC1 RC2 RC3 SPARE 789 NOT NEEDED IF A 5 VOLT TDK DTMF RECEIVER IS USED. V V V V 1 MEG 270K ss dd ss cc THE 4556 MUST THEN BE 290 pF 8 16 REWIRED TO COMPENSATE 8 1 FOR THE MISSING INVERSION. VP VP

FIGURE 11: Touch-Tone to Rotary Dial Pulse Converter Adding Rotary Dial Pulse Detection Capabilities

3 Monolithic Dual-Tone Multi-Frequency (DTMF) Receivers

DATA OUTPUT FROM TSC DTMF ABCD IC-1 IC-3 R1 1/2-4520 4175 100K A Q0 D0 Q0 LOOP CLOCK B DETECTOR Q1 D1 Q1 C Q2 D2 Q2 D 0.047 C1 Q3 D3 Q3

RESET RESET +12 R2 C2

VP 0.047 100K 0.1 100K ‘DV’ FROM TSC DTMF 100K R5 10K IC-2A 1/2-4538 O/S 0.047

C3

Q1 2 SEC 0.047 100K R3 100K ALL DIODES - SMALL SIGNAL SILICON - 1N914, 1N4154, ETC.

Q1 R4

47K NPN

FIGURE 12: Adding Pulse Detection and Counting to the TDK DTMF Receiver

No responsibility is assumed by TERIDIAN Semiconductor Corporation for use of this product nor for any infringements of patents and trademarks or other rights of third parties resulting from its use. No license is granted under any patents, patent rights or trademarks of TERIDIAN Semiconductor Corporation and the company reserves the right to make changes in specifications at any time without notice. Accordingly, the reader is cautioned to verify that you are referencing the most current data sheet before placing orders. To do so, see our web site at http://www.Teridiansemiconductor.com or contact your local TERIDIAN Semiconductor representative.

TERIDIAN Semiconductor Corp., 6440 Oak Canyon, Irvine, CA 92618, (714) 508-8800, (714) 508-8877, http://www.Teridiansemi.com

TERIDIAN Semiconductor Corporation 07/28/05 – rev. C

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