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SPARC/IOBP-CPU-56 Installation Guide

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SPARC/IOBP-CPU-56 Installation Guide SPARC/IOBP-CPU-56 Installation Guide P/N 220226 Revision AB September 2003 Copyright The information in this publication is subject to change without notice. Force Computers, GmbH reserves the right to make changes without notice to this, or any of its products, to improve reliability, performance, or design. Force Computers, GmbH shall not be liable for technical or editorial errors or omissions contained herein, nor for indirect, special, incidental, or consequential damages resulting from the furnishing, performance, or use of this material. This information is provided "as is" and Force Computers, GmbH expressly disclaims any and all warranties, express, implied, statutory, or otherwise, including without limitation, any express, statutory, or implied warranty of merchantability, fitness for a particular purpose, or non−infringement. This publication contains information protected by copyright. This publication shall not be reproduced, transmitted, or stored in a retrieval system, nor its contents used for any purpose, without the prior written consent of Force Computers, GmbH. Force Computers, GmbH assumes no responsibility for the use of any circuitry other than circuitry that is part of a product of Force Computers, GmbH. Force Computers, GmbH does not convey to the purchaser of the product described herein any license under the patent rights of Force Computers, GmbH nor the rights of others. CopyrightE 2003 by Force Computers, GmbH. All rights reserved. The Force logo is a trademark of Force Computers, GmbH. IEEER is a registered trademark of the Institute for Electrical and Electronics Engineers, Inc. PICMGR, CompactPCIR, and the CompactPCI logo are registered trademarks and the PICMG logo is a trademark of the PCI Industrial Computer Manufacturer’s Group. MS−DOSR, Windows95R, Windows98R, Windows2000R and Windows NTR are registered trademarks and the logos are a trademark of the Microsoft Corporation. IntelR and PentiumR are registered trademarks and the Intel logo is a trademark of the Intel Corporation. SPARCR is a registerd trademark, the SPARC logo is a trademark and Ultra SPARCR is a registered trademark of SPARC International, Inc. PowerPCR is a registered trademark and the PowerPC logo is a trademark of International Business Machines Corporation. AltiVecR is a registered trademark and the AltiVec logo is a trademark of Motorola, Inc. SolarisTM is a trademark of SUN Microsystems, Inc. The Linux Kernel is a CopyrightEof Linus B. Torvalds under the terms of the General Public License (GPL). GoAheadR is a registered trademark of GoAhead Software, Inc. and SelfReliantTM and Self AvailabilityTM are trademarks of GoAhead Software, Inc. LynxOSR and BlueCatR are registered trademarks of LynuxWorks, Inc. TornadoR, VxWorksR, WindR, WindNavigatorR, Wind River SystemsR, Wind River SystemsR and design, WindViewR, WinRouterR and XmathR are registered trademarks or service marks of Wind River Systems. Inc. EnvoyTM, the Tornado logo, Wind RiverTM, and ZincTM are trademarks or service marks of Wind River Systems, Inc. SonyR is a registered trademark of Sony Corporation, Japan. EthernetTM is a trademark of Xerox Corporation. Other product names mentioned herein may be trademarks and/or registered trademarks of their respective companies. SPARC/IOBP-CPU-56 2 World Wide Web: www.fci.com 24−hour access to on−line manuals, driver updates, and application notes is provided via SMART, our SolutionsPLUS customer support program that provides current technical and services information. Headquarters The Americas Europe Asia Force Computers Inc. Force Computers GmbH Force Computers Japan KK 4211 Starboard Drive Lilienthalstr. 15 Shiba Daimon MF Building 4F Fremont, CA 94538 D−85579 Neubiberg/München 2−1−16 Shiba Daimon U.S.A. Germany Minato−ku, Tokyo 105−0012 Japan Tel.: +1 (510) 445−6000 Tel.: +49 (89) 608 14−0 Tel.: +81 (03) 3437 3948 Fax: +1 (510) 445−5301 Fax: +49 (89) 609 77 93 Fax: +81 (03) 3437 3968 Email: [email protected] Email: support−[email protected] Email: support−[email protected] 220226 420 000 AB 3 SPARC/IOBP-CPU-56 SPARC/IOBP-CPU-56 4 Contents Using this Guide Other Sources of Information Safety Notes Sicherheitshinweise 1 Introduction Features . 20 Standard Compliances. 21 2 Installation Action Plan. 23 Environmental Requirements. 24 On-Board Connectors. 25 Serial Connectors . 26 Parallel Connector . 26 Floppy Connector . 26 IDE . 27 CPU Board Reset Connector. 27 Installing and Removing the IOBP. 28 Front Connectors. 30 Ethernet . 30 USB . 31 Keyboard/Mouse . 31 Serial . 32 5 SPARC/IOBP-CPU-56 VMEbus Connector. 33 Index Product Error Report SPARC/IOBP-CPU-56 6 Tables Introduction Table 1aaaaaaaStandard Compliances. 21 Installation Table 2aaaaaaaEnvironmental Requirements. 24 7 SPARC/IOBP-CPU-56 Figures Installation Figure 1aaaaaaaLocation of On-Board Connectors. 25 Figure 2aaaaaaaSerial Connector Pinout. 26 Figure 3aaaaaaaParallel Connector Pinout. 26 Figure 4aaaaaaaFloppy Connector Pinout. 27 Figure 5aaaaaaaIDE Connector Pinout. 27 Figure 6aaaaaaaConnecting IOBP to Backplane. 29 Figure 7aaaaaaaFront Connectors . 30 Figure 8aaaaaaaEthernet Port 3 Connector Pinout. 30 Figure 9aaaaaaaEthernet Port 4 Connector Pinout. 31 Figure 10aaaaaaUSB Connector Pinout. 31 Figure 11aaaaaaSun Keyboard/Mouse Connector Pinout. 31 Figure 12aaaaaaPS/2 Keyboard/Mouse Connector Pinout. 32 Figure 13aaaaaaSerial Front Connector Pinout on IOBP-CPU-56/3. 32 Figure 14aaaaaaSerial Front Connector Pinout on IOBP-CPU-56/5. 32 Figure 15aaaaaaVMEbus Connector Pinout, Rows Z-B. 34 Figure 16aaaaaaVMEbus Connector Pinout, Rows C and D. 35 SPARC/IOBP-CPU-56 8 Using this Guide This Installation Guide is intended for users qualified in electronics or electrical engineering. Users must have a working understanding of Peripheral Component Interconnect (PCI), VME, and telecommunications. Conventions Notation Description 57 All numbers are decimal numbers except when used with the notations described below. 0000000016 Typical notation for hexadecimal numbers (digits 0 through F), e.g. used for addresses and offsets 00002 Same for binary numbers (digits are 0 and 1) x Generic use of a letter n Generic use of numbers n.nn Decimal point is signalled Bold Used to emphasize a word Courier Used for on−screen output Courier+Bold Used to characterize user input Italics For references, table, and figure descriptions File > Exit Notation for selecting a submenu <text> Notation for variables and keys [text] Notation for buttons ... Repeated item . Omission of information from example/command . that is not necessary at the time being . .. Ranges : Extents | Logical OR No danger encountered. Pay attention to important information 9 SPARC/IOBP-CPU-56 Notation Description Possibly dangerous situation: slight injuries to people or damage to objects possible Dangerous situation: injuries to people or severe damage to objects possible Start of a pprocedure End of a procedurep Abbreviations Abbreviation Description CPU Central Processing Unit CTS Clear to Send DCD Data Carrier Detect DSR Data Set Ready DTR Data Terminal Ready EMC Electromagnetic Compatibility ESD Electrostatic Sensitive Device FCC Federal Communications Commission GND Ground IDE Integrated Device Electronics IOBP Input Output Back Panel LFM Linear Feet per Minute SPARC/IOBP-CPU-56 10 Abbreviation Description PCI Peripheral Component Interconnect RI Ring Indicator RTS Request to Send RXD Receive Data SELV Safety Extra Low Voltages TPE Twisted Pair Ethernet TXD Transmit Data VME Versa Module Eurocard Revision History Order No. Rev. Date Description 220226 AA May 2003 Preliminary Installation Guide 220226 AB September Final release version 2003 11 SPARC/IOBP-CPU-56 Other Sources of Information For further information refer to the following documents. Company/Org. www. Document Force Computers forcecomputers.com SPARC/CPU−56 Reference Guide SPARC/CPU−56T Reference Guide SPARC/IOBP-CPU-56 12 Safety Notes The text in this chapter is a translation of the Sicherheitshinweise" chapter This section provides safety precautions to follow when installing, operating, and maintaining the board. We intend to provide all necessary information to install and handle the board in this Installation Guide. However, as the product is complex and its usage manifold, we do not guarantee that the given information is complete. If you need additional information, ask your Force Computers representative. The board has been designed to meet the standard industrial safety requirements. It must not be used except in its specific area of office telecommunication industry and industrial control. Only personnel trained by Force Computers or persons qualified in electronics or electrical engineering are authorized to install, remove or maintain the board. The information given in this manual is meant to complete the knowledge of a specialist and must not be taken as replacement for qualified personnel. EMC The board has been tested in a Standard Force Computers system and found to comply with the limits for a Class A digital device in this system, pursuant to part 15 of the FCC Rules respectively EN 55022 Class A. These limits are designed to provide reasonable protection against harmful interference when the system is operated in a commercial environment. The board generates and uses radio frequency energy and, if not installed properly and used in accordance with this Installation Guide, may cause harmful interference to radio communications. Operating the system in a residential area is likely to cause harmful interference, in which case the user will
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