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AMD 64-Bit Technology Preliminary Information AMD 64-Bit Technology The AMD x86-64™ Architecture Programmers Overview Publication # 24108 Rev: A Issue Date: August 2000 Preliminary Information © 2000 Advanced Micro Devices, Inc. All rights reserved. The contents of this document are provided in connection with Advanced Micro Devices, Inc. (“AMD”) products. AMD makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this publication. Except as set forth in AMD’s Standard Terms and Conditions of Sale, AMD assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. AMD’s products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other applica- tion in which the failure of AMD’s product could create a situation where per- sonal injury, death, or severe property or environmental damage may occur. AMD reserves the right to discontinue or make changes to its products at any time without notice. Trademarks AMD, the AMD logo, x86-64, AMD Athlon, and combinations thereof are trademarks of Advanced Micro Devices, Inc. MMX is a trademark of Intel Corporation. Windows NT is a trademark of Microsoft Corp. Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies. Preliminary Information 24108A—August 2000 AMD 64-Bit Technology Contents Introduction. 1 Motivation for a 64-Bit Architecture . 1 Features of the x86-64™ Architecture . 2 Long Mode . 2 64-Bit Mode . 3 Compatibility Mode . 5 Legacy Mode . 5 Definitions. 6 Notation . 6 Registers. 7 Application Programming . 9 Overview . 9 Application Software Registers and Data Structures . 10 CPUID . 11 Application Registers . 12 General-Purpose Registers (GPRs) . 12 Streaming SIMD Extension (SSE) Registers . 15 Memory Organization . 15 Address Calculations in 64-Bit Mode. 15 FS and GS As Base of Address Calculation . 16 Instruction-Set Conventions . 17 Address-Size and Operand-Size Prefixes. 17 REX Prefixes . 18 REX Prefix Fields . 20 Displacement . 24 Direct Memory-Offset MOVs . 24 Immediates. 24 RIP-Relative Addressing. 24 Default 64-Bit Operand Size . 26 Stack Pointer . 26 Branches . 27 System Programming . 29 Overview . 29 Canonical Address Form . 29 CPUID . 30 System Registers . 31 Extended Feature Enable Register (EFER) . 31 Control Registers. 33 Descriptor Table Registers . 34 Debug Registers. 34 Enabling and Activating Long Mode . 35 Processor Modes . 35 iii Preliminary Information AMD 64-Bit Technology 24108A—August 2000 Activating Long Mode. 36 Virtual-8086 Mode . 39 Compatibility Mode: Support for Legacy Applications . 39 Long-Mode Semantics . 39 Switching Between 64-Bit Mode and Compatibility Mode . 39 Segmentation . 40 Code Segments . 40 Data and Stack Segments . 42 System Descriptors . 44 Virtual Addressing and Paging. 47 Virtual-Address and Physical-Address Size . 47 Paging Data Structures . 47 Enhanced Legacy-Mode Paging . 53 CR2 and CR3 . 54 Address Translation. 55 Privilege-Level Transitions and Far Transfers . 58 Call Gates . 58 SYSCALL and SYSRET . 61 Task State Segments . 63 Interrupts . 65 Gate Descriptor Format . 65 Stack Frame . 67 IRET . 67 Stack Switching . 68 Task Priority . 70 Appendix A Integer Instructions in 64-Bit Mode . 73 General Rules . 73 Operand Size in 64-Bit Mode. 73 Instruction Differences . 93 Invalid Instructions . 93 Single-Byte INC and DEC Instructions . 94 NOP. 94 MOVSXD . 95 Instructions that Reference RSP . 95 Segment-Override Prefixes in 64-Bit Mode. 96 FXSAVE and FXRSTOR . 96 New Encodings for Control and Debug Registers . 97 Appendix B Long Mode Differences . 98 Appendix C Initialization Example . 100 Appendix D Implementation Considerations . 105 Address Size . 105 Operand Alignment . 105 CR8 Interactions with APIC . 106 Physical Address Fields in MSRs . 107 iv Preliminary Information 24108A—August 2000 AMD 64-Bit Technology Introduction AMD 64-bit technology includes the x86-64™ architecture, which is a 64-bit extension of the x86 architecture. The x86-64 architecture supports legacy 16-bit and 32-bit applications and operating systems without modification. It provides recompiled 64-bit applications and operating systems with these new features: I 64-bit flat virtual addressing. I 8 new general-purpose registers (GPRs). I 8 new registers for streaming SIMD extensions (SSE). I 64-bit-wide GPRs and instruction pointer. The x86-64 architecture has a legacy mode in which it supports binary compatibility with existing operating systems and applications, and a new mode in which it supports both the new features for recompiled code as well as binary compatibility with existing applications. The architecture also adds a new instruction-pointer relative-addressing mode, uniform byte- register addressing, and a fast interrupt-prioritizing mechanism. This document describes the new features of AMD’s x86-64 architecture and their differences from legacy x86 architecture. Motivation for a 64-Bit Architecture The need for a 64-bit x86 architecture is driven by applications that address large amounts of virtual and physical memory, such as high-performance servers, database management systems, and CAD tools. These applications benefit from both 64-bit addresses and an increased number of registers. The small number of registers available in the legacy x86 architecture also limits performance in computation-intensive applications such as graphics transform and lighting, circuit simulation, and scientific algorithms. Increasing the number of registers provides a performance boost to many applications. Introduction 1 Preliminary Information AMD 64-Bit Technology 24108A—August 2000 Features of the x86-64™ Architecture The x86-64 architecture extends the legacy x86 architecture by introducing two major features: a 64-bit extension called long mode and register extensions. Long Mode Long mode consists of two sub-modes:.
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