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Digital TechnicalJournal 515 Number 4 February 1987 Editorial Staff Editor- Richard W 13eane Production Staff Production Editor- jane C. 13lakc Designer- Charlotte 13eJJ Interactive Page Makeup- Leslie K. Schoemaker Advisory Board Samuel H. Fuller. Chairman Robert M. Glorioso john W. McCredie Mahendra R. Patel F. Grant Savicrs William D. Strecker The Digital Technical journal is published by Digital Equipment Corporation. 77 Reed Road, Hudson. Massachusetts 01749. Changes of address should be sent to Digital Equipment Corporation. attention: Media Response Manager, 200 13aker Ave .. CFOl-l/M94. Concord, i'>lA 01742 Comments on the content of any paper arc wel­ comed Write to the editor at Mail Stop HL02-.3/K ll at the published-by addrcss. Comments can also be sent on the ENET to RDVAX::I3EANE or on the ARPANET to llEANE'!;,RDVAX DEC@DECWRL Copyright © 1987 Digital Equipment Corporation Copying without fee is permitted provided that such copies are made for use in educational institutions by faculty members and arc not distributed for com­ mercial advantage. Abstracting with credit of Digital Equipment Corporation's authorship is permitted. Requests for other copies for a fee may be made to the Digital Press of Digital Equipment Corporation. All rights reserved. The information in this journal is subject to change without notice and should not be construed as a commitment by Digital Equipment Corporation. Digi­ tal Equipment Corporation assumes no responsibility for any errors that may appcar in this document. !SUN l-55558-001-7 Documentation Numbcr EY-671 I E-DP The following are trademarks of Digital Equipment Corporation DEC, DECnet. the Digital logo. LNO.) Plus. MicroVAX I. MicroVAX IJ. NMI, PDP-J I. PDP-I lj2�t. PDI'-l lj-44, RSX, RSX-IlM, RSX-1 I M-PUIS. Sill. UNJilllS, VAX. VAX-I l/750. VA)>-LI/780. VAX-11/782. VAX 8200. VAX 8.)00, VAX 8500 VAX 8550. VAX 8600, VAX 8650. VAX 8700. VAX 8800. VAXBI, VAXIII 787.32. VAXclustcr, VAX.station. VAXstation Jl, VMS ADA is a registered trademark of the U.S. Government Data General is a registered trademark of Data General Corporation Harris is a trademark of Harris Corporation IBM is a registered trademark of I ntcrnational Business Machines Corporation Cover Design l.ightspecd is a trademark of Lightspeed Computers, This issue .features the VAX 8800 .family. Our couer depicts Inc. the growth of a chambered nautilus as a metapbor .for the Motorola is a registered tradcmark of Motorola. Inc grotl'tb of the VAX famiiJ'. As those chambers spiral from the center, so the power of the VAX family grows .from the SCAI.OSystcm and ValidGED ar� trademarks of Valid Logic. Inc Micro VAX systems, through the VAX 8200 and 8.300 CPl!s, to the neuJ VA X 8800 multiprocessor. The image was cre­ TK1Solver is a trademark of Software Arts. Inc ated using the Lightspeed system. CNIX is a trademark of American Telephone & Telegraph Company llell LaboratOries The co11er was designed by Deborah Falck, Eddie Lee and Book production was clone by Educational Services Tsuneo Taniuchi of the Graphic Design Department. Media Communications Group in 13cdford, MA. Contents 8 Foreword Donald]. Mcinnis Products 10 New An Overview of the Four Systems in the VAX 8800 Family M. Burley Robert 20 The VAX 8800 Microarchitecture Sudhindra N. Mishra The CPU Clock System in the VAX Family 34 8800 A. Samaras William 4 1 Aspects of the VAX 8800 C Box Design john Fu, james Keller, and Kenneth j. Haduch 13. 52 The Memory System in the VAX 8800 Family Paul]. Natusch, David C. Senerchia, and Eugene Yu L.. 6 2 Floating Point in the VAX 8800 Family john H.P. Zurawski, Kathleen Pratt, and Tracey jones L. L. 72 The VAX 8800 lnputjOutput System james P. _lanetos Bus 81 The V AXBI -A Randomly Configurable Design Paul C. Wade A Logical Grounding Scheme for the VAX Processor 88 8800 Michael W. and Gerald]. Brand Kement 100 The Simulation of Processor Performance for the VAX 8800 Family Cheryl A. Wiecek VMS Multiprocessing on the VAX 8800 System 1 1 1 Stuart]. Michael S. Harvey, and Kathleen Farnham, D. Morse 12 0 A Parallel Implementation of the Circuit Simulator SPICE on the VAX 8800 System Gabriel P. Bischoff and Steven S. Greenberg 129 The Impact of VAX 8800 Design Methodology on CAD Development Dennis T. Bak 136 On-line Manufacturing Data Access on the VAX 8800 Project Andrew J. Matthews Editor's Introduction cache affected their design, and why they used TTL in the memory controller. The V �"X 8800 fa mily does not have a separate floating po int accelerator. As jo hn Zurawski , Kathy Pratt, and Tracey jo nes point out, how­ ever, a custom ECL unit achieves high perfor· mance through the normal datapaths . Thus less hardware is needed, and operands are fetched faster. 1/0 devices are linked to the CPU by the VAXBI bus. In his paper, Ji m janetos discusses the NBI adapter, which conta ins logic to handle Richard Beane W. CPU references and DMA requests. Then Paul Editor Wade describes how the V AXBI design team had to abandon the traditional approach and use a This issue features papers about the design of variety of techniques to specify the bus. Some the VAX 8800 fa mily of CPUs, written by mem­ chip problems were resolved only after a thor­ bers of the design team. The technology used in ough analysis of the physical configuration. Digital's latest high-end machine, the VAX 8800 jerry Bra nd and Mike Kement discuss the m u ti pro cessor, a !so forms the basis for the importance of using ground correctly as a signal otherI three fa mily members: the 8700, 8550. conductor to achieve high performance. They and 8500 CPUs. describe the sources of ground-related noise in Bob Burley's overview re lates the processes the CPU, and what they did to isolate and con­ used in the 8800 design and the fu nctions of the trol those sources. memory interconnect (NMI) , the VAX BI I/0 Many VMS features support multiprocessing. bus, and the four logic boxes forming the five­ Stu Fa rnham, Mike Harvey, and Kathy Morse first stage pipeline. The early discovery of design describe the hardware that supports multipro­ flaws and the use of automated tools helped to cessi ng, then the interlocked instructions, achieve an aggressive completion schedule. exception handlers, and traps that implemenr The micromachine implements the microar­ VMS multi processing. To show how multi pro­ chitecmre and contains four of the five pipeline cessing decreases execution time, Gabriel stages . Sudhin Mishra describes how microin· Bischoff and Steve Green berg converted the structions are handled, emphasizing the use of SPICE circuit simulator into CAYENNE, a paral­ microbranches and microtraps to ensure lel progra m. They created master and slave pro­ coherency . cesses that ran CAYENNE times faster than The VAX 8800 clock syste m, discussed bv Bill 1.7 SP ICE. Samaras. was designed using an automate tim· d The final two papers re late some of the autO· ing verifier. He describes the trade-off between mated tools and techniques used on the 8800 using the verifier and maximizing the accuracv ' project. Dennis Bak first descri bes building the of timing signals by minimizing their skew. CAD suite from existing tools, newly developed The C Box and the M Rox are two parts of the ones, and modifications. The methodology was pipeline. john Fu, Jim Ke ller, and Ken Haduch tru ly innovative, serving as a framework for describe the C Box's no-write allocate cache and fu ture projects. Then Andy Matthews discusses the delayed-write algorithm that ensures correct the on-line system that transformed CAD data write-through . The C Box must also handle intO specifications used by Manufacturing. This pipeline stall cond itions and maintain data system minimized the prod uct stan-up ti me by coherency between processors . The M Box han­ eliminating pape!Work. read and write requests for the mcmorv arraysdles . Paul Natusch, Dave Senerchia, and Gen� Yu explain how the Cllesigns of the NMI and the 2 Biographies Denn is T. Bak Dennis Bak is a principal software engineer in the Advanced VAX Development Group. a project leader, he is currently developing new CAD tools improveAs designer productivity on future design projects. In other positwions, Dennis performed configuration testing for PDP-11 and VAX systems. Prior to joining Digital in 1980, he worked as a research engineer at Ford Motor Company, doing advanced development on electronic engine-control systems. Dennis earned a B.S. degree in elec­ trical engineering from the University of Michigan in 197 4. Gabriel Bischoff In 1985, Gabriel Bischoff joined Digita l after receiv­ ing a DiplP.oma of Engineer and a Diploma of Advanced Studies in device physics from the Ecole Centrale de Lyon (1980) and a Ph.D. degree in E.E. from Cornell University (1985) . a senior software engineer in the Semi­ conductOr Engineering Group, heAs is investigating the application of paral­ lel computing architectures for VLSI CAD cools, particularly circuit simula­ tors . Gabriel developed a parallel version of the circuit simulator SPICE for shared-memory multiprocessors. A member of IEEE, he has published papers on device modeling and circuit simulation. Gerald J. Brand jerry Brand is a principal engineer currently developing high-density, high-availability power systems. Prior to working on the power and packaging team for the VAX 8800 fa mily, he designed two MPS power modules that are widely used in Digital's products. Before joining Digital in 1980, Jerry worked for over 14 years in disciplines ranging from oceanography to gas-turbine instrumentation.
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