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Muhammad-Asif.Pdf EFFICIENT FRAMEWORK FOR MACROBLOCK PREDICTION AND PARALLEL TASK ASSIGNMENT IN VIDEO CODING by Muhammad Asif PE091005 A research thesis submitted to the Department of Electrical Engineering in partial fulfillment of the requirements for the degree of DOCTOR OF PHILOSOPHY IN ELECTRONIC ENGINEERING Faculty of Engineering Capital University of Science and Technology Islamabad August 2016 Copyright c 2016 by Muhammad Asif All rights are reserved. No part of the material protected by this copy right notice may be reproduced or utilized in any form or any means, electronic or mechanical, including photocopying, recording or by any information storage and retrieval system, without the permission from the author. i Dedicated to my parents ii ACKNOWLEDGMENT First of all thanks to Almighty Allah Who granted me the courage, determination and environment to initiate my research. All respects and regards to Holy Prophet Muhammad (P.B.U.H) who is the last messenger and whose life is a perfect model for humanity. I am greatly honored to have the supervision of Dr. Imtiaz Ahmad Taj whose guidance always kept me confident and buoyant at every single stage of my research work. I have always been thankful to have such a supporting personality as my research supervisor. His presence there has always helped me stay afloat and saved me from getting disappointed at any point in my research. I would like to pay gratitude to the admirable Dr. Syed Muhammad Ziauddin as he has always been a role model for me. His consistent support, encouragement and direction always led me in the way of my research. Undeniably, it is due to his mentorship that I have been able to succeed in this endeavor without getting deviated. His acumen and expertise always served as a beacon for me with which I could see through the intricacies of subject matter objectively. His vision induced predictability in my line of action and his monitoring did not let me digress from the core of my research. I would also like to commend the significant role of National ICT R&D Fund, Ministry of Information Technology and my parent organization Streaming Net- works (Pvt) Ltd making available the opportunities of attaining higher education. Their vision and programs have created a conducive environment for those who are interested in conducting research that can bring value. Without their financial and technical support, it would be likely impossible for me to come up with this level of research work. Especially, I would like to thanks my friend Dr. Maaz bin Ahmad for their constant cooperation and back-up in achieving this goal. They guided me throughout my research work and elucidated the way of confronting the hiccups in achieving every milestone in this way. In addition to the support I received from my colleagues at the Streaming Networks and university, I greatly acknowledge the noteworthy contribution of my friends Muhammad Tahir, Atif Raza, Imran ul Haq, Syed Ali Hassan, Waqas Ellahi and Moeen Tayyab for their support during my research and in accomplishing this dissertation. I am indebted to my parents for their robust upbringing, their special prayers for my success, and the encouragement and support they provided in every achieve- ment that I ever attained in my life. The patience, moral support and backing iv of my family during my PhD blessed me the leverage to focus on my research wholeheartedly. I am also grateful to my wife for her fortitude, understanding and incessant encouragement during the course of my research work. Put in a nutshell, this dissertation would not have been a possibility, had my family not gone out of their skin in supporting my efforts. I highly appreciate the endorsement provided by my brothers Amir and Ahsan. They always helped me out whenever I lost focus on my research work due to some socio economical pressures. Their love and affection gave me the strength to stand tall whenever a hindrance came in my way to this research. This dissertation is dedicated to my family for their love, deep understanding, endless patience and encouragement at all times. It is also dedicated to all those who helped me in any way in my research work. It is also dedicated to every feeling I had that convinced me that I was doing it right. It is dedicated as well to the never-ending credence from Allah, almighty that triggered self-belief and faith in me to make this work possible. v ABSTRACT Video coding is an integral part of numerous real-time multimedia applications such as video telephony, telemedicine, video conferencing and video streaming. In real-time mul- timedia systems or power constrained systems, the coding performance of modern video coding standards such as High Efficiency Video Coding (HEVC) and H.264/MPEG-4 Advanced Video Coding (AVC), is limited by computational complexity. This thesis presents research work to develop techniques to reduce the computational complexity of video encoders and to exploit their data and task level parallelism. These techniques aim to provide significant complexity saving as well as improving coding efficiency. A computationally efficient framework for macroblock prediction is developed to re- duce the computational complexity and overheads related to the macroblock prediction process in video encoding. The framework consists of several innovative techniques to exclude as many intra and inter prediction modes as possible prior to the RDO (rate distortion optimization) process. In the best case, the proposed framework selects one MB type either intra or inter and one corresponding near-optimal prediction mode, so that the complete RDO process is neglected. Simulation results show that the proposed framework achieves significant complexity savings without any significant degradation in video quality. In addition, a complexity reduction technique for motion compensation is developed to perform inter prediction. This addresses the computational complexity issues related to both interpolation and data manipulation modules of the motion compensation process. The end results of the experiments display that this method prominently decreases the computational complexity without loss in rate-distortion performance. Finally, an end-to-end hybrid hardware-software implementation scheme based on pipelin- ing and multitasking for advanced video coding is presented. This scheme exploits the task and data level parallelism in video encoders to improve their coding efficiency. The parallelism is exploited at both coarse-grain level and fine-grain level. The coarse-grain level parallelism exploitation is done by concurrently executing multiple tasks on differ- ent processing cores while fine-grain level parallelism is achieved by using SIMD (single instruction multiple data) instructions. Such exploitation of parallelism also helps to better utilize the computational power offered by advanced media processors. The out- comes of the experiments reveal that suggested scheme has resulted in enhancing the encoding rate and reducing power consumption. In the field of video coding the main achievement of this research can be given in a nut shell as: (a) Development of computationally efficient techniques for macroblock predic- tion type and partition selection. (b) Development of complexity reduction algorithm based on intra and inter prediction mode selection. (c) Development of a computation- ally efficient scheme for motion compensation. Finally, (d) development of end-to-end vii hybrid implementation scheme for H.264/AVC encoder that exploits its data and task level parallelism to improve coding efficiency. These innovative techniques may prove handy in real-time implementation of H.264/AVC and HEVC video encoders in computationally constrained environments as is the case in general purpose computers and low-power mobile devices. viii LIST OF PUBLICATIONS Muhammad Asif, Imtiaz A. Taj, S. M. Ziauddin, Maaz Bin Ahmad and M. Tahir \ A hybrid scheme based on pipelining and multitasking in mobile application processors for advanced video coding ", Scientific Programming Journal, vol. 2015, Article ID 197843, 2015. doi:10.1155/2015/197843 (I.F 0.559) Muhammad Asif, Imtiaz A. Taj, S. M. Ziauddin, Maaz Bin Ahmad and Atif Raza \ An efficient inter prediction mode selection scheme for advanced video coding based on motion homogeneity and residual complexity ", IEEJ Transactions on Electrical and Electronic Engineering, (Article in Press) (I.F 0.213) Muhammad Asif, Imtiaz A. Taj, S. M. Ziauddin, Maaz Bin Ahmad and M. Tahir \ An efficient framework for prediction parameters selection in advanced video coding ", Elsevier Journal of Measurement, (Article Under Review) (I.F 1.484) Muhammad Asif, Imtiaz A. Taj, S. M. Ziauddin, Maaz Bin Ahmad and M. Tahir \ An Efficient scheme for intra prediction block size and mode selection in advanced video cod- ing ", 13th International Conference on Frontiers in Information Technology (FIT2015), 2015 Muhammad Asif, Saqib Majeed, Imtiaz A. Taj, S. M. Ziauddin and Maaz Bin Ahmad \ Exploiting MB Level Parallelism in H.264/AVC Encoder for Multi-Core Platform ", 2014 IEEE/ACS 11th International Conference on Computer Systems and Applications (AICCSA), pp. 125-130, ISSBN/ISSN: DOI: 10.1109/AICCSA.2014.7073188, 2014 Muhammad Asif, Masood Farooq and Imtiaz A. Taj, \ Optimized Implementation of Motion Compensation for H.264Decoder ", 5th International Conference on Computer Sciences and Convergence Information Technology (ICCIT2010), Pages: 216-221, ISSB- N/ISSN: ISBN: 978-1-4244-8567-3, 2010 ix TABLE OF CONTENTS Acknowledgment....................................
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