News for the Embedded Systems Conference

2003 NEWS FOR THE EMBEDDED SYSTEMS CONFERENCE An optimistic outlook for 2003 Increased sales 2002 was a highly successful year for Lauterbach with sales up by 20%. Whenever we spoke to cus- tomers or colleagues in the industry the reaction was one of surprise. Sales increases in 2002? How could that have been possible in such a difficult business environment? 2002 was not such a good year for the majority of companies in the high-tech sector and the market for development tools was unlikely to have grown last year. There is, therefore, every indication that Lauterbach gained a greater share of the market as a whole. In other words, in 2002 we again succeeded in consolidating our market position. This was very plain to see in the UK for more information where Lauterbach's new branch posted excellent sales figures and turned a profit in its very first year. Of course nobody can predict whether 2003 will be another successful year but Lauterbach is extremely well placed as it goes into the new year. Own branch in Japan development department especially in the field of VHDL designs in TRACE32 products and the fur- Japan is a large and important market as everyone ther development of JTAG tools. We are therefore knows. It is also well known for being a very closed confident that all projects planned for 2003 can be and difficult market for foreign companies. This implemented speedily and on schedule. makes it all the more important for a company to be represented with its own branch in Japan if it wants New products to market its products there successfully. Lauterbach As you will see on the following pages there are has managed to attract Japanese employees with many new products and ideas at Lauterbach. With- great experience in the embedded market for the out doubt the key focal points are multicore debug- branch operation that we will be establishing in Ja- ging and an extended range of debuggers for DSPs. pan in 2003. This is an important step for further At the Embedded Systems Conference in San Fran- strengthening the company's global presence. cisco Lauterbach will be introducing a brand new Development team strengthened debugger for the OMAP and TMS320C55x DSPs www.lauterbach.com from Texas Instruments. We would like to invite you At the end of 2002 and the beginning of 2003 we to visit us on our exhibition stand for a relaxed and recruited a number of new employees for our head- informative meeting. quarters in Hofolding. They will strengthen the Visit TRACE32-ICD thethe cost cost efficient efficient in-circuitin-circuit debugger debugger Multicore debugging The debugging of system-on-chip designs face and how synchronous debugging can be imple- containing several cores places new de- mented. mands on development tools. Ideally chip designers and tool producers should agree 1. One debugger supporting all cores on the quickly on suitable techniques that guar- SoC antee the user rapid availability of high- At first glance this would appear to be the ideal solution quality development tools with free selec- for the developer. The main advantages of this solution tion of the core combination. are as follows: one development tool for all cores and Application-specific ASICs are now being used hence you only need familiarization with one user inter- to an increasing extent within embedded de- face and product philosophy. This is certainly the best signs. In order to achieve optimum functional- approach to adopt for SoCs that are produced in high ity and performance it is becoming more and volumes and are used for a large number of develop- more common for several cores to be inte- ments. An example of this type of solution is the OMAP grated to form a system-on-chip (SoC). The debugger from Lauterbach that allows debugging of the use of a RISC processor combined with a DSP ARM925/926 core as well as the TMS320C55x DSP. is widespread. Examples are: In contrast there is also a market trend towards individu- • OMAP processors from Texas Instruments alized SoCs that are used for the development of only containing ARM925/926 RISC core and one product. A new SoC that achieves even more TMS320C55x DSP optimised performance and functionality is then created for more information • S-GOLD from Infineon containing for the next product. If the developer also wants full free- ARM926EJ-S and OAK DSP dom in the selection of the integrated cores, he will also need the services of a tool producer who can provide an The testing and the integration phase of this optimum product for every architecture that is employed. type of multicore SoC design places new re- Naturally the debug tool should also be available fully quirements on microprocessor development tested by the time the first chip is produced from the tools. This article focuses on debugging by wafer. addressing several cores via a shared debug interface. We present several approaches and Although this attempt to explain the problems involved. solution is obviously the Addressing several cores via one best solution debug interface available, the chances of it Most modern processors provide on-chip de- being im- bug logic for debugging. The interface that is plemented most frequently used for controlling the debug cheaply and logic is defined by the JTAG specification. more espe- However, with multicore SoC designs a sepa- cially quickly rate JTAG interface is not provided for every while main- www.lauterbach.com core in order to save on the number of pins taining a high and so cut costs. Instead, a joint JTAG inter- standard of face has to suffice for debugging all cores. This quality are raises the question of how the debugger can rather un- address several cores via the joint JTAG inter- likely. Visit Figure 1: JTAG server solution 2 THE PRODUCT LINE TRACE32-ICD 2. Using a JTAG server Another critical point, especially for real-time applications is the large volume of data that has to be handled by the Highly developed debuggers are already available today JTAG server. This slows the reaction time of the indi- for the majority of cores. We might therefore ask, why vidual core accordingly. Therefore, in order to meet the not connect the existing debuggers to a JTAG server that system's real time requirements it is necessary to pack takes care of the addressing of the individual cores via time-critical functions into the hardware, which then brings the joint JTAG interface? us back to the application-specific server. One can imagine a solution of this kind being implemented An optimum server solution is therefore one in which all as follows: Interface hardware is connected in front of the cores used come from the same semiconductor the joint JTAG interface. This hardware is controlled by manufacturer, this manufacturer then supplies the JTAG server software on the host. The individual debug client server and at the same time the matching debuggers. now sends its communication request to the server by Application-specific servers on the other hand require means of a remote procedure call. This guarantees ex- agreements between the producers of the debuggers. This clusive access to the joint JTAG interface and forwards is something that usually proves difficult because of the the communication request to the individual core. Figure competitive situation and is also time-consuming and cost- 1 shows the basic principle of a server solution of this intensive. An added factor is that it will be necessary to type. adapt the server to cater for every new core combina- In this case the debugger uses a software interface to tion. the JTAG server instead of dedicated JTAG hardware. This approach, although it appears very elegant at first 3. Completely independent debuggers at sight, similarly does not offer a complete solution to the the joint JTAG interface problem. A number of semiconductor manufacturers al- This approach represents a simple and open solution in ready offer server solutions for core groupings in their which the best possible core combination can be freely product range, but there is no server standard in sight selected for the particular application. During develop- that might offer a vendor-neutral solution. ment and in- The JTAG server solution also proves to be rather inflex- tegration the ible when individual semiconductor manufacturers have developer expanded the JTAG signals of their core in order to offer can resort to additional debug functionality. In a multicore development fully opti- environment, for example, it would be desirable for each mised debug- core to have a stop request signal making it possible to gers without stop the core immediately. Another requirement would be the need to to indicate that a core has stopped by means of a stop match the indication signal. Ideally then both signals could be used development for synchronous stopping of all cores in a multicore ap- environment plication. to a specific With free selection of an optimum core combination a application. number of additional signals will quickly appear. The easy The basic option would be to simply let these signals go by the idea in this board and dispense with the additional functionality. How- case is that ever, these signals are often necessary or at least very an indepen- helpful and so need to be included. The JTAG server would dent debug- therefore still have to be matched to the specific applica- ger is con- Figure 2: Completely independent tion and tested. debuggers at the joint JTAG interface 3 TRACE32-ICD thethe cost cost efficient efficient in-circuitin-circuit debugger debugger nected to the joint JTAG interface for every core.

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