TRF3040 Frequency Synthesizer/Modulator

Home , Frequency synthesizer, Synthesizer

Evaluation and Demonstration of the TRF3040 Frequency Modulator/Synthesizer

Application Report

June 1999 Mixed Signal Products SWRA014 IMPORTANT NOTICE

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Contents 1 Introduction ...... 1 1.1 Digital Baseband Platform ...... 1 1.2 Analog Baseband Components...... 2 1.3 Power Management ...... 2 1.4 Evaluation Board ...... 2 1.5 Related Documentation ...... 3 1.6 WorldWide Web ...... 3 1.7 E-mail ...... 3 2 TRF3040 Evaluation Board ...... 4 2.1 External Power ...... 14 2.2 Voltage Regulators ...... 14 2.3 Serial Interface ...... 15 2.4 External Reference ...... 15 3 TRF3040 Evaluation Board Engineering Notes...... 16 3.1 TRF3040 Frequency Synthesizer...... 17 3.1.1 Voltage-Control Oscillator (VCO)...... 17 3.1.2 Synthesizer Input RXLO+/–...... 17 3.1.3 Loop Filters ...... 18 3.1.4 Fractional Compensation and Charge Pump Current Setting...... 21 3.2 TRF3040 Modulator ...... 22 3.2.1 Transmit IF VCO (TXIF_VCO)...... 22 3.2.2 Single Sideband Suppressed Carrier Converter...... 24 3.2.3 I/Q Modulator ...... 24 3.2.4 Variable Gain Amplifier and the Power Amplifier Driver...... 24 4 Typical Performance ...... 26 4.1 Settings ...... 26 4.2 Performance Graphs ...... 27 5 Software Driver ...... 35 5.1 Program Screen ...... 35 5.1.1 Main Loop Section ...... 35 5.1.2 Auxiliary Loop Section...... 37 5.1.3 Modulator Section ...... 38 5.1.4 Device Section ...... 39 5.1.5 Editing Section ...... 40 5.2 Special Notes ...... 41 References ...... 42

v Figures

List of Figures

1 Single-Chip Digital Baseband Platform...... 1 2 TRF3040 Functional Block Diagram...... 4 3 TRF3040 Synthesizer Functional Block Diagram...... 5 4 TRF3040 Modulator Functional Block Diagram...... 5 5 TRF3040 Evaluation Board Layout (Component Side)...... 6 6 TRF3040 Evaluation Board Layout (Back Side)...... 7 7 TRF3040 Evaluation Board Schematic...... 8 8 Single-Band System Using the TRF3040 Device...... 16 9 Dual-Band System Using the TRF3040 Device...... 17 10 Main Loop Filter Configuration Used on the TRF3040 Board...... 18 11 Typical Varactor-Controlled LC Tank Configuration...... 22 12 Example of a Loaded Tank Circuit...... 23 13 Typical Differential-to-Single-Ended Configuration...... 25 14 Typical Test Setup for the TRF3040 Evaluation Board...... 26 15 Spur Suppression on 1/8 Channel...... 27 16 Spur Suppression on 2/8 Channel...... 28 17 Spur Suppression on 3/8 Channel...... 28 18 Spur Suppression on 4/8 Channel...... 29 19 Spur Suppression on 5/8 Channel...... 29 20 Spur Suppression on 6/8 Channel...... 30 21 Spur Suppression on 7/8 Channel...... 30 22 Lock Time ...... 31 23 Low-Band Carrier/Sideband Suppression...... 31 24 Low-Band PA Driver Linearity ...... 32 25 Mid-Band Carrier/Sideband Suppression...... 32 26 Mid-Band PA Driver Linearity ...... 33 27 High-Band Carrier/Sideband Suppression...... 33 28 High-Band PA Driver Linearity ...... 34

vi SWRA014 Tables

List of Tables

1 TRF3040 Evaluation Board Parts List...... 12 2 Main Loop Filter Component Values...... 19 3 Auxiliary Loop Filter Component Values...... 21 4 Oscillator Frequency Tuning Range...... 22 5 Function Keys ...... 41

vii viii SWRA014 Evaluation and Demonstration of the TRF3040 Frequency Modulator/Synthesizer

ABSTRACT This document describes the TRF3040 evaluation board and associated software driver, which allow the evaluation and demonstration of the Texas Instruments (TI) TRF3040 Frequency Modulator/Synthesizer using common radio frequency (RF) bench test equipment.

1 Introduction

The TRF3040 frequency modulator/synthesizer is used with the Texas Instruments single-chip digital baseband platform. This document describes the TRF3040 evaluation board components and the software used to evaluate the device.

1.1 Digital Baseband Platform

The TI single-chip digital baseband platform, shown in Figure 1, combines two high-performance core processors—a digital signal processor (DSP) designed for digital wireless applications and a microcontroller designed specifically for low-power embedded systems.

Single-Chip Analog Receiver Baseband TRF1XXX Power Amp Synthesizer Audio RF TRF7XXX Interface TMS320C54X Interface TRF2XXX DSP Core TRF8XXX S/W Modulator TSC6000 TRF3XXX ASIC User Display RF Section Backplane ARM7DME Speaker (’C470) Keyboard Op Amps Switches Microcontroller SIM Card S/W Regulators

Microphone Single-Chip Digital Baseband Power MGMT

Figure 1. Single-Chip Digital Baseband Platform

The customizable platform helps wireless digital telephone manufacturers achieve lower component counts, save board space, reduce power consumption, introduce new features, save development costs, and achieve faster time to market, while still giving them the flexibility and performance to support any standard worldwide.

1 Introduction

1.2 Analog Baseband Components TI analog baseband components provide a mixed-signal bridge between the world of analog signals and digital signal processors, the key technology of the digital wireless industry. Using a seamless architecture for wireless communications technology, TI matches its baseband interfaces, radio frequency integrated circuits (ICs), and power management ICs to digital signal processing engines to create complete DSP solutions for digital wireless systems.

1.3 Power Management Texas Instruments provides power management solutions with integration levels that meet the needs of a wide range of wireless applications. From discrete low drop-out (LDO) voltages and voltage supervisors to complete power supplies for the baseband section, TI power management solutions play an important role in increasing wireless battery life and system functionality and decreasing time to market. For more information, visit the TI Wireless Communications web site at www.ti.com/sc/docs/wireless/home.htm.

1.4 Evaluation Board The TRF3040 evaluation board consists of a multilayer printed circuit board (PCB) with all the required components. The following information is included in this document to aid in the assessment of this device: • TRF3040 functional block diagram • TRF3040 evaluation board mechanical outline • TRF3040 evaluation board schematic • TRF3040 evaluation board parts list • TRF3040 engineering notes • TRF3040 test results • TRF3040 software driver A DOS-based software driver is supplied with the evaluation board. When the program is executed, the program screen divides into five main sections: • Main Loop • Auxiliary Loop • Modulator • Device • Editing A variety of external test equipment can be used with the TRF3040 evaluation board, such as the following: • IBMt computer or compatible PC with a parallel port • Linear dc power supply • Differential in-phase/quadrature (I/Q) signal generator

2 SWRA014 Introduction

• Spectrum analyzer • Vector signal analyzer The TRF3040 evaluation board is described in Section 2, TRF3040 Evaluation Board.

1.5 Related Documentation The following list specifies product names, part numbers, and literature numbers of related TI documentation. TRF3040 Modulator/Synthesizer data sheet, literature number SLWS057

1.6 WorldWide Web The TI WorldWide Web site at www.ti.com contains the most up-to-date product information including revisions and additions. You can register with TI&ME to build custom information pages and receive new product updates automatically via email.

1.7 E-mail For technical issues or clarification on switching products, please send a detailed E-mail to [email protected]. Questions receive prompt attention and are usually answered within one business day.

Evaluation and Demonstration of the TRF3040 Frequency Modulator/Synthesizer 3 TRF3040 Evaluation Board

2 TRF3040 Evaluation Board

The TRF3040 evaluation board consists of a multilayer printed circuit board, a TRF3040 device, main channel and auxiliary channel voltage-controlled oscillators (VCO), an opto-isolated serial interface, voltage regulators, and necessary peripheral discrete components.

The main synthesizer circuit layout supports a Panasonic VCO or similar device. The auxiliary synthesizer circuit layout supports a Vari-L VCO190 Series VCO or similar device.

Figure 2 describes the TRF3040 device general functional block and related input/output terminals of the device; Figure 3 and Figure 4 present the functional block diagram of the frequency synthesizer and the modulator within the TRF3040 device, respectively. Figure 5 and Figure 6 show the mechanical outline of the TRF3040 evaluation board, and Figure 7 details the TRF3040 evaluation board schematic. Table 1 is a detailed parts list for the TRF3040 evaluation board. SS DDA DDA PHI RF RN V V INA RA PHA V RCLK MCLK XTAL+ 48

1 Main PHP Auxiliary XTAL– Phase Auxiliary Phase INR Detector Prescaler/ Divider Detector VDDA TXEN

RXLO+ Reference DATA Main Divider Prescaler/ RXLO– Divider CLOCK

Control VSSA Logic LOCK

VCCP STROBE

TXLO+ VSSA

TXLO– VDD

Φ 0° 0° Σ VSSP 90° I 90°

PHSOUT I BN ° Σ 0 90° IPEAK Q

TANK+ Q SSA SSA SSA SSA SSA SSA DDA DDA GND V V V V V V V V TANK– DUALTX– DUALTX+

Figure 2. TRF3040 Functional Block Diagram

4 SWRA014 TRF3040 Evaluation Board

DATA Serial Control Shift Registers CLOCK and STROBE Program Latches

Prescaler Modulus Control

NM2 PR NM1 NM3 FMOD NF EM 2 2 12 8 3

RXLO+ 32/33 Main Divider Fractional Compensation RF RXLO– Prescaler (N/N+1) Accumulator Charge Pump CN CL 82 PHP EM Main Proportional NR Phase Detector Charge Pump RN

12 RSM CN CL CK EM+EA Select 8 24 2

INR Reference 1 ÷÷2 ÷4 8 Divider Integral Charge Pump PHI RSA Select 2

EA LOCK Auxiliary Phase Detector EA

INA 8/9 Auxiliary Divider Prescaler Auxiliary RA Charge Pump PHA 13 NA Figure 3. TRF3040 Synthesizer Functional Block Diagram

TXLO+ TXLO– I I

TXLO Buffer

TXIF VCO and Buffer TXIF Buffer TANK+ DUALTX+ ° 0° 0° 0 Σ Σ TANK– 90° 90° 90° DUALTX– TXIF Phase Detector VGA PA Driver and Charge Pump PHSOUT Φ BN IPEAK

Q Q

INR TXIF_LD

Variable Gain Amplifier (VGA) TXIF Frequency Synthesizer SSBSC Converter and TXIF Buffer I/Q Modulator and Power Amplifier (PA) Driver Figure 4. TRF3040 Modulator Functional Block Diagram

Evaluation and Demonstration of the TRF3040 Frequency Modulator/Synthesizer 5 TRF3040 Evaluation Board

TRF3040 I/Q Modulator/Synthesizer, EVM Rev. E Copyright: Texas Instruments Incorporated, 1998 Top Side Silkscreen

Figure 5. TRF3040 Evaluation Board Layout (Component Side)

6 SWRA014 TRF3040 Evaluation Board

TRF3040 I/Q Modulator/Synthesizer, EVM Rev. E Copyright: Texas Instruments Incorporated, 1998 Bottom Side Silkscreen

Figure 6. TRF3040 Evaluation Board Layout (Back Side)

Evaluation and Demonstration of the TRF3040 Frequency Modulator/Synthesizer 7 TRF3040 Evaluation Board

100kΩ R3

33kΩ Notes: R7 INA DNP = Do Not Place 120kΩ AUX_VCC PHA R23 PHI VCC OSC_VCC 10 + C104 C101 C97 R1 15µF .01µF 27pF VCC + 10 VCC C1 C2 C3 27pF .01µF 15µF VCC 10 R10 RCLK

P_VCC C4 J1 10 R5 R4 R6 + C8 9.1kΩ 4.7kΩ .01µ F C5 C50 L1 + 15µF C17 XTAL 15pF 15pF 2200nH MCLK 15µF CP_VCC C6 J2 R8 R9 C9 .01µF 9.1kΩ 4.7kΩ C18 .01µF C7 C71 L2 µ 15pF 15pF 2200nH .01 F C11 C12 D_VCC C10 R12 27pF VCC + C19 DNP DNP 10 27pF C13 C14 C15

48 47 46 45 44 43 42 41 40 39 38 37 R11 27pF .01µ F 15µF 1 36 PHP DNP 2 35 TXEN C16 3 34 RXLO DATA 4 33 CLOCK 5 32 LOCK 22pF 6 31 U1 STROBE 7 30 TXLO TRF3040 1– 8 29 J3 R13 9 28 10 27 R14 PHSOUT 0 11 26 C21 12 25 DNP 18kΩ TANK 1 J4 R15 13 14 15 16 17 18 19 20 21 22 23 24 RF_VCC TANK– R16 0 C22 PD_VCC VCC DNP + 0 Q R17 C23 C24 C25 J5 VCC 27pF .01 µF 15 µF R18 0 + C26 C27 C28 0 15µF .01µF 27pF C29 DNP J6 BALUN1 C30 DUALTX+ Q– J7 1 4 R19 L3 PA_VCC 2.2pF 12nH 0 C33 C31 R57 C32 5 DNP 1.8pF VCC C111 + 0 10pF 3.3pF L4 C34 C98 C99 µ µ C35 12nH 27pF .01 F 15 F 3 6 DUALTX–

SLT–090G 2.2pF

Figure 7. TRF3040 Evaluation Board Schematic (1 of 4)

8 SWRA014 TRF3040 Evaluation Board

M/CO__VCC R21 PHP Ω 3.9k R22 L10 R20 5.1kΩ 12nH C37 C38 1.5kΩ 1500pF 1500pF PHI C39 .022µF L11 C102 C36 12nH 470pF 5dB ATTENUATOR 27pF PAD MVCO C42 5 7 2X R43 R25 R26 VT 2X RXLO+ R24 C103 10Ω 18ΩΩ18 27pF 22pF 10 R42 R40 L12 L13 8 11X 430 Ω 430 Ω 4.7nH VVCO 1X 4.7nH R28 49.9 RTL402672 C49 + 3.9pF C51 C45 C46 C47 C107 3.9pF µ µ 100 F .01 F 27pF DNP TXLO (100µF) RXLO C55 J9 J8 R30 C48

18Ω DNP 22pF Main VCO 99dB ATTENUATOR PAD STRIPLINE R27 TXLO+ 62Ω R29 R31 R32 100Ω 100Ω 49.9Ω

PHSOUT R35 R36 R61 C56 C57 51 kΩ 360 Ω 10 MΩ 100 pF 330 pF R37 C58 1 kΩ 3300 pF C59 33 pF VCC TANK+ 1 R38 VC1:A 1 kΩ KV1470 NET00033 3 C60 L9 3 + VC1:B 3 pF 82 nH C61 C62 C63 KV1470 1 µF .01 µF 27 pF 2 C64 33 pF TANK– R39 1 kΩ

Tank Circuit C65 100 pF

Figure 7. TRF3040 Evaluation Board Schematic (2 of 4) (Continued)

Evaluation and Demonstration of the TRF3040 Frequency Modulator/Synthesizer 9 TRF3040 Evaluation Board

REF_IN

TCXO_V J10 CC R41 C66 TCXO 10 Ω .01 µF 3 4 XTAL OUT VCC C67 C68 + C69 27 pF .01 µF 1 µF 2 1 GND VCONT C70 TCO-980 0.1 µF ToyocomTM AUX_OUT

C77 .022 µF J11

R46 AVCO_VCC 18 Ω

R47 C78 R48 R49 AVCO Ω µ 10 .022 F 18 Ω 18 Ω 10 14 INA OUT VCC + R50 C79 C80 C81 µ 49.9 Ω 27 pF .01 F 1 µF 2 6 VT MOD C82 R51 R52 VCO190 Series 0.1 µF 1.5 kΩ 0 Ω Vari-L PHA C83 R53 C84 C85 1000 pF 6.2 kΩ 470 pF DNP

C86 Auxiliary VCO and Reference TCXO 0.015 pF

Figure 7. TRF3040 Evaluation Board Schematic (3 of 4) (Continued)

10 SWRA014 TRF3040 Evaluation Board

POWER OPTO_VCC 5 V MVCO_VCC OPTO_V _TP 5V_TP MVCO_V POWER VR1 CC VR2 VR5 CC 1 8 1 8 1 8 VI NC 1 VI NC 1 VI NC 1 2 7 2 7 2 7 + C87 VO VO VO VO VO VO 3 6 3.75 V 3 6 5 V 3 6 3.75 V 1 µF VO VO R55 VO VO R56 VO VO R58 GND 4 5 Setting 4 5 Setting 4 5 Setting ADJ NC 220 Ω ADJ NC 220 Ω ADJ NC 220 Ω 1 LM317LD + C88 LM317LD + C89 LM317LD + C94 1 µF 1 µF 1 µF W W W CCW CW CCW CW CCW CW Tie GNDs R59 R60 R63 together at 1 kΩ 1 kΩ 1 kΩ this point

TCXO_VCC AVCO_VCC TCXO_TP AVCO_VCC_TP VR6 VR3 VR4 VCC_TP 1 8 1 8 VI NC 1 VI NC 1 LM317MDT 2 7 2 7 1 VO VO VO VO 3 2 3 6 3 6 VIN VOUT VCC VO VO 3 V VO VO 5 V R64 R65 3.75 V 4 5 Setting 4 5 Setting ADJ NC 220 Ω ADJ NC 220 Ω ADJ R66 Setting Ω 1 220 LM317LD + C100 LM317LD + C90 + + C91 C92 1 µF 1 µF C109 µ µ W W 10 µF R79 1 F .01 F CCW CW CCW CW 51 Ω R80 R67 W + 1 kΩ 1 kΩ CCW CW C110 10 µF R68 500 Ω

5 V OPTO_VCC

R69 R70 R71 R72 1.8 kΩ 1.8 kΩ 1.8 kΩ 1.8 kΩ C93 0.1 µF CLOCK_TP1 DATA_TP1 TXEN_TP1 R73 R74 R75 R76 3.6 kΩ 3.6 kΩ 3.6 kΩ 3.6 kΩ TXEN DATA 2 CLOCK P1:B CLOCK 3 P1:C DATA STROBE_TP1 4 P1:D STROBE 5 STROBE P1:E TXEN 10 P1:J LD U3 5 1 U4 5 1 U5 5 1 U6 5 1 6 6 6 6 2 2 2 2 4N28S 4N28S 4N28S 4N28S 4 4 4 4 OPTO_VCC 18 P1:R 19 C95 LOCK_DETECT LD_TP1 P1:S 20 0.1 µF 5 V P1:T R77 21 2 kΩ P1:U C96 22 P1:V R78 0.1 µF U7 23 2.7 kΩ P1:W 24 5 P1:X 1 6 25 P1:Y 2 LOCK 4

MOC8030

Figure 7. TRF3040 Evaluation Board Schematic (PC Interface and Evaluation Board DC Supply Circuitry Only) (4 of 4) (Continued)

Evaluation and Demonstration of the TRF3040 Frequency Modulator/Synthesizer 11 TRF3040 Evaluation Board

Table 1. TRF3040 Evaluation Board Parts List

Size Manufacturer Designators Description Value Qty Manufacturer (mm) Part Number (P/N) C 1, 10, 13, 19, 23, 28, 34, 47, 63, Capacitor 27 pF 14 0603 Murata GRM39COG series 67,79, 97, 102, 103 C 2, 4, 6, 9, 14, 18, 24, 27,46, 62, 66, Capacitor 0.01 µF 16 0603 Murata GRM39COG series 68, 80, 92, 98, 101 C 3, 8, 15, 17, 25, 26, Tantalum capacitor 15 µF 8 6032–C Venkel TA010TCM series 99, 104 C 5, 7, 50, 71 capacitor 15 pF 4 0603 Murata GRM39COG series C 11, 12, 21, 22, 29, Capacitor DNP 9 31, 55, 85, 107 C 16, 42, 48 Capacitor 22 pF 3 0402 Murata GRM39COG series C 30, 35 Capacitor 2.2 pF 2 0603 Murata GRM39COG series C 32 Capacitor 1.8 pF 1 0603 Murata GRM39COG series C 33 Capacitor 10 pF 1 0603 Murata GRM39COG series C 36, 84 Capacitor 470 pF 2 0603 Murata GRM39COG series C 37, 38 Capacitor 1500 pF 2 0603 Murata GRM39COG series C 39, 77, 78 Capacitor 0.022 µF 3 0603 Murata GRM39COG series C 45 Tantalum capacitor 100 µF 1 6032-C Venkel TA010TCM series C 49, C51 Capacitor 3.9 pF 1 0603 Murata GRM39COG series C 55 Capacitor DNP 1 0402 C 56, 65 Capacitor 100 pF 2 0603 Murata GRM39COG series C 57 Capacitor 330 pF 1 0603 Murata GRM39COG series C 58 Capacitor 3300 pF 1 0603 Murata GRM39COG series C 59, 64 Capacitor 33 pF 2 0603 Murata GRM39COG series C 60 Capacitor 3 pF 1 0603 Panasonic ECU-V1 series C 61, 69, 81, 87, 88, Tantalum capacitor 1 µF 10 3216-A Venkel TA010TCM series 89, 90, 91, 94, 100 C 70, 82, 93, 95, 96 Capacitor 0.1 µF 5 0603 Murata GRM39COG series C 83 Capacitor 1000 pF 1 0603 Murata GRM39COG series C 86 Capacitor 0.015 µF 1 0603 Murata GRM39COG series C 109, 110 Tantalum capacitor 10 µF 2 3216-A Venkel TA010TCM series C 111 Capacitor 3.3 pF 1 0603 Murata GRM39COG series J 8 SMA-V 1 EFJohnson 142-0701-201 L 1, 2 Inductor 2200 nH 2 1008 Coilcraft 0603HS series L 3, 4, 10, 11 Inductor 12 nH 4 0603 Coilcraft 0603HS series L 12, 13 Inductor 4.7 nH 1 0603 Coilcraft 0603HS series L 9 Inductor 82 nH 1 0603 Coilcraft 0603HS series R 1, 5, 10, 12, 23, 24, Resistor 10 Ω 8 0603 Panasonic ERJ-3GSYJ series 41, 47 R 2 Resistor 100K 1 0603 Panasonic ERJ-3GSYJ series

12 SWRA014 TRF3040 Evaluation Board

Table 1. TRF3040 Evaluation Board Parts List (Continued)

Size Manufacturer Designators Description Value Qty Manufacturer (mm) Part Number (P/N) R 3 Resistor 33 kΩ 1 0603 Panasonic ERJ-3GSYJ series R 4, 8 Resistor 9.1 kΩ 2 0603 Panasonic ERJ-3GSYJ series R 6, 9 Resistor 4.7 kΩ 2 0603 Panasonic ERJ-3GSYJ series R 7 Resistor 120 kΩ 1 0603 Panasonic ERJ-3GSYJ series R 11 Resistor DNP 1 0603 Panasonic ERJ-3GSYJ series R 13, 15, 16, 17, 18, Resistor 0 8 0603 Panasonic ERJ-3GSYJ series 19, 52, 57 R 14 Resistor 18 kΩ 1 0603 Panasonic ERJ-3GSYJ series R 20, 51 Resistor 1.5 kΩ 2 0603 Panasonic ERJ-3GSYJ series R 21 Resistor 3.9 kΩ 1 0603 Panasonic ERJ-3GSYJ series R 22 Resistor 5.1 kΩ 1 0603 Panasonic ERJ-3GSYJ series R 25, 26, 30 Resistor 18 Ω 3 0402 Panasonic ERJ-2GEJ series R 27 Resistor 62 Ω 1 0402 Panasonic ERJ-2GEJ series R 28, 32 Resistor 49.9 Ω 2 0402 Panasonic ERJ-2GEJ series R 29, 31 Resistor 100 Ω 2 0402 Panasonic ERJ-2GEJ series R 40, 42 Resistor 430 Ω 2 0402 Panasonic ERJ-2GEJ series R 46, 48, 49 Resistor 18 Ω 3 0603 Panasonic ERJ-3GSYJ series R 50 Resistor 49.9 Ω 1 0603 Panasonic ERJ-3GSYJ series R 35, 79 Resistor 51 Ω 2 0603 Panasonic ERJ-3GSYJ series R 36 Resistor 360 Ω 1 0603 Panasonic ERJ-3GSYJ series R 37, 38, 39 Resistor 1 kΩ 3 0603 Panasonic ERJ-3GSYJ series R 43 Resistor 10 Ω 1 0402 Panasonic ERJ-2GEJ series R 53 Resistor 6.2 kΩ 1 0603 Panasonic ERJ-3GSYJ series R 55, 56, 58, 64, 65, Resistor 220 Ω 6 0603 Panasonic ERJ-3GSYJ series 66 R 59, 60, 63, 67, 80 Trimming potentiometer 1 kΩ 5 3313J Bourns 3313J-1-102E R 61 Resistor 10 MΩ 1 0805 Panasonic ERJ-3GSYJ series R 68 Trimming potentiometer 500 Ω 1 3313J Bourns 3313J-1-102E R 69, 70, 71, 72 Resistor 1.8 kΩ 4 0603 Panasonic ERJ-3GSYJ series R 73, 74, 75, 76 Resistor 3.6 kΩ 4 0603 Panasonic ERJ-3GSYJ series R 77 Resistor 2 kΩ 1 0603 Panasonic ERJ-3GSYJ series R 78 Resistor 2.7 kΩ 1 0603 Panasonic ERJ-3GSYJ series U 1 Integrated circuit 1 0603 Texas Instruments TRF3040 U 3, 4, 5, 6 Optocoupler 4 0603 Motorola 4N28S U 7 Optocoupler 1 0603 Motorola MOC8030 VC 1 Varactor 1 Toko KV1470 VR 1, 2, 3, 5, 6 Voltage regulator 5 Motorola LM317LD VR 4 Voltage regulator 1 Motorola LM317MDT BALUN 1 Transformer 4:1 1 Hitachi SLT-090G P 1 DB25M 1 AMP 747238-4 J 1, 2, 6, 9, 10, 11 SMA_H 7 EFJohnson 142-0701-831 J 3, 4, 5, 7 BNC-90 4 AMP 413631-1

Evaluation and Demonstration of the TRF3040 Frequency Modulator/Synthesizer 13 TRF3040 Evaluation Board

Table 1. TRF3040 Evaluation Board Parts List (Continued)

Size Manufacturer Designators Description Value Qty Manufacturer (mm) Part Number (P/N) MVCO Voltage-controlled oscillator 1 Panasonic RTL402672 AVCO Voltage-controlled oscillator 1 Vari–L VCO190 Series Temperature-compensated TCXO 1 Toyocom TCO-980 series Crystal oscillator CLOCK_TP1 DATA_TP1 LD_TP1 TXEN_TP1 STROBE_TP1 MVCO_TP Components OPTO_VCC_TP Test Probe Connector 13 TP-105-01 series Corporation +5V_TP AVCO_VCC_TP TXCO_TP VCC_TP POWER GND

2.1 External Power External power is connected to the evaluation board at the test points POWER and GND. TI recommends that you use a linear power supply set at 8.6 VDC for external power. 2.2 Voltage Regulators The on-board adjustable regulators provide independent, linear voltage regulation to the TRF3040 device, the main VCO, the auxiliary VCO, and the serial interface optocouplers. Tantalum capacitors are used to enhance ripple and noise rejection in the regulators. The voltage regulators are factory set as follows: VR1 (OPTO_VCC) = 3.75 VDC VR2 (+5 V) = 5.0 VDC VR3 (AVCO_VCC) = 5.0 VDC VR4 (VCC) = 3.75 VDC VR5 (MVCO_VCC) = 3.75 VDC VR6 (TCXO_VCC) = 3.0 VDC 2.3 Serial Interface A DB25M connector, P1, is provided for connection to a standard PC parallel port using a 25-pin conductor cable. The PC parallel port is used to emulate a synchronous serial data interface consisting of CLOCK, DATA, and STROBE. The LOCK signal is fed back to the PC parallel port to indicate synthesizer loop lock status of the TRF3040 board. The TXEN signal is controlled by the emulated microprocessor signal from the PC parallel port. The three serial interface signals, the LOCK signal, and the TXEN signal are all opto-isolated from the PC parallel port. In this manner, the TRF3040 device may be operated at a supply voltage that is different from the standard 5-VDC voltage level of the PC parallel port.

14 SWRA014 TRF3040 Evaluation Board

The serial interface signals are routed to the P1 connector as follows: CLOCK: P1–2 DATA: P1–3 STROBE: P1–4 LOCK: P1–10 TXEN: P1–5

2.4 External Reference A temperature-compensated crystal oscillator (TCXO) is factory installed on the TRF3040 evaluation board. Alternately, an external signal generator can be used to provide the reference signal (XTAL+) via the SMA connector J10 (TCXO_OUT). Typically, a low-phase noise, stable, synthesized signal generator such as an HP8665 or similar device should be used as an external reference. For typical Advanced Mobile Phone Service (AMPS)/Digital Advanced Mobile

Phone Service (DAMPS) applications, a 19.44-MHz signal at –6 dBm is suitable.

Evaluation and Demonstration of the TRF3040 Frequency Modulator/Synthesizer 15 TRF3040 Evaluation Board Engineering Notes

3 TRF3040 Evaluation Board Engineering Notes The TRF3040 evaluation board is designed for a single-band/dual-mode system, as suggested in Figure 8; however, it is possible to use the TRF3040 board in a dual-band system with an external high-band converter in the transmitter path. Figure 9 outlines a dual-band system architecture block diagram using the TRF3040 modulator/synthesizer with the TRF1500 dual-band receiver and the TRF700X/TRF761X power amplifier (PA) families from Texas Instruments Incorporated.

RXLO_OUT TXLO_OUT AUX_OUT (1958 – 2102) MHz (979 – 1051) MHz (100 – 114) MHz TXIF_VCO (979 – 1051) MHz LC TANK (155.52 MHz) (1958 – 2102) MHz

TXIF_ PLL 2X 1X Loop Filter Panasonic P/N Dual-Band VCO *** NOTE 1 RTL402672 Vt

TXLO RXLO INA PHSOUT TANK +/– Auxiliary Main PLL PHP/PHI VCO AUX_ PLL TRF3040 Loop Filter Vt Loop Filter PHA Frequency Modulator REF_IN and Synthesizer XTAL+ TCXO Differential I/Q 19.44 MHz RCLK DUALTX +/– MCLK

TRF3040 EVM Differential to Single-Ended BLOCK DIAGRAM Serial Data NOTE 1: DATA/STROBE/CLOCK/TXEN/LOCK DETECT May require an appropriate bandpass filter to (to 25-pin connector) DUALTX_OUT enhance the attenuation of the fundamental signal (824 – 896) MHz at the doubled output of the VCO.

Figure 8. Single-Band System Using the TRF3040 Device

16 SWRA014 TRF3040 Evaluation Board Engineering Notes

TRF1500 Second IF Mixer Dual Band Receiver and Selector

High Band IF± High Band LNA In High Band RX Second IF, 110MHz 1930–1990 MHz 455 kHz Dual Band Low Band LNA In Low Band RX (to demodulator) Low Band IF± Duplexer Antenna Low Band LNA Out 869–894 MHz 110MHz Mix In Low Band Selector Low Band LO In Control Input

X2 ± ± ± Doubler Tank High Band LO High Band LO In Low Band LO

TXIF_VCO Filtering Circuit and LC TANK DC Biasing Low Band TXMHz 824–849 High Band TXMHz 1850–1910 979–004 MHz 2004–2100 MHz 110 MHz±455 kHz INA PHSOUT TANK± TXLO RXLO Auxiliary Main VCO Vt RF VCO PHA TRF3040 PHP/PHI Out Vt Frequency Synthesizer 979–1050 MHz and

Differential I/Q Modulator DUALTX± TRF76XX TRF700X Matching High Band TX and Splitter

Serial Data DATA/STROBE/CLOCK/TXEN/LOCK DETECT Low Band TX

Selector Control Input PA VCC

Dual Band TX High Band Converter/Power Amplifiers/Selector Figure 9. Dual-Band System Using the TRF3040 Device 3.1 TRF3040 Frequency Synthesizer The TRF3040 frequency synthesizer consists of a 2.2-GHz main synthesizer and a 200-MHz auxiliary synthesizer. The main synthesizer incorporates a dual-mode 32/33 and 64/65 prescaler for integer-N and/or fractional-N operation. Fractional spur suppression is optimized through the programmable compensation. 3.1.1 Voltage-Control Oscillator (VCO) Because the TRF3040 frequency synthesizer operates up to 2.16-GHz, TI recommends that you select or design a stable and low-phase noise VCO for a high-performance phase-locked loop (PLL). 3.1.2 Synthesizer Input RXLO+/– The synthesizer input RXLO+/– can use a differential or a single-ended input. For simplicity, TI recommends a nominal –17 dBm at the RXLO+ port for single-ended configuration.

Evaluation and Demonstration of the TRF3040 Frequency Modulator/Synthesizer 17 TRF3040 Evaluation Board Engineering Notes

3.1.3 Loop Filters This section details the main and auxiliary loop filter design equations for the TRF3040 device. 3.1.3.1 Main Loop Filter Design Fractional spurs, phase noise, and lock time are some of the many concerns of the PLL performance. These concerns depend not only on the phase detector and the VCO characteristics, but on the loop filter performance as well. Figure 10 describes the main loop filter configuration used on the TRF3040 evaluation board.

PHP R3 R4 Vt (from TRF3040) (to VCO tuning voltage) C1 R2 C3 C4

Figure 10. Main Loop Filter Configuration Used on the TRF3040 Board The component values for the main loop filter are calculated based on the formulas derived by Wing S. Djen [2], as follows: Requirements and Conditions: fVCO = 2051 to 2101 MHz VCO operating frequency fCH = 30 kHz channel spacing fREF = 240 kHz reference frequency KVCO = 80 MHz/V VCO gain KPD = 550 µA/2π radian phase detector gain Frequency error after settling ≤ 1 kHz Lock time (tsw) ≈ 1 ms for a transition of 50 MHz Calculations: The divide ratio is calculated as: + B (1) N fVCO fREF + (2051 to 2101) MHz B 240 kHz + (8545 to 8758) Let N = 8758 because transitioning from the high end to the low end of the band requires more time than transitioning from the low end to the high end of the band. The final frequency resolution after settling is calculated as:

d + Frequency error after settling B Transition step (2)

+ 1e3 B 50e6 + 20e*6

18 SWRA014 TRF3040 Evaluation Board Engineering Notes

Choosing the damping factor, ξ, to be 0.707, the natural frequency is: ù + d × c B c × (3) N –In( ) ( tsw) + –Inǒ20e*6 × 0.707Ǔ B ǒ0.707 × 1e*3Ǔ + 15.794e)3

NOTE: The damping factor of the loop, ξ, is not exactly 0.707; therefore, some empirical tuning may be required to avoid under-damped or over-damped situations.

The capacitor C2 is calculated as: + ǒ × Ǔ B ǒ × ù2 Ǔ (4) C2 KPD KVCO N N 2 + ǒ550e)6 × 80e)6Ǔ B ǒ8758 × ǒ15.794e)3Ǔ Ǔ + 20.14e*9 F

And the resistor R2 is calculated as: + × c × ǒ B ǒ × × ǓǓ (5) R2 2 SQRT N KPD KVCO C2 + 2 × 0.707 × SQRTǒ8758 B ǒ550e*6 × 80e)6 × 20.14e*9ǓǓ

+ 4.45 kW When C1 ≤ 1/10 × C2; therefore: v (6) C1 2000 pF For further attenuating the spur at fVCO ± fCH and fVCO ± fREF, the values of C3, R3, C4, and R4 are calculated with resonant frequencies at least five times greater than the natural frequency, ωN, in order to avoid interaction between poles that would cause oscillation. Choosing R3 = 3.9 kΩ, the value of C3 is calculated as: ù + B ǒ × Ǔ (7) 30K 1 R3 C3 + B ǒ × p × e)3 × e)3Ǔ + C3 1 2 30 3.9 1360 pF Similarly, choosing R4 = 1.5 kΩ, the value of C4 is calculated as: ù + B ǒ × p × e)3 × e)3Ǔ + (8) 240K 1 2 240 1.5 442 pF Because most calculated values are not available as standard values, the closest value is selected. Finalized component values for the main loop filter are summarized in Table 2. Table 2. Main Loop Filter Component Values

Reference Loop Filter Component Value Designator (Lock Time ≈ 1 ms) C1 1500 pF C2 0.022 µF C3 1500 pF C4 470 pF R2 5.1 kΩ R3 3.9 kΩ R4 1.5 kΩ

Evaluation and Demonstration of the TRF3040 Frequency Modulator/Synthesizer 19 TRF3040 Evaluation Board Engineering Notes

3.1.3.2 Auxiliary Loop Filter Design Similar to the main loop filter, the auxiliary loop filter is defined as follows: Assumptions: The auxiliary PLL uses the Vari-L VCO190-150 with KVCO = 7.8 MHz/V. The phase-detector gain, KPD, is set to 250 mA/2π radians. The operating frequency, fVCO, is 108 MHz. The reference frequency, fREF, is 240 kHz. The frequency error after settling is ≤ 1 kHz. The lock time, tsw, is 1 ms for a transition of 50 MHz. All reference designators are illustrated in Figure 7, the TRF3040 EVM schematic. Calculations: The divide ratio is calculated as follows: + B (9) N fVCO fREF + 108 MHz B 240 kHz + 450 The final frequency resolution after settling is: d + Frequency error after settling B Transition step (10)

+ 1e)3 B 50e)6 + 20e*6 Choose the damping factor, ξ, to be 0.707. The natural frequency is: ù + d × c B c × (11) N –In( ) ( tsw) + –Inǒ20e*6 × 0.707Ǔ B ǒ0.707 × 1e*3Ǔ

+ 15.794e)3 The capacitor C86 is calculated as: + ǒ × Ǔ B ǒ × ù2 Ǔ (12) C86 KPD KVCO N N

2 + ǒ250e*6 × 7.8e)6Ǔ B ǒ450 × ǒ15.794e)3Ǔ Ǔ

+ 17.37 nF And the resistor R53 is calculated as: + × c × ǒ B ǒ × × ǓǓ (13) R53 2 SQRT N KPD KVCO C86

+ 2 × 0.707 × SQRTǒ450 B ǒ250e*6 × 7.8e)6 × 17.37e*9ǓǓ

+ 5.15e)3W

When C83 ≤ 1/10 × C86; therefore: v (14) C83 1737 pF

20 SWRA014 TRF3040 Evaluation Board Engineering Notes

For further attenuating the spur at fVCO ± fREF, the values of C84 and R51 are calculated with the resonant frequencies at least 10 times greater than the natural frequency ωN. For example, R51 = 1.5 kΩ. The value of C84 is calculated as: ù + B × (15) 240K 1 R51 C84 + B ǒ × p × e)3 × e)3Ǔ + C84 1 2 240 1.5 442 pF Because most calculated values are not the ones available by the standard, the closest value is selected. Table 3 summarizes the values used on the TRF3040 evaluation board. Table 3. Auxiliary Loop Filter Component Values

Reference Loop Filter Component Value Designator C83 1000 pF C86 0.015 µF C84 470 pF R53 6.2 kΩ R51 1.5 kΩ

3.1.4 Fractional Compensation and Charge Pump Current Setting Assuming that a main PHP charge pump current of 288 µA and a current setting factor, CN, of 128 are desired, the value of the charge pump setting resistor is calculated as follows (the 3040 evaluation board RN resistor is 33 kΩ):

RN(kW) + ǒ18.75 × 128 × 1 Ǔ–0.75 + 32.55 kW (16) 256 I(mA)

Depending on the operating frequency bandwidth, the fundamental fractional-N pulse-width and the magnitude of the fundamental compensation charge pump current can be calculated. With a desired charge pump current of 288 µA, the fractional compensation charge pump current setting resistor, RF, of 120 kΩ is selected (see the TRF3040 Modulator/Synthesizer data sheet, literature number SLWS057).

3.2 TRF3040 Modulator The transmitter modulator generates a modulated RF signal in the 900-MHz range at a maximum power level of 9 dBm, which can be controlled over a 50-dB range. The single sideband suppressed carrier (SSBSC) converter and I/Q modulator are designed with highly linear mixers to implement modulation schemes that meet spectral purity requirements of AMPS and DAMPS cellular systems. The TXLO frequency is controlled by the main synthesizer, and the transmit intermediate frequency (TXIF) synthesizer provides the TXIF signal needed to translate the TXLO to the proper RF carrier signal. The I/Q modulator modulates the I/Q baseband signal and feeds it to the variable gain amplifier (VGA) and power amplifier (PA) driver.

Evaluation and Demonstration of the TRF3040 Frequency Modulator/Synthesizer 21 TRF3040 Evaluation Board Engineering Notes

3.2.1 Transmit IF VCO (TXIF_VCO) The TXIF_VCO generates a signal in the 150-MHz range, which is used by the SSBSC converter to produce the carrier. To synthesize the TXIF_VCO signal, a simple varactor-controlled LC tank circuit is realized in conjunction with the on-chip ÷6/7/8/9 prescaler and phase detector to complete the synthesizer function. Figure 11 suggests a possible implementation.

C2 Loop Filter PHSOUT R1 33 pF Pin12 1 kΩ Tank+ VR1 KV1470 R L1 C1 TRF3040 in V 1 kΩ 82 nH 3.0 pF CC VR2 R3 KH1470 1 kΩ Pin12 Tank– R2 C3 1 kΩ 33 pF Figure 11. Typical Varactor-Controlled LC Tank Configuration The tank resonant frequency is defined by the following formula: + 1 + fresonance Ǹ 168.7 MHz (17) 2p L1C1 Where: *1 + ) ƪ 1 ) 1 ) 1 ) 1 ƫ + C C1 ,CVR Varactor capacitance C2 C3 CVR1 CVR2 On the EVM board, the TXIF synthesizer operates with a 19.44-MHz reference frequency in a divide-by-8 prescaler mode. This operation yields a frequency of 155.52 MHz. The calculated tank resonant frequency is: + + (18) CVR1 CVR2 60 pF (at 2.5 V measured on the EVM board) –1 C + 3.0 pF ) ƪ 1 ) 1 ) 1 ) 1 ƫ + 10.68 pF (19) 33 pF 33 pF 30 pF 30 pF

L + 82 nH (20) + 1 + fresonance Ǹ 168.7 MHz (21) 2p L1C1 The oscillator frequency tuning range is approximately 42 MHz and is controlled by the varactor capacitance change when adjusted from 0 V to 3.75 V, as shown in Table 4. Table 4. Oscillator Frequency Tuning Range

Varactor VR Varactor Capacitance TXIF Calculated TXIF Measured (V) (pF) (MHz) (MHz) 0 120 139 130.52 2.50 30 169 155.52 3.75 23 178 173.80

22 SWRA014 TRF3040 Evaluation Board Engineering Notes

The difference in frequency between the calculated and measured resonant frequency is attributed to the actual varactor capacitance, component tolerance, and board layout. High quality factor (Q) components are required because they affect the impedance seen by the TRF3040 modulator/synthesizer. The Q of inductor L1, the capacitors, and the varactors is critical because the selection of these components affects the attenuation that the tank circuit provides as it is loaded by the TRF3040 1-kΩ differential input impedance. An increase in attenuation reduces the tank resonant signal level and, if not designed properly, degrades the oscillator start-up properties. An example of a loaded tank circuit is shown in Figure 12. The inductor and varactor have the lowest Q and therefore control the attenuation level.

TRF3040 Rin 1 RLp RCp k Ω

Figure 12. Example of a Loaded Tank Circuit

RLp and RCp are the equivalent parallel resistance of the inductor and the combined capacitance of the fixed capacitor and varactors for the condition when the tank is at resonance. The equivalent parallel resistance is defined as follows: § + (22) If Q 10, then Rp Q2RS Where: Rp = Equivalent parallel resistance of the device at the resonant frequency Q = Q of the device Rs = Device series resistance = Reactance/Q Rparallel = Parallel resistance of RLp and RCp R + ƪ parallel ƫ (23) Attenuation, dB 20 log ) Rin Rparallel

As the component’s Q decreases, Rp decreases and the attenuation increases. This effect reduces the tank oscillator signal which could affect the start-up. On the TRF3040 EVM board, the parameters of the tank circuit components are shown in the following equations:

X p e)6 e*9 R + L + 2 155 82 + 2.282 W (24) S Q 35 + 2 + 2 + W (25) Rp Q RS 35 2.28 2795.08

Evaluation and Demonstration of the TRF3040 Frequency Modulator/Synthesizer 23 TRF3040 Evaluation Board Engineering Notes

X Q + C + 1 + 34.227 (26) p e)6 e*12 RS 2 155 60 35 + 2 + 2 + W (27) Rp Q RS 34.2 0.5 585.74 X R + C + 1 + 0.744 W (28) S Q 2p 155e)6 3e*12 460 + 2 + 2 + W (29) Rp Q RS 460 0.74 157.443 k X R + C + 1 + 0.031 W (30) S Q 2p 155e)6 33e*12 1000 + 2 + 2 + W (31) Rp Q RS 460 0.74 31 k

RL + ƪ p ƫ + ƪ 2795 ƫ + Attenuation, dB 20 log ) 20 log ) 2.6 dB (32) RLp Rin 2795 1000 The combined equivalent parallel resistance for the series capacitors and the varactors is much greater than the equivalent resistance for the shunt inductor. This analysis concludes that the total amount of attenuation is dependent upon the inductor’s Q since Rin for the TRF3040 is fixed at 1 kΩ differential. The tank circuit in the TRF3040 EVM board is designed with high Q components to ensure reliable operation of the TXIF oscillator. 3.2.2 Single Sideband Suppressed Carrier Converter A 900-MHz to 1100-MHz TXLO signal is mixed with the TXIF_VCO signal at the SSBCS converter. Here, the lower sideband is generated to be the carrier, while the TXLO and the upper sideband are suppressed by an on-chip bandpass filter, as shown in the following equation: Carrier + TXLO–TXIF_VCO (33)

3.2.3 I/Q Modulator The carrier signal generated at the SSBSC converter is modulated with the baseband I/Q signals. Any type of complex modulation signal is therefore possible. The I/Q signals should have a common mode voltage of approximately VDDA/2. 3.2.4 Variable Gain Amplifier and the Power Amplifier Driver The output of the I/Q modulator is fed to the DUALTX VGA and PA driver, which have a maximum power out of 9 dBm and a 50-dB dynamic range. There are 7 bits corresponding to 128 states. State 0 corresponds to maximum RF power, and state 127 corresponds to minimum power.

24 SWRA014 TRF3040 Evaluation Board Engineering Notes

The DUALTX+/– outputs of the PA driver are configured as 200 Ω differential. For testing purposes, the DUALTX+/– outputs can be converted into a 50-Ω single-ended output with a 4:1 BALUN and the matching network, as shown in Figure 13.

DUALTX+ C3 4:1 BALUN DUALTX_OUT

C5 VCC L1 C6

C1 C2 T1

DUALTX– C4 Figure 13. Typical Differential-to-Single-Ended Configuration

Evaluation and Demonstration of the TRF3040 Frequency Modulator/Synthesizer 25 Typical Performance

4 Typical Performance Figure 14 illustrates the typical test setup for the TRF3040 device.

Spectrum Analyzer dc Power Supply From TRF3040 EVM + To Spectrum Analyzer –

RCLK MCLK TCXO_OUT

POWER AUX_OUT To Spectrum Analyzer GND Serial PC AVCO Interface Parallel Port

RXLO_OUT TCXO To Spectrum Analyzer

MVCO TRF3040 I TXLO_OUT To Spectrum Analyzer I

TRF3040 EVM QQ

DUALTX_OUT Differential I/Q Generator To Spectrum Analyzer

Figure 14. Typical Test Setup for the TRF3040 Evaluation Board

4.1 Settings The following settings are recommended to demonstrate the capabilities of the TRF3040 device: Serial interface signals: TTL level I/Q signals: common mode voltage = 1.70 V; amplitude = 0.90 Vp-p Dual-band VCO: 2 GHz, Pout = –7 dBm typical 1 GHz, Pout = –3 dBm typical Auxiliary VCO: 200 MHz, 0.2 VPP maximum TXCO: 19.44 MHz These tests are performed at room temperature. VCC = VCCP = VDD = VDDA = 3.75 V The main and auxiliary synthesizer capabilities are limited by the operation of available VCOs. The main VCO frequency range is 1958 MHz to 2102 MHz, and the auxiliary VCO range is 100 MHz to 200 MHz. Due to the tuning range of the TRF3040 device, which is limited by the VCC, the maximum frequency is approximately 114 MHz.

26 SWRA014 Typical Performance

4.2 Performance Graphs Performance graphs are provided in this section with regard to: • Main synthesizer – Spur suppression – Lock time • Modulator measurements – Output level – Carrier and sideband suppression – Output driver linearity Spur suppression for the main fractional synthesizer is shown in Figure 15 through Figure 21.

1/8 Channel

CN = 117

Freq = 1981.47 MHz

15 kHz spur = 50 dBc 30 kHz spur = 67 dBc 60 kHz spur = 73 dBc 120 kHz spur = 79 dBc

Figure 15. Spur Suppression on 1/8 Channel

Evaluation and Demonstration of the TRF3040 Frequency Modulator/Synthesizer 27 Typical Performance

2/8 Channel

CN = 117

Freq = 1981.50 MHz

30 kHz spur = 61 dBc 60 kHz spur = 73 dBc

Figure 16. Spur Suppression on 2/8 Channel

3/8 Channel

CN = 117

Freq = 1981.53 MHz

30 kHz spur = 66 dBc 45 kHz spur = 68 dBc 60 kHz spur = 73 dBc 120 kHz spur = 79 dBc

Figure 17. Spur Suppression on 3/8 Channel

28 SWRA014 Typical Performance

4/8 Channel

CN = 117

Freq = 1981.56 MHz

60 kHz spur = 72 dBc 120 kHz spur = 79 dBc

Figure 18. Spur Suppression on 4/8 Channel

5/8 Channel

CN = 117

Freq = 1981.59 MHz

30 kHz spur = 66 dBc 60 kHz spur = 71 dBc 120 kHz spur = 80 dBc

Figure 19. Spur Suppression on 5/8 Channel

Evaluation and Demonstration of the TRF3040 Frequency Modulator/Synthesizer 29 Typical Performance

6/8 Channel

CN = 124

Freq = 1981.62 MHz

60 kHz spur = 74 dBc 120 kHz spur = 80 dBc

Figure 20. Spur Suppression on 6/8 Channel

7/8 Channel

CN = 117

Freq = 1981.65 MHz

30 kHz spur = 64 dBc 60 kHz spur = 72 dBc 120 kHz spur = 80 dBc

Figure 21. Spur Suppression on 7/8 Channel

30 SWRA014 Typical Performance

Figure 22 illustrates lock time.

Frequency step of 142.11 MHz from 2100.51 MHz to 1981.4 MHz

KPD = 288 µA/2π

Note: Faster lock times can be achieved by increasing the KPD to 550 µA/2π as indicated in Section 3.1.3.1.

Figure 22. Lock Time

Figure 23 through Figure 28 illustrate modulator performance.

Low band

1958.40 MHz Cable loss = 0.7 dB

POUT = 8.0 dBm@PC = 5 Carrier suppression = 43 dBc Sideband suppression = 38 dBc

Figure 23. Low-Band Carrier/Sideband Suppression

Evaluation and Demonstration of the TRF3040 Frequency Modulator/Synthesizer 31 Typical Performance

Low band

1958.40 MHz Cable loss = 0.7 dB

Linearity = 39 dBc

Figure 24. Low-Band PA Driver Linearity

Mid band

1981.44 MHz Cable loss = 0.7 dB

POUT = 7.95 dBm@PC = 6 Carrier suppression= 41 dBc Sideband suppression= 39 dBc

Figure 25. Mid-Band Carrier/Sideband Suppression

32 SWRA014 Typical Performance

Mid band

1981.44 MHz Cable loss = 0.7 dB

POUT = 7.95 dBm@PC = 6 Linearity = 38 dBc

Figure 26. Mid-Band PA Driver Linearity

High band

2100.51 MHz Cable loss = 0.7 dB

POUT = 7.9 dBm@PC = 4 Carrier suppression = 41 dBc Sideband suppression = 42 dBc

Figure 27. High-Band Carrier/Sideband Suppression

Evaluation and Demonstration of the TRF3040 Frequency Modulator/Synthesizer 33 Typical Performance

High band

2100.51 MHz Cable loss = 0.7 dB

POUT = 7.9 dBm@PC = 4 Linearity = 35.7 dBc

Figure 28. High-Band PA Driver Linearity

34 SWRA014 Software Driver

5 Software Driver A DOS-based software driver is supplied with the evaluation board. The software is intended for use in an MS-DOS environment. No special memory is required to use the software. Two files are contained on the provided disk: TRF3040.EXE and INIT.CFG. Both of these files should be placed in the same directory on a fixed disk, or the program may be executed from the disk provided. To execute the program from the disk provided, type the following: A:\TRF3040 ↵ (Enter) The program executes from the TRF3040.EXE file. The INIT.CFG file is read by the program to set up the program parameters. The INIT.CFG file may be changed to suit your needs; see the F9 Save File description in Table 5. 5.1 Program Screen The program screen is divided into five main sections: • Main Loop The Main Loop section displays all of the pertinent parameters concerning the main synthesizer. • Auxiliary Loop The Auxiliary Loop section displays all of the pertinent parameters concerning the auxiliary synthesizer. • Modulator The Modulator section displays all of the pertinent parameters concerning the modulator. • Device The Device section displays all of the pertinent parameters concerning the device enables, modes, and reference frequency. • Editing The bottom two lines of the display suggest appropriate keys to use or actions to take based on the user inputs. 5.1.1 Main Loop Section The Main Loop section displays the current main synthesizer loop parameters. All parameters displayed in the Main Loop section can be modified except for Phase Detector Freq and Channel Spacing, which are informative only. These two parameters are calculated from the reference frequency (Reference Freq) and reference counter (Reference Count NR) parameters in the Device section and the fractional modulus (Frctnl Modulus FMOD) parameter in the Main Loop section. 5.1.1.1 Main VCO Frequency The Main VCO Frequency parameter is not actually a TRF3040 device parameter, but it may be used to cause the program to automatically find a solution, if possible, for N (ENHANCED mode only), NM1–NM3 (STANDARD mode only), and NF based on the entered Main VCO Frequency parameter and others. Enter the correct reference frequency (Reference Freq), reference count (NR), and fractional modulus (FMOD) parameters before you use the Main VCO Frequency parameter to calculate a channel solution.

Evaluation and Demonstration of the TRF3040 Frequency Modulator/Synthesizer 35 Software Driver

5.1.1.2 Prescaler (PR) The PR field selects the desired main synthesizer prescaler configuration when the device is operated in STANDARD mode. The choices are: PR = 1 64/65 modulus prescaler PR = 2 64/65/72 modulus prescaler When the device is operated in ENHANCED mode, the PR field is not programmable, and the prescaler is configured as a 32/33 modulus prescaler. 5.1.1.3 Fractional Numerator (Frctnl Numerator NF) The NF field selects the numerator value for the fractional accumulator circuit of the main synthesizer. This value can be manually programmed to any valid desired value. NF is also automatically updated when the Main VCO Frequency field is used to enter the desired main synthesizer channel frequency or when the FMOD field is changed. 5.1.1.4 Fractional Modulus (Frctnl Modulus FMOD) The FMOD field selects the desired main synthesizer fractional accumulator denominator modulo value. The valid choices based on the operation mode of the TRF3040 device are as follows: FMOD = 0 Modulo–5 STANDARD mode FMOD = 1 Modulo–8 STANDARD mode FMOD = 1–16 Modulo–1–16 ENHANCED mode When the FMOD field is changed, the routine to calculate the proper main synthesizer channel coefficients is called. 5.1.1.5 Main Charge Pump Current (Main Chrgpmp I CN) The CN field selects the main synthesizer charge pump current gain coefficient. 5.1.1.6 Reference Select RSM (Main Ref Select RSM) The RSM field selects the main synthesizer reference postscaler select as follows: RSM = 0 ReferenceB1 RSM = 1 ReferenceB2 RSM = 2 ReferenceB4 RSM = 3 ReferenceB8 5.1.1.7 NM1-3 (STANDARD Mode) The NM1-3 fields can be programmed manually to any valid number. These fields are also automatically updated when the Main VCO Frequency field is used to enter the desired main synthesizer channel frequency or when the FMOD field is changed. 5.1.1.8 N (ENHANCED Mode) The N field can be programmed manually to any valid number. This field is also automatically updated when the Main VCO Frequency field is used to enter the desired main synthesizer channel frequency or when the FMOD field is changed.

36 SWRA014 Software Driver

5.1.1.9 Proportional Charge Pump Current (Prprtnl Chrgpmp I CL) The CL field selects the main synthesizer speed-up mode, proportional charge pump current gain coefficient. 5.1.1.10 Integral Charge Pump Current (Intgrl Chrgpmp I CK) The CK field selects the main synthesizer speed-up mode, integral charge pump current gain coefficient. 5.1.1.11 Charge Pump Polarity (CHRGPMP PLRTY MCP) (ENHANCED Mode) The MCP field selects the main synthesizer charge pump current polarity in ENHANCED mode as follows: MCP = 0 Positive polarity MCP = 1 Negative polarity 5.1.1.12 Strobe Pulse Width (Strobe PWth) (STANDARD Mode) The Strobe PWth field may be used to vary the pulse width of the serial interface STROBE signal. This feature is used to regulate speed-up mode when the device is operating in STANDARD mode. A value of approximately 7500–9500 for the strobe pulse width provides for a 600-µs STROBE pulse width, which varies according to the microprocessor speed of the PC executing the program. 5.1.1.13 Speed-up Time G (ENHANCED Mode) The G field selects the duration of speed-up mode when the device is in ENHANCED mode. The duration of speed-up mode is determined as follows:

Duration + G 16 (34) Reference frequency where reference frequency is typically 240 kHZ. 5.1.2 Auxiliary Loop Section The Auxiliary Loop section displays the current auxiliary loop parameters. All parameters displayed in the Auxiliary Loop section can be modified except Phase Detector Freq. This parameter is calculated from the reference frequency (Reference Freq) and reference counter (Reference Count NR) parameters in the Device section. 5.1.2.1 Auxiliary VCO Frequency The Auxiliary VCO Frequency parameter is not actually a TRF3040 device parameter, but it may be used to cause the program to automatically find a solution, if possible, for NA based on the entered Aux VCO Frequency parameter and others. Enter the correct reference frequency (Reference Freq) and reference count (NR) before you use the Aux VCO Frequency parameter to calculate a channel solution.

Evaluation and Demonstration of the TRF3040 Frequency Modulator/Synthesizer 37 Software Driver

5.1.2.2 Reference Select (Aux Ref Select RSA) The RSA field selects the reference postscaler for the auxiliary synthesizer as follows: RSA = 0 ReferenceB1 RSA = 1 ReferenceB2 RSA = 2 ReferenceB4 RSA = 3 ReferenceB8 5.1.2.3 Auxiliary Divider Ratio (Count NA) The NA field selects the auxiliary synthesizer divider ratio. It consists of a 13-bit NA field counter. The total NA division is 0 to 8191. 5.1.2.4 Charge Pump Polarity (Chrgpmp Plrty ACP) (ENHANCED Mode) The ACP field selects the auxiliary synthesizer charge pump current polarity when the device is in ENHANCED mode as follows: ACP = 0 Positive polarity ACP = 1 Negative polarity 5.1.3 Modulator Section The Modulator section displays the current modulator parameters. You can modify all parameters displayed in the Modulator section except Transmit Mode (TM). 5.1.3.1 VGA Power Control (Pwr Control PC) The PC field selects the variable gain amplifier setting. The maximum power is set to 0, and the minimum power is set to 127. 5.1.3.2 Transmit Mode (TM) This parameter is not available with the TRF3040 device and should be set to 0. 5.1.3.3 Sleep Mode (SM) The SM field enables/disables the synthesizer section and the modulator section as follows: SM = 0 Disable sleep mode. SM = 1 Enable sleep mode. 5.1.3.4 Digital/Analog Mode (Dig/Ana MODE) The MODE field defines the modulator operating modes. MODE = 0 Analog (AMPS) MODE = 1 Digital (DAMPS)

38 SWRA014 Software Driver

5.1.3.5 TXIF Divide-by-Divider (Offset VCO/N) The N field selects the divider ratio of the transmit intermediate frequency (TXIF) synthesizer. This parameter is defined as the following: N = 0 Divide-by-6 N = 1 Divide-by-7 N = 2 Divide-by-8 N = 3 Divide-by-9 5.1.3.6 TXIF Synthesizer Enable (Synth Enbl SE) The SE field enables/disables the TXIF synthesizer as follows: SE = 0 Disable TXIF synthesizer. SE = 1 Enable TXIF synthesizer. 5.1.3.7 Transmit Enable (Transmit Enbl TE) The TE field enables/disables the modulator output as follows: TE = 0 Modulator output is OFF. TE = 1 Modulator output is ON. This parameter defines the TXEN signal. It is a static control switch rather than a data bit. It does not require sending data action to activate its functionality. 5.1.4 Device Section The Device section displays the current device parameters. You can modify all parameters displayed in the Device section except Synthesizer Status, which is a read-back from the LOCK terminal on the TRF3040 device. 5.1.4.1 Main Divider Enable (EM) The EM field enables/disables the main synthesizer as follows: EM = 0 Disable main synthesizer. EM = 1 Enable main synthesizer. 5.1.4.2 Auxiliary Divider Enable (EA) The EA field enables/disables the auxiliary synthesizer as follows: EA = 0 Disable auxiliary synthesizer. EA = 1 Enable auxiliary synthesizer. 5.1.4.3 Device Mode ALT The Device Mode parameter selects the fundamental operating mode of the TRF3040 device. Additional features are available in the Enhanced Performance Mode (ENHANCED). Note the changes in the Main Loop section when you change device modes. ALT = 0 STANDARD mode ALT = 1 ENHANCED mode 5.1.4.4 Device Test T The Device Test T field is reserved for TI internal use and should remain set to zero. When this field is set to zero, the LOCK terminal operates normally. Otherwise, the LOCK terminal is connected to internal nodes in the TRF3040 device.

Evaluation and Demonstration of the TRF3040 Frequency Modulator/Synthesizer 39 Software Driver

5.1.4.5 Reference Frequency (Reference Freq) Enter the external reference frequency used with the evaluation board in this field so that other parameters, such as the phase detector reference frequency and channel spacing, can be properly calculated and displayed. 5.1.4.6 Reference Count NR The NR field selects the division ratio of the reference frequency counter. 5.1.4.7 A-Word Mode Long The Long field selects between two A-word bit-length programming schemes as follows: Long = 0 A-word = 24 bits Long = 1 A-word = 32 bits; not available with the TRF3040 5.1.4.8 Synthesizer Status Synthesizer Status is a read-back only field that reflects the current status of the LOCK terminal. 5.1.5 Editing Section To edit any one of the program parameters displayed, first select an appropriate function key (see Table 5) to select a section. Use the arrow (←, ↑, →, ↓) and tabulation (Tab) keys to move the cursor to the parameter to be edited. When the cursor is located properly, press Enter (or Return) to select the parameter. Next, enter the new value and press Enter again. When all of the parameters within a particular section of the display have been edited, press Esc to return to the main menu. For example, to edit the Strobe PWth parameter in the Main Phase-Locked Loop #1 section from the main menu in STANDARD mode, perform the following keystrokes: F1 Select the Main Loop section. → Move to the right column. ↓ Move down the right column ↓ Move down the right column. ↓ Move down the right column. ↓ Move down the right column. ↓ Move down the right column. Enter Select the Strobe Pwth field. Data Enter the desired data, such as 9500. Enter Complete the field edit. Esc Exit the Main Loop section and return to the main menu. u Increments CN by 1. j Decrements CN by 1. U Increments CN by 5. J Decrements CN by 5.

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5.1.5.1 Function Keys Use the function keys in Table 5 to select sections of the display for editing or to perform a program function. Table 5. Function Keys

Function Key Definition Description F1 Edit phase-locked loop 1 Selects the Main Loop section of the display for editing F2 Edit phase-locked loop 2 Selects the Auxiliary Loop section of the display for editing F3 Edit modulator Selects the Modulator section of the display for editing F4 Edit device Selects the Device section of the display for editing F5 View bit map Views the current multiword bitmap F7 Select port Selects the PC parallel port. This function looks at the ROM BIOS to find all parallel ports. Follow the directions to select a particular port if more than one is found. F8 Load file Loads a configuration file to reset the program parameters to a user-specified condition. This function looks for the entered file on the same disk and in the same directory from which the program is executing. Any existing, allowable DOS name can be used. You can also load the INIT.CFG file using this function to restore the original program configuration. F9 Save file Saves a configuration file containing the current program parameters to a user-specified file. This function writes the program parameters to the specified file name on the same disk and in the same directory from which the program is executing. Any allowable DOS name can be used. You can rewrite the INIT.CFG file using this function to change the boot program configuration. F10 Send to device Programs the TRF3040 device. When F10 is selected, the current bitmap is displayed, and you can enter the letter (A, B, C, D, G, E) of the word to be sent to the TRF3040 device. You can send the default sequence of G, D, C, B, and A (in this order) to the TRF3040 device by pressing Enter without first selecting a letter. Ctrl–Q Quit Press the Control (Ctrl) key and hold while pressing the Q key to exit the program and return to the DOS prompt.

5.2 Special Notes The FMOD field in the Main Loop section of the screen must be modified when you change between STANDARD and ENHANCED modes. You should also re-enter the desired main VCO frequency in the Main Phase-Locked Loop section after switching between STANDARD and ENHANCED modes, and after correctly setting the FMOD field to ensure that the NM1-NM3 (STANDARD) and N (ENHANCED) parameter calculations are current.

Evaluation and Demonstration of the TRF3040 Frequency Modulator/Synthesizer 41 References

References 1. Best, Roland E., Phase-Locked Loops—Design, Simulation, & Applications, 3rd edition, McGraw-Hill, New York, 1997. 2. Djen, Wing S., Philips Semiconductors: AN1890, Using the SA7025 and SA8025A for Narrow Band Systems, August 1997. 3. Brennan, P. V., Phase-Locked Loops: Principles and Practice, 1st edition, McGraw-Hill, New York, 1996. 4. Rohde, Ulrich L., Microwave and Wireless Synthesizers—Theory and Design, 1st edition, John Wiley & Sons, Inc., New York, 1997.

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