Examining the Dynamics Between Aligning a Company's Internal Processes to the External Environment and the Company's Perform

Total Page:16

File Type:pdf, Size:1020Kb

Examining the Dynamics Between Aligning a Company's Internal Processes to the External Environment and the Company's Perform Examining the dynamics between aligning a company’s internal processes to the external environment and the company’s performance with a temporal dimension in the aircraft and semiconductor industry By Hannes S. Dietz in partial fulfilment of the requirements for the degree of Master of Science in Management of Technology at the Delft University of Technology, to be defended publicly on Wednesday May 4, 2016 at 15:00 PM. Graduation committee Chairman: Dr. Robert M. Verburg Associate Professor, Faculty of Technology Policy & Management, TU Delft First Supervisor Dr. Zenlin Roosenboom-Kwee Assistant Professor, Faculty of Technology Policy & Management, TU Delft Second Supervisor: Dr. Haiko van der Voort Assistant Professor, Faculty of Technology Policy & Management, TU Delft An electronic version of this thesis is available at http://repository.tudelft.nl/. This page is intentionally left blank Executive Summary Since Bourgeois III and Eisenhardt (1988) have introduced their ground breaking study discussing the concept of environmental velocity, which describes how fast and continuous/discontinuous the organizational environment of a company changes in all the relevant dimensions which affect the company i.e. the dimensions of technology, demand, regulation and competition, much research has followed on this topic. However the research has come up short in several ways. First of it has assumed the industry to have the same type of speed for every dimension and thus termed industries as high or low velocity industries without taking into account that dimensions can differ in terms of their speed which makes it unjustified to term an industry merely as a high or low velocity industry. An example for this is the reference of the biotechnology industry as a high velocity industry even though product development times are around 10-20 years in this industry. Secondly the research only takes into account the speed of change, and mostly neglected the continuity of change measured though the concept of direction of change. However the direction of change is an important concept which can help characterize the environment and in turn enable researchers and managers alike to understand the industry in which a company is operating in better. Furthermore most of the research has been done on a conceptual level and neglected actual operationalisations and measurements of the velocities of the industries. There are only few studies that have operationalized and measured the environmental velocity, and those that have done so have neglected the direction of change. Alignment literature has found that matching internal processes and capabilities to the external environment has positive performance implications for the firm. Regarding a temporal dimension previous studies have found that matching the internal rates of change to the external rates of change is beneficial for the company and should be strived for (Kwee 2009, Ben-Menahem, Kwee et al. 2013). We aim to bring together these two research streams and build upon the theory of environmental velocity as well as the alignment literature. One research objective is to advance research about environmental velocity by taking into account the discontinuity through the concept of direction of change and operationalizing and measuring it in a comprehensive way. Another one is to challenge the predominant view in existing literature that an environment can be described with one single velocity which sums up all dimensions. This is done with the help of velocity homology, a concept which assesses how dis(similar) the different dimensions of the industry are to each other. Thus the fact that dimensions have different speeds and continuities is taken into account which results in a multidimensional conceptualization of the environmental velocity concept. In order to get a better understanding of the performance of companies in different velocity conditions this concept will then be used to see how companies have managed to align their internal actions to the environment. Furthermore an objective is to test the interrelationship of the alignment of internal and external rates and directions of change and the performance of the companies in the aircraft and the semiconductor industries, two industries which are both high technology industries and have been previously described as low and high velocity industries respectively. In order fulfil the research objective several different steps were taken. First a thorough literature review was conducted on the topic of environmental velocity with the aim of finding all possible relevant dimensions which were deemed to be product, technology, demand, regulation and competition. Subsequently the possible operationalisations and measurements for the speed and continuity of the five dimensions was assessed and the difficulties that have limited previous research highlighted. One of the main findings is that the continuity of an industry (direction of change) must be assessed through qualitative analysis which limits the possibility of researching this concept due to i the required time of assessing it. Furthermore literature review on alignment theory with a temporal context revealed that alignment of internal processes and capabilities to the external environment was found to be positively related to performance and that positive misalignment is superior to negative misalignment which built the propositions for our analysis. Followingly a short introduction and informative background about the two industries and the focal companies, namely Intel and Boeing were given. Then each measure for the rate of change (speed characteristic) and direction of change (continuity characteristic) for the three chosen dimensions, namely product, technology and demand was discussed and analysed in detail. Whereas for both the aircraft and semiconductor industry the rate of changes were measured through equal indicators, namely change in number of new product generations (product), change in number of new patents (technology), change in sales (demand), the direction of change was different and customized for each industry except for the demand dimension (change in trend in sales). For the semiconductor industry this was the minimum feature size (technology) the ratio of clock speed to price (product), whereas for the aircraft industry it was the range, capacity and fuel efficiency per seat (product). For the technology dimension a purely qualitative study was undertaken which indicated that no discontinuous change had taken place over the last 25 years. As the operationalization of the direction of change requires an in depth case study of the industries it becomes clear why there has almost been no study measuring the concept of direction of change despite its relevance when analyzing an industry in terms of its velocity. On the basis of this analysis the velocity homologies of the industries were assessed. It was found that there were considerable heterogeneity in between the dimensions for both industries. Nonetheless we find that the semiconductor industry has rather high rates and directions of change in comparison with the aircraft industry. Finally the interrelation between aligning the internal rates and directions of change and the performance of the firm are assessed. For the rate of change closer alignment is connected to higher performance in the semiconductor industry. Furthermore positive misalignment is associated with better performance than negative misalignment which is in line with our expectations. For the aircraft industry at first no effect of alignment on performance could be detected. However after controlling for the extreme high fluctuations in the product dimension results are in line with the propositions. Even though further research is needed to confirm our findings we can say that in general our results show that alignment is beneficial for the company. We thus find that it is crucial for a manager to understand the environment the company is operating in taking into account all the different dimensions and then try to align the company to the external conditions. This however is connected to some challenges. If the velocities associated with the different environmental dimensions are similar (high homology environment) all organizational activities should be aligned to this uniform environmental velocity. This is rather straightforward and simpler to manage. If, on the other hand, the velocity dimensions differ significantly (low-homology environment), the firm will have to align its internal activities to these dissimilar rates and directions of change, which will lead to heterogeneous sets of paces and directions of activities within the firm. This situation can pose a real challenge since it will bring about potential incoherence among subunits. A possible solution to this are modular and flexible structures which allow room for experimentation. This can possibly help the company to be more open and flexible to change and operate at the necessary speed at all levels. ii Further studies should take into account the other dimensions of the environmental velocity concept. Furthermore more industries or the same industries with more data points should be studied and other factors influencing the performance should be controlled for. iii Acknowledgements I would like to thank all the members of my graduation committee for guiding me to through the graduation process. Foremost, I would like to express my sincere gratitude to my first supervisor
Recommended publications
  • Ultrasparc Iii
    UltraSparc IIi Kevin Normoyle and the Sabre cats One size doesn’t fit all SPARC chip technology available in three broad product categories: • S-Series (servers, highest performance) • I-Series (price/performance, ease-of-use) • E-Series (lowest cost) Tired: Marginal micro-optimizations Wired: Interfaces and integration. 2 of 26 Desktop/High end embedded system issues • Ease of design-in • Low-cost • Simple motherboard designs • Power • Higher performance graphics interfaces • Low latency to memory and I/O • Upgrades • The J word 3 of 26 UltraSPARC-IIi System Example Module 72-bit DIMM 72-bit DIMM SRAM SRAM UltraSPARC IIi SRAM 75MHz/72-bit XCVRs clocks 100MHz/64-bit 66 or 33 MHz UPA64S 32-bit device 3.3v example: Creator3D graphics APB Advanced PCI Bridge (optional) 33MHz/32-bit 33MHz/32-bit Can use PC-style SUPERIO chips 5v/3.3v 5v/3.3v (boot addressing / INT_ACK features) 4 of 26 Highlights • TI Epic4 GS2, 5-layer CMOS, 2.6v core, 3.3v I/O. • Sun’s Visual Instruction Set - VIS(TM) - 2-D, 3-D graphics, image processing, real-time compression/decompression, video effects - block loads and stores (64-byte blocks) sustain 300 MByte/s to/from main memory, with arbitrary src/dest alignment • Four-way superscalar instruction issue - 6 pipes: 2 integer, 2 fp/graphics, 1 load/store, 1 branch • High bandwidth / Low latency interfaces - Synchronous, external L2 cache, 0.25MB - 2MB - 8-byte (+parity) data bus to L2 cache (1.2 GByte/s sustained) - 8-byte (+ECC) data bus to DRAM XCVRs (400 MByte/s sustained) or UPA64S (800 Mbyte/s sustained) - 4-byte PCI/66 interface.
    [Show full text]
  • Sun Fire E2900 Server
    Sun FireTM E2900 Server Just the Facts February 2005 SunWin token 401325 Sun Confidential – Internal Use Only Just The Facts Sun Fire E2900 Server Copyrights ©2005 Sun Microsystems, Inc. All Rights Reserved. Sun, Sun Microsystems, the Sun logo, Sun Fire, Netra, Ultra, UltraComputing, Sun Enterprise, Sun Enterprise Ultra, Starfire, Solaris, Sun WebServer, OpenBoot, Solaris Web Start Wizards, Solstice, Solstice AdminSuite, Solaris Management Console, SEAM, SunScreen, Solstice DiskSuite, Solstice Backup, Sun StorEdge, Sun StorEdge LibMON, Solstice Site Manager, Solstice Domain Manager, Solaris Resource Manager, ShowMe, ShowMe How, SunVTS, Solstice Enterprise Agents, Solstice Enterprise Manager, Java, ShowMe TV, Solstice TMNscript, SunLink, Solstice SunNet Manager, Solstice Cooperative Consoles, Solstice TMNscript Toolkit, Solstice TMNscript Runtime, SunScreen EFS, PGX, PGX32, SunSpectrum, SunSpectrum Platinum, SunSpectrum Gold, SunSpectrum Silver, SunSpectrum Bronze, SunStart, SunVIP, SunSolve, and SunSolve EarlyNotifier are trademarks or registered trademarks of Sun Microsystems, Inc. in the United States and other countries. All SPARC trademarks are used under license and are trademarks or registered trademarks of SPARC International, Inc. in the United States and other countries. Products bearing SPARC trademarks are based upon an architecture developed by Sun Microsystems, Inc. UNIX is a registered trademark in the United States and other countries, exclusively licensed through X/Open Company, Ltd. All other product or service names mentioned
    [Show full text]
  • Memory Profiling on Shared-Memory Multiprocessors
    MEMORY PROFILING ON SHARED-MEMORY MULTIPROCESSORS A DISSERTATION SUBMITTED TO THE DEPARTMENT OF ELECTRICAL ENGINEERING AND THE COMMITTEE ON GRADUATE STUDIES OF STANFORD UNIVERSITY IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF DOCTOR OF PHILOSOPHY Jeffrey S. Gibson June 2004 c Copyright by Jeffrey S. Gibson 2004 All Rights Reserved ii I certify that I have read this dissertation and that in my opinion it is fully adequate, in scope and quality, as a dissertation for the degree of Doctor of Philosophy. Dr. John Hennessy (Principal Advisor) I certify that I have read this dissertation and that in my opinion it is fully adequate, in scope and quality, as a dissertation for the degree of Doctor of Philosophy. Dr. Mark Horowitz I certify that I have read this dissertation and that in my opinion it is fully adequate, in scope and quality, as a dissertation for the degree of Doctor of Philosophy. Dr. Mendel Rosenblum Approved for the University Committee on Graduate Studies: iii Abstract Tuning application memory performance can be difficult on any system but is particularly so on distributed shared-memory (DSM) multiprocessors. This is due to the implicit nature of communication, the unforeseen interactions among the processors, and the long remote memory latencies. Tools, called memory profilers, that allow the user to map memory behavior back to application data structures can be invaluable aids to the programmer. Un- fortunately, memory profiling is difficult to implement efficiently since most systems lack the requisite hardware support. This dissertation introduces two techniques for efficient memory profiling, each requiring hardware support on either the processor or the system node controller.
    [Show full text]
  • Sun Ultratm 5 Workstation Just the Facts
    Sun UltraTM 5 Workstation Just the Facts Copyrights 1999 Sun Microsystems, Inc. All Rights Reserved. Sun, Sun Microsystems, the Sun logo, Ultra, PGX, PGX24, Solaris, Sun Enterprise, SunClient, UltraComputing, Catalyst, SunPCi, OpenWindows, PGX32, VIS, Java, JDK, XGL, XIL, Java 3D, SunVTS, ShowMe, ShowMe TV, SunForum, Java WorkShop, Java Studio, AnswerBook, AnswerBook2, Sun Enterprise SyMON, Solstice, Solstice AutoClient, ShowMe How, SunCD, SunCD 2Plus, Sun StorEdge, SunButtons, SunDials, SunMicrophone, SunFDDI, SunLink, SunHSI, SunATM, SLC, ELC, IPC, IPX, SunSpectrum, JavaStation, SunSpectrum Platinum, SunSpectrum Gold, SunSpectrum Silver, SunSpectrum Bronze, SunVIP, SunSolve, and SunSolve EarlyNotifier are trademarks, registered trademarks, or service marks of Sun Microsystems, Inc. in the United States and other countries. All SPARC trademarks are used under license and are trademarks or registered trademarks of SPARC International, Inc. in the United States and other countries. Products bearing SPARC trademarks are based upon an architecture developed by Sun Microsystems, Inc. UNIX is a registered trademark in the United States and other countries, exclusively licensed through X/Open Company, Ltd. OpenGL is a registered trademark of Silicon Graphics, Inc. Display PostScript and PostScript are trademarks of Adobe Systems, Incorporated, which may be registered in certain jurisdictions. Netscape is a trademark of Netscape Communications Corporation. DLT is claimed as a trademark of Quantum Corporation in the United States and other countries. Just the Facts May 1999 Positioning The Sun UltraTM 5 Workstation Figure 1. The Ultra 5 workstation The Sun UltraTM 5 workstation is an entry-level workstation based upon the 333- and 360-MHz UltraSPARCTM-IIi processors. The Ultra 5 is Sun’s lowest-priced workstation, designed to meet the needs of price-sensitive and volume-purchase customers in the personal workstation market without sacrificing performance.
    [Show full text]
  • Microsparc-II-Usersm
    Products Rights Notice: Copyright © 1991-2008 Sun Microsystems, Inc. 4150 Network Circle, Santa Clara, California 95054, U.S.A. All Rights Reserved You understand that these materials were not prepared for public release and you assume all risks in using these materials. These risks include, but are not limited to errors, inaccuracies, incompleteness and the possibility that these materials infringe or misappropriate the intellectual property right of others. You agree to assume all such risks. THESE MATERIALS ARE PROVIDED BY THE COPYRIGHT HOLDERS AND OTHER CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS (INCLUDING ANY OF OWNER'S PARTNERS, VENDORS AND LICENSORS) BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THESE MATERIALS, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. Sun, Sun Microsystems, the Sun logo, Solaris, OpenSPARC T1, OpenSPARC T2 and UltraSPARC are trademarks or registered trademarks of Sun Microsystems, Inc. in the U.S. and other countries. All SPARC trademarks are used under license and are trademarks or registered trademarks of SPARC International, Inc. in the U.S. and other countries. Products bearing SPARC trademarks are based upon architecture developed by Sun Microsystems, Inc.
    [Show full text]
  • The Alpha 21264 Microprocessor: Out-Of-Order Execution at 600 Mhz
    The Alpha 21264 Microprocessor: Out-of-Order Execution at 600 Mhz R. E. Kessler COMPAQ Computer Corporation Shrewsbury, MA REK August 1998 1 Some Highlights z Continued Alpha performance leadership y 600 Mhz operation in 0.35u CMOS6, 6 metal layers, 2.2V y 15 Million transistors, 3.1 cm2, 587 pin PGA y Specint95 of 30+ and Specfp95 of 50+ y Out-of-order and speculative execution y 4-way integer issue y 2-way floating-point issue y Sophisticated tournament branch prediction y High-bandwidth memory system (1+ GB/sec) REK August 1998 2 Alpha 21264: Block Diagram FETCH MAP QUEUE REG EXEC DCACHE Stage: 0 1 2 3 4 5 6 Int Branch Int Reg Exec Predictors Reg Issue File Queue Addr Sys Bus Map (80) Exec (20) L1 Bus 64-bit Data Reg Exec Inter- Cache Bus 80 in-flight instructions File Cache plus 32 loads and 32 stores Addr face 64KB 128-bit (80) Exec Unit Next-Line 2-Set Address Phys Addr 4 Instructions / cycle L1 Ins. 44-bit Cache FP ADD FP Reg 64KB FP Div/Sqrt Issue File Victim 2-Set Reg Queue (72) FP MUL Buffer Map (15) Miss Address REK August 1998 3 Alpha 21264: Block Diagram FETCH MAP QUEUE REG EXEC DCACHE Stage: 0 1 2 3 4 5 6 Int Branch Int Reg Exec Predictors Reg Issue File Queue Addr Sys Bus Map (80) Exec (20) L1 Bus 64-bit Data Reg Exec Inter- Cache Bus 80 in-flight instructions File Cache plus 32 loads and 32 stores Addr face 64KB 128-bit (80) Exec Unit Next-Line 2-Set Address Phys Addr 4 Instructions / cycle L1 Ins.
    [Show full text]
  • The Supersparc Microprocessor
    The SuperSPARC™ Microprocessor Technical White Paper 2550 Garcia Avenue Mountain View, CA 94043 U.S.A. © 1992 Sun Microsystems, Inc.—Printed in the United States of America. 2550 Garcia Avenue, Mountain View, California 94043-1100 U.S.A All rights reserved. This product and related documentation is protected by copyright and distributed under licenses restricting its use, copying, distribution and decompilation. No part of this product or related documentation may be reproduced in any form by any means without prior written authorization of Sun and its licensors, if any. Portions of this product may be derived from the UNIX® and Berkeley 4.3 BSD systems, licensed from UNIX Systems Laboratories, Inc. and the University of California, respectively. Third party font software in this product is protected by copyright and licensed from Sun’s Font Suppliers. RESTRICTED RIGHTS LEGEND: Use, duplication, or disclosure by the government is subject to restrictions as set forth in subparagraph (c)(1)(ii) of the Rights in Technical Data and Computer Software clause at DFARS 252.227-7013 and FAR 52.227-19. The product described in this manual may be protected by one or more U.S. patents, foreign patents, or pending applications. TRADEMARKS Sun, Sun Microsystems, the Sun logo, are trademarks or registered trademarks of Sun Microsystems, Inc. UNIX and OPEN LOOK are registered trademarks of UNIX System Laboratories, Inc. All other product names mentioned herein are the trademarks of their respective owners. All SPARC trademarks, including the SCD Compliant Logo, are trademarks or registered trademarks of SPARC International, Inc. SPARCstation, SPARCserver, SPARCengine, SPARCworks, and SPARCompiler are licensed exclusively to Sun Microsystems, Inc.
    [Show full text]
  • The Interactive Performance of SLIM: a Stateless, Thin-Client Architecture ✽ ✽ ✝ Brian K
    17th ACM Symposium on Operating Systems Principles (SOSP’99) Published as Operating Systems Review, 34(5):32–47, December 1999 The interactive performance of SLIM: a stateless, thin-client architecture ✽ ✽ ✝ Brian K. Schmidt , Monica S. Lam , J. Duane Northcutt ✽ Computer Science Department, Stanford University {bks, lam}@cs.stanford.edu ✝ Sun Microsystems Laboratories [email protected] Abstract 1 Introduction Taking the concept of thin clients to the limit, this paper Since the mid 1980’s, the computing environments of proposes that desktop machines should just be simple, many institutions have moved from large mainframe, stateless I/O devices (display, keyboard, mouse, etc.) that time-sharing systems to distributed networks of desktop access a shared pool of computational resources over a machines. This trend was motivated by the need to provide dedicated interconnection fabric — much in the same way everyone with a bit-mapped display, and it was made as a building’s telephone services are accessed by a possible by the widespread availability of collection of handset devices. The stateless desktop design high-performance workstations. However, the desktop provides a useful mobility model in which users can computing model is not without its problems, many of transparently resume their work on any desktop console. which were raised by the original UNIX designers[14]: This paper examines the fundamental premise in this “Because each workstation has private data, each system design that modern, off-the-shelf interconnection must be administered separately; maintenance is technology can support the quality-of-service required by difficult to centralize. The machines are replaced today’s graphical and multimedia applications.
    [Show full text]
  • Sun Ultratm 2 Workstation Just the Facts
    Sun UltraTM 2 Workstation Just the Facts Copyrights 1999 Sun Microsystems, Inc. All Rights Reserved. Sun, Sun Microsystems, the Sun Logo, Ultra, SunFastEthernet, Sun Enterprise, TurboGX, TurboGXplus, Solaris, VIS, SunATM, SunCD, XIL, XGL, Java, Java 3D, JDK, S24, OpenWindows, Sun StorEdge, SunISDN, SunSwift, SunTRI/S, SunHSI/S, SunFastEthernet, SunFDDI, SunPC, NFS, SunVideo, SunButtons SunDials, UltraServer, IPX, IPC, SLC, ELC, Sun-3, Sun386i, SunSpectrum, SunSpectrum Platinum, SunSpectrum Gold, SunSpectrum Silver, SunSpectrum Bronze, SunVIP, SunSolve, and SunSolve EarlyNotifier are trademarks, registered trademarks, or service marks of Sun Microsystems, Inc. in the United States and other countries. All SPARC trademarks are used under license and are trademarks or registered trademarks of SPARC International, Inc. in the United States and other countries. Products bearing SPARC trademarks are based upon an architecture developed by Sun Microsystems, Inc. OpenGL is a registered trademark of Silicon Graphics, Inc. UNIX is a registered trademark in the United States and other countries, exclusively licensed through X/Open Company, Ltd. Display PostScript and PostScript are trademarks of Adobe Systems, Incorporated. DLT is claimed as a trademark of Quantum Corporation in the United States and other countries. Just the Facts May 1999 Sun Ultra 2 Workstation Figure 1. The Sun UltraTM 2 workstation Sun Ultra 2 Workstation Scalable Computing Power for the Desktop Sun UltraTM 2 workstations are designed for the technical users who require high performance and multiprocessing (MP) capability. The Sun UltraTM 2 desktop series combines the power of multiprocessing with high-bandwidth networking, high-performance graphics, and exceptional application performance in a compact desktop package. Users of MP-ready and multithreaded applications will benefit greatly from the performance of the Sun Ultra 2 dual-processor capability.
    [Show full text]
  • Sun Enterprisetm 220R Server Just the Facts
    Sun EnterpriseTM 220R Server Just the Facts Copyrights 1998, 1999 Sun Microsystems, Inc. All Rights Reserved. Sun, Sun Microsystems, the Sun logo, Sun Enterprise, Ultra, UltraComputing, Sun Enterprise Ultra, Starfire, Solaris, Solstice, Sun Enterprise SyMON, Sun WebServer, IPX, NFS, VIS, Sun StorEdge, OpenBoot, Solaris Web Start Wizards, Solstice AdminSuite, Solaris Management Console, Sun Enterprise Authentication Mechanism, SunScreen, Solstice DiskSuite, Solstice Backup, Sun StorEdge LibMON, Solstice Site Manager, Solstice Domain Manager, Solaris Resource Manager, ShowMe How, Solstice Enterprise Manager, Solstice Enterprise Agents, ShowMe TV, Java, SunLink, Solstice SunNet Manager, SunScreen EFS, Solstice Cooperative Consoles, Solstice TMNscript, Solstice TMNscript Runtime, SunCD, SunVTS, SunSpectrum, SunSwift, SunFastEthernet, SunFDDI, SunTRI/P, SunHSI/P, PGX, PGX32, SunATM, SunSpectrum Platinum, SunSpectrum Gold, SunSpectrum Silver, SunSpectrum Bronze, SunStart, SunVIP, SunSolve, and SunSolve EarlyNotifier are trademarks, registered trademarks, or service marks of Sun Microsystems, Inc. in the United States and other countries. All SPARC trademarks are used under license and are trademarks or registered trademarks of SPARC International, Inc. in the United States and other countries. Products bearing SPARC trademarks are based upon an architecture developed by Sun Microsystems, Inc. UNIX is a registered trademark in the United States and in other countries, exclusively licensed through X/Open Company, Ltd. Just the Facts November 1999 Positioning Figure 1. Sun EnterpriseTM 220R System Exceptional Processing Power in a Compact Footprint The Sun EnterpriseTM 220R server is the latest member of Sun’s powerful line of servers for enterprise network computing based on the UltraSPARCTM processor technology. This next-generation workgroup server brings multiprocessing power, UltraSCSI disks, and the industry-standard peripheral component interconnect (PCI) I/O bus to a highly modular, rack-optimized 4RU (rack unit) design.
    [Show full text]
  • Dynamic Helper Threaded Prefetching on the Sun Ultrasparc® CMP Processor
    Dynamic Helper Threaded Prefetching on the Sun UltraSPARC® CMP Processor Jiwei Lu, Abhinav Das, Wei-Chung Hsu Khoa Nguyen, Santosh G. Abraham Department of Computer Science and Engineering Scalable Systems Group University of Minnesota, Twin Cities Sun Microsystems Inc. {jiwei,adas,hsu}@cs.umn.edu {khoa.nguyen,santosh.abraham}@sun.com Abstract [26], [28], the processor checkpoints the architectural state and continues speculative execution that Data prefetching via helper threading has been prefetches subsequent misses in the shadow of the extensively investigated on Simultaneous Multi- initial triggering missing load. When the initial load Threading (SMT) or Virtual Multi-Threading (VMT) arrives, the processor resumes execution from the architectures. Although reportedly large cache checkpointed state. In software pre-execution (also latency can be hidden by helper threads at runtime, referred to as helper threads or software scouting) [2], most techniques rely on hardware support to reduce [4], [7], [10], [14], [24], [29], [35], a distilled version context switch overhead between the main thread and of the forward slice starting from the missing load is helper thread as well as rely on static profile feedback executed, minimizing the utilization of execution to construct the help thread code. This paper develops resources. Helper threads utilizing run-time a new solution by exploiting helper threaded pre- compilation techniques may also be effectively fetching through dynamic optimization on the latest deployed on processors that do not have the necessary UltraSPARC Chip-Multiprocessing (CMP) processor. hardware support for hardware scouting (such as Our experiments show that by utilizing the otherwise checkpointing and resuming regular execution). idle processor core, a single user-level helper thread Initial research on software helper threads is sufficient to improve the runtime performance of the developed the underlying run-time compiler main thread without triggering multiple thread slices.
    [Show full text]
  • Computer Organization EECC 550 • Introduction: Modern Computer Design Levels, Components, Technology Trends, Register Transfer Week 1 Notation (RTN)
    Computer Organization EECC 550 • Introduction: Modern Computer Design Levels, Components, Technology Trends, Register Transfer Week 1 Notation (RTN). [Chapters 1, 2] • Instruction Set Architecture (ISA) Characteristics and Classifications: CISC Vs. RISC. [Chapter 2] Week 2 • MIPS: An Example RISC ISA. Syntax, Instruction Formats, Addressing Modes, Encoding & Examples. [Chapter 2] • Central Processor Unit (CPU) & Computer System Performance Measures. [Chapter 4] Week 3 • CPU Organization: Datapath & Control Unit Design. [Chapter 5] Week 4 – MIPS Single Cycle Datapath & Control Unit Design. – MIPS Multicycle Datapath and Finite State Machine Control Unit Design. Week 5 • Microprogrammed Control Unit Design. [Chapter 5] – Microprogramming Project Week 6 • Midterm Review and Midterm Exam Week 7 • CPU Pipelining. [Chapter 6] • The Memory Hierarchy: Cache Design & Performance. [Chapter 7] Week 8 • The Memory Hierarchy: Main & Virtual Memory. [Chapter 7] Week 9 • Input/Output Organization & System Performance Evaluation. [Chapter 8] Week 10 • Computer Arithmetic & ALU Design. [Chapter 3] If time permits. Week 11 • Final Exam. EECC550 - Shaaban #1 Lec # 1 Winter 2005 11-29-2005 Computing System History/Trends + Instruction Set Architecture (ISA) Fundamentals • Computing Element Choices: – Computing Element Programmability – Spatial vs. Temporal Computing – Main Processor Types/Applications • General Purpose Processor Generations • The Von Neumann Computer Model • CPU Organization (Design) • Recent Trends in Computer Design/performance • Hierarchy
    [Show full text]