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CS4350: Logic in Science

Optimization Problems in Propositional Logic

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Optimization Problems in Logic

Optimization Problems: those with minimum or maximum solutions (usually in terms of an objective/utility function).

• Minimally Sufficient Set of Operators • Logic Minimization • Maximum Satisfiability

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Minimally Sufficient • A set of logical operators is called minimally sufficient if every formula is logically equivalent to a formula involving only this set of logical operators, and it does not contain a proper subset which is also sufficient. • { ,  } is a sufficient set of operators. • Is this set minimally sufficient? • Yes. (How to prove it?)

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Minimally Sufficient • { ,  } is minimally sufficient. • { ,  } is minimally sufficient. • Is { , 0, 1 } minimally sufficient? •  x  x  0 ? • No, x  0  0 • { ite, 0, 1 } is sufficient. •  x  ite(x, 0, 1) • x  y  ite(x, ite(y, 1, 0), 0) • Is { ite, 0, 1 } minimally sufficient? • unknown

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Minimally Sufficient • Is there a minimally sufficient singleton set? • YES: {  } (nand), {  } (nor) •  x  x  x • x  y  (x  y) = (x  y)  (x  y) •  x  x  x • x  y  (x  y) = (x  y)  (x  y) • Is there a minimally sufficient set of a single trinary operator? • Yes, define f(x, y, z) = x  y.

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Minimal Definability • In , the meaning of a sufficient operators can be defined by a set of equations and the minimal number of equations is sought. • 3 equations to specify : – x  0 = 1, 0  y = 1, and 1  1 = 0. • What is the minimal number of equations needed to define ? One: ((x  y)  z)  (x  ((x  z)  x)) = z It contains 3 variables and 14 symbols.

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Minimal Definability • What is the minimal number of equations needed to define ? One: ((x  y)  z)  (x  ((x  z)  x)) = z • From this equation, we get • (x  x)  (x  x) = x and it means  x = x. • (x  y) = (y x) and it means  is commutative. • ((x  x)  x) = ((y  y)  y)) and it means ( x  x) = ( y  y) = 1. • … (all Boolean algebra laws)

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Minimal Definability • What is the minimal number of equations to define the properties of {, }? (((x  y)  z) (x ( z (z  u)))) = z. It contains 4 variables and 21 symbols.

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Logic Minimization

• Also called Combinatorial Circuit Minimalization at gate level. • A combinatorial circuit is represented by a propositional formula () • Finding an equivalent formula of minimal size. – Difficult to perform manually. – Can use computer-based tool – Karnough Map (K-map) can be used for manual design of digital circuits.

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Define Functions by Truth Tables ab c out minterms clauses

000 0 m0=a b c M0=a+b+c 001 1 m1=a b c M1=a+b+c • i in mi and Mi is 010 0 m2=a b c M2=a+b+c the decimal 011 1 m3=a b c M3=a+b+c value of abc (in binary) 100 0 m4=a b c M4=a+b+c •  m  M 101 1 m5=a b c M5=a+b+c i i 110 0 m6=a b c M6=a+b+c 111 0 m7=a b c M7=a+b+c

• DNF f1 = a b c + a b c + a b c = m1 + m3 + m5 • CNF f2 = (a b c)(a b c)(a b c)(a b c)(a b c) = M0M2M4M6M7

After simplification: f1 = a c + b c; f2 = (a + b) c

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Circuit Minimization

• count reduction AREA • Gate count reduction POWER • Gate level reduction DELAY (Speed)

• Area reduction, power reduction and delay reduction improve designs

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Logic Gates

A Out

In 0 1 NOT: 1 0 A B Out A 00 1 A B Out NAND: B 01 1 00 0 A 10 1 AND: 01 0 11 0 B 10 0 11 1 A A B Out A B Out NOR: A B 00 1 OR: 00 0 01 0 B 01 1 10 0 10 1 11 0 11 1

A B Out XOR: e): AND, OR, NOT, etc. IFF: A A B Out A 00 0 00 1 B 01 1 B 01 0 10 1 10 0 11 0 11 1

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Gate Level implementation

• Two different implementations of the same function: DNF and CNF (+ for OR, * for AND, ’ for )

• Both use 4 AND/OR gates and the level is 2. • Not all gates use the same number of and power

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Logic Optimizations

 f1 = AB + AC + AD + AE + A BC D E F =   f2 = AB + AC + AD + AF + A BCDF

• Finding common  f1 = A( B + C + D + E )+ ABC DE F =  subexpressions.  f2 = A(B + C + D + F )+ A BC DF • Substituting one expression  g1 = B + C + D by a symbol (may increase G = f = A( g + E )+ A E g formula level, i.e., high of  1 1 1 f = A ( g + F + F g1 ) the formula tree). 2 1 g = B + C + D • Find smaller equivalent  1 G = f = A g + A E + A E g formulas.  1 1 1 f2 = A Final circuit: 5 AND/OR gates; 3 levels

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General Approaches

How does one find the smallest formula? – Manipulate algebraically until…? – Use Karnaugh maps (optimize visually) – Use a software optimizer

For large circuits – Decomposition & reuse of building blocks

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The K-Map Method

• The representation of a function is unique. • But, not the algebraic expression – Several versions of an algebraic expression exist. – Difficult to minimize algebraic functions manually. • The K-map method is a simple graphic tool to minimize functions in DNF/CNF. – Pictorial form of a truth table. – Also called Karnough Map.

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Two-Variable Map

• Two variables • Four squares for four minterms • Squares’ positions are indexed by the values of variables • Figure (b) shows the relationship between the squares and the values of variables x and y.

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Two-Variable Map (Cont.)

• May only be useful to represent 16 Boolean functions. nd • 2 Example: m1=m2=m3=1

m1+m2+m3 = x’y+xy’+xy = = x’y + x(y’ + y) = x’y + x = x+y (OR function)

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Three-Variable Map • There are 8 minterms for 3 variables.

• So, there are 8 squares, mi , each is a minterm. • mi: i is the decimal value of xyz. • Minterms are arranged not in a binary sequence, but in sequence similar to : Adjacent cells differ by one bit.

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Three-Variable Map: Example

• The square for square m5 corresponds to row 1 and column 01 (101).

• Another look to m5 is m5 = xy’z. y’ is the negation of y.

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Adjacent Squares • Two adjacent squares differs by one bit (one is negated and the other is not). – So, they can be merged

– Ex: m5+m7 = xy’z+xyz = xz(y’+y) = xz • Merge: cover as many adjacent squares as possible by a rectangle of size of power of two.

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Adjacent Squares: Example 1 • Simplify the Boolean function

F(x,y,z) = Σ(2,3,4,5) = m2 + m3 + m4 + m5 F(x,y,z) = x’y + xy’

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Adjacent Squares

• Far right squares are adjacent to far left squares (they don’t touch each other in K-map).

– m0 is adjacent to m2 and m4 is adjacent to m6. – m0+m2 = x’y’z’+x’yz’ = x’z’(y’+y) = x’z’ – m4+m6 = xy’z’+xyz’ = xz’(y’+y) = xz’

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Simplify function: Example 2

F(x,y,z) = Σ(3,4,6,7)

m3 + m7 = yz

m4 + m6 = xz’ F(x,y,z) = yz+xz’

m6 + m7 = xy (redundant)

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Karnaugh Minimization Tricks

ab c 00 01 11 10 Minterms can overlap 0 0 1 1 1  out = bc’ + ac’ + ab 1 0 0 1 0

ab c 00 01 11 10 0 1 1 1 1 Minterms can span 2, 4, 8 1 0 0 1 0 or more cells  out = c’ + ab

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Simplify function: Example 3

F(x,y,z) = Σ(0,2,4,5,6)

F(x,y,z) = z’+xy’

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Simplify function: Example 4 • F=A’C+A’B+AB’C+BC – Express F as a sum of minterms. • F(A,B,C) = Σ(1,2,3,5,7) – Find the minimal DNF • F = C+A’B

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Square Numbering is not unique

s1 s2 s3 s1 s2

s3

mi: i is the decimal value of s1s2s3.

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Square Numbering: Example 5

After optimization: f = s1s2 + s3

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Four-Variable Map

• 16 minterms (and squares) for 4 variables.

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Karnaugh Minimization Tricks ab cd 00 01 11 10 00 0 00 0 • The map wraps around 01 1 00 1 – out = 11 1 00 1 b’d 10 0 00 0

ab cd 00 01 11 10 00 1 0 0 1 – out = 01 0 0 0 0 b’d’ 11 0 0 0 0 10 1 0 0 1

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Simplify Function: Example 6

f(x1, x2, x3, x4) = Σ(4,6,12,14)

f(x1, x2, x3, x4) = x2x4’

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CNF Simplification

• Mark the empty squares by 0’s. • Combine them (as we did for sum-of- products) to get a simplified DNF. – We obtain F’ (complement of the function) • Take the dual of F’ (a DNF) to obtain F (a CNF).

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CNF Simplification: Example 7

F(A,B,C,D) = Σ(0,1,2,5,8,9,10) F = B’D’+B’C’+A’C’D

F’=AB+CD+BD’  dual(F’) = F =  (A’+B’)(C’+D’)(B’+D)

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CNF (The POS Expression)

f(x1, x2, x3) = M1 M3

f(x1, x2, x3) = ( x1 + x2 + x3)( x1 + x2 + x3)

= ( x1 + x3 + x2)( x1 + x3 + x2)

= ( x1 + x3 )( x2 + x2 )

= ( x1 + x3 )

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CNF Simplification

f’(x1, x2, x3) = m1 + m3 = x1’ x2’ x3 + x1’ x2 x3 = x1’ x3

dual(f’) = f = x1+ x3’

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Alternative Solution Using K-Maps

1 1 1 1

0 0 1 1

dual(f’) = f = x1+ x3’

( x1 + x3’ ) This is both CNF and DNF!!!

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CMOS Implementation

• CMOS: Complementary Metal– Oxide–Semiconductor, an advanced and popular technology for implementing logic circuits. • NOT/NAND/NOR gates need only two transistors per input for unbuffered outputs. • Other gates are implemented A CMOS using NOT/NAND/NOR (thus (negation) more expensive)

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NAND Circuits • NAND gate is universal – Any digital system can be implemented with it. – AND, OR and NOT can be implemented with NANDs.

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Example: F=AB+CD

X  Y (XY) X+Y

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Example • Implement F(x,y,z)=Σ(1,2,3,4,5,7) with only NAND gates.

(X,Y,Z)  (XYZ)  X+Y+Z  (X  Y)  Z  X  (Y  Z)

Need 20 transistors in CMOS: Three inverter: 6 transistors; 2 2-input NAND gates: 8 transistors; One 3-input NAND gate: 6 transistors 41

Multilevel NAND Circuits

• F=A(CD+B)+BC’

Need 24 transistors in CMOS: 5 NAND gates (20); 2 inverters (4)

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NOR Implementation

• (X,Y,Z) (X+Y+Z) XYZ • (X,Y,Z)  (X  Y)  Z  X  (Y  Z)

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Example: F=(A+B)(C+D)E

• Need 16 transistors in CMOS: – One inverter: 2 transistors – Two 2-input NOR gates: 8 transistors – One 3-input NOR gate: 6 transistors

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Example: F=(AB’+A’B)(C+D’)

• Need 26 transistors in CMOS: – Three inverters: 6 transistors – Five NOR gates: 20 transistors

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Optimal Formulas

• F = A’ + B + C (A, B’, C’)  (A’ B) C’  A  (B  C) • Which one needs the least number of transistors in CMOS? • (A, B’, C’) needs 10 transistors: – Two inverters: 4 transistors – One 3-input NAND gate: 6 transistors • (A’ B) C’ needs 12 transistors in CMOS: – Two inverters: 4 transistors – One NAND gate and one NOR gate: 8 transistors • A  (B  C) needs 8 transistors in CMOS: – One NAND gate and one NOR gate: 8 transistors

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Library of Basic Operations

• inv: , inverter • aoi2: -- gate • nand2:  of 2 inputs • F =  (( A  B)  C) • nand3:  of 3 inputs • aoi22: -- gate • nand4:  of 4 inputs • F =  (( A  B)  (C D)) • nor2:  of 2 inputs • oai2: -- gate • nor3:  of 3 inputs • F =  (( A  B)  C) • xor:  • oai22: -- gate • F =  (( A  B)  (C  D)) • xnor: , neg. of 

It is a challenge to optimize a circuit with so many basic operations.

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Implementation of AOI2

C

B F A

• F =  (A  (B  C))  A (B  C) • Need 10 transistors for A (B  C): –  (4 trans.),  (2 trans.),  (4 trans.) • However, it can be built in CMOS by 6 transistors.

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XOR Implementation

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Odd (Parity) Function • N variable XOR function is the odd function defined as the logical sum of all minterms whose binary numerical values have an odd number of 1’s. For n=3, 4 minterms have odd number of 1’s.

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Maximum Satisfiability (Max-SAT)

MSAT: Decide if a formula (CNF) is satisfiable

푎 ∧ (C1) (¬푎 ∨ 푏) ∧ (C2) 1 (¬푏 ∨ 푐) ∧ (C3) 2 (¬푐 ∨ 푑) ∧ (C4) 3 ¬푑 (C5)

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Maximum Satisfiability (Max-SAT)

MaxSAT: Find an interpretation to maximize the number of satisfiable clauses.

푎 ∧ (C1) (¬푎 ∨ 푏) ∧ (C2) 1 (¬푏 ∨ 푐) ∧ (C3) 2 (¬푐 ∨ 푑) ∧ (C4) 3 ¬푑 (C5)

Solution: a = true, b = true, c = true, d = true C5 is false

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Maximum Satisfiability (Max-SAT)

MaxSAT: Assign weights to clauses and find an interpretation to maximize an objective.

푎 ∧ (C1) Subject to C1 ¬푎 ∨ 푏 ∧ (C2) Subject to C2 1 4: ¬푏 ∨ 푐 ∧ (C3) = 2 2: ¬푐 ∨ 푑 ∧ (C4) Maximize 4×C3+2×C4+7×C5 3 7: ¬푑 (C5)

Solution: a = true, b = true, c = true, d = false C4 is false and Objective = 11

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Maximum Satisfiability (Max-SAT)

Increased Expressive Power for Applications

Hard Soundness Conditions + Objectives Soft Balancing Handling Modeling tradeoffs uncertainty missing data … (e.g., precision(e.g., incorrect (e.g., partial vs. scalability) specs) programs)

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