S.P. Dandamudi Guide to RISC Processors for Programmers and Engineers
▶ Provides a uniquely comprehensive introduction and guide to RISC-related concepts, principles, design philosophy, and actual programming, as well as all the popular modern RISC processors and their assembly language ▶ Integrates core concepts to processor designs and their implementations ▶ Includes MIPS simulator (SPIM) download instructions, so readers can get hands-on assembly language programming experience ▶ Presents material in a manner suitable for self-study ▶ Provides many examples and chapter introductions and summaries 2005, XVI, 388 p. 80 illus. Recently, there has been a trend toward processor design based on the RISC (Reduced Instruction Set Computer) model: Example RISC processors are the MIPS, SPARC, PowerPC, Printed book ARM, and even Intel’s 64-bit processor Itanium.
Hardcover
89,99 € | £79.99 | $109.99 ▶ This guidebook provides an accessible and all-encompassing compendium on RISC *96,29 € (D) | 98,99 € (A) | CHF 106.50 ▶ processors, introducing five RISC processors: MIPS, SPARC, PowerPC, ARM, and Itanium. Initial chapters explain the differences between the CISC and RISC designs and clearly eBook discuss the core RISC design principles. The text then integrates instruction on MIPS assembly language programming, thereby enabling readers to concretely grasp concepts Available from your bookstore or and principles introduced earlier. Readers need only have a basic knowledge of any springer.com/shop ▶ structured, high-level language to obtain the full benefits here.
MyCopy Printed eBook for just ▶ € | $ 24.99 ▶ springer.com/mycopy
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