1 Introduction to Field-programmable Gate Arrays 1.1 Introduction Electronics revolutionized the 20th century and continues to make an impact in the 21st century. The birth and subsequent growth of the computer industry, the creation of mobile telephony and the general digitization of television and radio services has largely been responsible for the recent growth. In the 1970s and 1980s, electronic systems were created by aggregating standard com- ponents such as microprocessors and memory chips with digital logic components, e.g. dedicated integrated circuits (ICs) along with dedicated input/output (I/O) components on printed circuit boards (PCBs). As levels of integration grew, manufacturing working PCBs became more com- plex, largely due to increased component complexity in terms of the increase in the number of transistors and I/O pins but also the development of multi-layer boards with up to as many as 20 separate layers. Thus, the probability of incorrectly connecting components also grew, particularly as the possibility of successfully designing and testing a working system before production was coming under increasingly limited time pressure. The problem was becoming more intense due to the difficulty that system descriptions were evolving as boards were being developed. Pressure to develop systems to meet evolving standards, or that could change after the board construction due to system alterations or changes in the design specification, meant that the concept of having a ‘fully specified’ design in terms of physical system construction and development on processor software code, was becoming increasingly unlikely. Whilst the use of programmable processors such as microcontrollers and microprocessors gave some freedom to the designer to make alterations in order to correct or modify the system after production, this was limited as changes to the interconnections of the components on the PCB, was only limited to I/O connectivity of the processors themselves. Thus the attraction of using programmability interconnection or ‘glue logic’ offered considerable potential and so the concept of field-programmableCOPYRIGHTED logic (FPL) specifically field-programmable MATERIAL gate array (FPGA) technology, was borne. 1.1.1 Field-programmable Gate Arrays FPGAs emerged as simple ‘glue logic’ technology, providing programmable connectivity between major components where the programmability was based on either antifuse, EPROM or SRAM FPGA-based Implementation of Signal Processing Systems R. Woods, J. McAllister, G. Lightbody and Y. Yi 2008 John Wiley & Sons, Ltd 2 FPGA-based Implementation of Signal Processing Systems 2,800,000 T/mm2 Chip = 700mm2* 2 Trans./Chip 100,000 T/mm Chip = 200mm2 1,000,000,000 100,000,000 10,000,000 500 T/mm2 1,000,000 Chip = 4mm2 100,000 10,000 1,000 100 * based on 65nm 2B transistor 10 Quad-Core Itanium processor see ISSC2008 1 1950 1960 1970 1980 1990 2000 2010 Figure 1.1 Moore’s law (Moore 1965) technologies (Maxfield 2004). This approach allows design errors which had only been recognized at this late stage of development to be corrected, possibly by simply reprogramming the FPGA thereby allowing the interconnectivity of the components to be changed as required. Whilst this approach introduced additional delays due to the programmable interconnect, it avoids a costly and time-consuming board redesign and considerably reduced the design risks. Like many other electronics industries, the creation and growth in the market has been driven by Moore’s law (Moore 1965), represented pictorially in Figure 1.1. Moore’s law shows that the number of transistors has been doubling every 18 months. The incredible growth has led to the creation of a number of markets and is the driving force between the markets of many electronics products such as mobile telephony, digital musical products, digital TV to name but a few. This is because not only have the number of transistors doubled at this rate, but the costs have not increased, thereby reducing the cost per transistor at every technology advance. This has meant that the FPGA market has grown from nothing in just over 20 years to being a key player in the IC industry with a market judged to be of the order of US$ 4.0 billion. On many occasions, the growth indicated by Moore’s law has led people to argue that transistors are essentially free and therefore can be exploited as in the case of programmable hardware, to provide additional flexibility. This could be backed up by the observation that the cost of a transistor has dropped from one-tenth of a cent in the 1980s to one-thousandth of a cent in the 2000s. This observation could be argued to have been validated by the introduction of hardware programmability into electronics in the form of FPGAs. In order to make a single transistor programmable in an SRAM technology, the programmability is controlled by storing a ‘1’ or a ‘0’ on the gate of the transistor, thereby making it conduct or not. This value is then stored in an SRAM cell which typically requires six transistors, involving a 600% increase for the introduction of programmability. The reality is that in an overall FPGA implementation, the penalty is nowhere as harsh as this, but it has to be taken into consideration in terms of ultimate system cost. It is the ability to program the FPGA hardware after fabrication that is the main appeal of the technology as it provides a new level of reassurance in an increasingly competitive market where ‘right first time’ system construction is becoming more difficult to achieve. It would appear that assessment was vindicated as in the late 1990s and early 2000s, when there was a major market downturn, the FPGA market remained fairly constant when other microelectronic technologies Introduction to Field-programmable Gate Arrays 3 were suffering. Of course, the importance of programmability has already been demonstrated by the microprocessor, but this represented a new change in how programmability was performed. 1.1.2 Programmability and DSP The argument developed in the previous section presents a clear advantage of FPGA technology in terms of the use of its programmability to reduce the risk of incorrectly creating PCBs or evolving the manufactured product to later changes in standards. Whilst this might have been true in the early days of FPGA technology, evolution in silicon technology has moved the FPGA from being a programmable interconnection technology to making it into a system component. If the microprocessor or microcontroller was viewed as programmable system component, the current FPGA devices must also be viewed in this vein, giving us a different perspective on system programmability. In electronic system design, the main attraction of microprocessors/microcontrollers is that it considerably lessens the risk of system development by reducing design complexity. As the hard- ware is fixed, all of the design effort can be concentrated on developing the code which will make the hardware work to the required system specification. This situation has been complemented by the development of efficient software compilers which have largely removed the need for designer to create assembly language; to some extent, this can absolve the designer from having a detailed knowledge of the microprocessor architecture (although many practitioners would argue that this is essential to produce good code). This concept has grown in popularity and embedded micropro- cessor courses are now essential parts of any electrical/electronic or computer engineering degree course. A lot of this process has been down to the software developer’s ability to exploit an underlying processor architecture, the Von Neumann architecture. However, this advantage has also been the limiting factor in its application to the topic of this text, namely digital signal processing (DSP). In the Von Neumann architecture, operations are processed sequentially, which allows relative straightforward interpretation of the hardware for programming purposes; however, this severely limits the performance in DSP applications which exhibit typically, high levels of parallelism and in which, the operations are highly data independent – allowing for optimisations to be applied. This cries out for parallel realization and whilst DSP microprocessors (here called DSPµs) go some way to addressing this situation by providing concurrency in the form of parallel hardware and software ‘pipelining’, there is still the concept of one architecture suiting all sizes of the DSP problem. This limitation is overcome in FPGAs as they allow what can be considered to be a second level of programmability, namely programming of the underlying processor architecture. By creating an architecture that best meets the algorithmic requirements, high levels of performance in terms of area, speed and power can be achieved. This concept is not new as the idea of deriving a system architecture to suit algorithmic requirements has been the cornerstone of application-specific integrated circuit or ASIC implementations. In high volumes, ASIC implementations have resulted in the most cost effective, fastest and lowest energy solutions. However, increasing mask costs and impact of ‘right first time’ system realization have made the FPGA, a much more attractive alternative. In this sense, FPGAs capture the performance aspects offered by ASIC implementation, but with the advantage of programmability usually associated with programmable processors. Thus, FPGA solutions have emerged which currently offer several