RETRO DUMB-TERMINAL RDT64-1 CIRCUIT BOARD

USER’S MANUAL

2020.11.12

Lucid Technologies http://www.lucidtechnologies.info/ Email: [email protected]

Copyright © 2020 by Lucid Technologies All rights reserved

The information in this manual has been carefully checked and is believed to be accurate. However, Lucid Technologies makes no warranty for the use of its products and assumes no responsibility for any errors which may appear in this document. Lucid Technologies reserves the right to make changes in the products contained in this manual in order to improve design or performance and to supply the best possible product. Lucid Technologies assumes no liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. RDT64, Retro Dumb-Terminal 2

CONTENTS

1.0 Introduction 1.1 Specifications 2.0 VGA Terminal Design 2.1 Counting pixels and lines 2.2 Generating the video 2.3 Video color 2.4 Video static RAM 2.5 Keyboard interface 2.6 Host serial port 3.0 Software Description 3.1 Settings 4.0 RDT64-1 Circuit Board Assembly 4.1 Preparation 4.2 Assembly checklist 4.3 Circuit board checkout 5.0 Customization

Appendix A RDT64-1 Printed Circuit Board (PCB) Parts List Appendix B RDT64-1 System Parts List Appendix C RS-232 Serial Interface Connector Appendix D PS/2 Keyboard Connector Appendix E VGA Display Connector Appendix F References Appendix G Response to Control Characters from Host Appendix H Response to Escape Sequences from Host Appendix I Character EPROM Appendix J Default Font Appendix K Schematics Appendix L Circuit Board Image RDT64, Retro Dumb-Terminal 3

1.0 Introduction

The RDT64 (Retro Dumb-Terminal) is just what the name implies. It is a classic text-only dumb-terminal. But thanks to modern components and programmable logic it packs a lot of functionality into a small package. It contains five programmable chips: two 8-bit PIC microcontrollers, two ATF16V8 generic array logic (GAL) chips, and an EPROM. Several of the ideas for the RDT64 came from the first computer I built, a digital group Z80 and its TVC-64 video card.

1.1 Specifications

! Power " +5 VDC at 300 mA " Coaxial 2.1 mm power jack, center positive ! Serial communications with Host " RS-232 levels " 8 data bits, no parity, 1 stop bit (8N1) " 9 pin, female, DCE connector " Baud rates: 1200, 2400, 4800, 9600. ! Keyboard " Standard PS/2 keyboard ! Display " Standard VGA display ! VGA signal " Modified VGA - 64 characters per line, 25 lines, 1600 characters on screen RDT64, Retro Dumb-Terminal 4

2.0 VGA Terminal Design

Anyone who has worked with computer displays knows there is not a single VGA () display format. So called “standard VGA” has an active display area 640 pixels wide by 480 pixels high. DOS text mode VGA is 640 pixels wide by 400 pixels high; 80 characters by 25 lines. The RDT64 has an active area 512 pixels wide by 400 pixels high; 64 characters by 25 lines. The horizontal timing specifications for the Standard, Text mode and RDT64 VGA are shown in Table 2.1 and the accompanying diagram.

Table 2.1 Horizontal Timing Specs

VGA TYPES “Standard” “Text Mode” RDT64 Horizontal Pixels 640 640 512 Vertical Scan Lines 480 400 400 Horizontal Sync Polarity NEG NEG NEG Pixel Clock (MHZ) 25.175 25.175 20.0 † A = Scan line time (ìs) 31.77 31.77 32.0 B = Sync pulse length (ìs) 3.81 3.81 3.6 C = Back porch (ìs) 1.9 1.9 2.0 D = Active video time (ìs) 25.42 25.42 25.6 E = Front porch (ìs) 0.64 0.64 0.8

______| VIDEO |______| VIDEO (next line) |-C-|------D------|-E-| ______|___| |___| HSYNC |-B-| |------A------|

† The ideal clock frequency for the RDT64 is 20.14 MHZ but clock oscillators at that frequency are not available. However, 20 MHZ is only 0.7% below the ideal frequency and well within the synchronization range of VGA monitors. RDT64, Retro Dumb-Terminal 5

The vertical timing specifications for the Standard, Text mode and RDT64 VGA are shown in Table 2.2 and the accompanying diagram.

Table 2.2 Vertical Timing Specs

VGA TYPES “Standard” “Text Mode” RDT64 Horizontal Pixels 640 640 512 Vertical Scan Lines 480 400 400 Vertical Sync Polarity NEG POS POS Vertical Frequency (Hz) 59.9 70.0 69.6 O = Total frame time (ms) 16.68 14.27 14.37 P = Sync pulse length (ms) 0.06 0.06 0.064 Q = Back porch (ms) 1.05 1.11 1.12 R = Active video time (ms) 15.25 12.71 12.8 S = Front porch (ms) 0.32 0.38 0.384

______| VIDEO |______| VIDEO (next frame) |-Q-|------R------|-S-| ______|___| |___| VSYNC |-P-| |------O------|

2.1 Counting pixels and lines VGA controllers are based on two counters; a horizontal or pixel counter, and a vertical or line counter. The horizontal counter (74HC4040, U11) counts the pixels in each line. Refer to Appendix K for the RDT64 schematics. Programmable logic (ATF16V8, U12) starts and ends the horizontal blanking signal (HBLANK) and the horizontal synchronization signal (HSYNC) at specific values of the pixel count. Figure 2.1 shows the structure of a VGA frame and the signals that define it. Both the horizontal and vertical blanking signals span three sub-parts: the Front Porch, the Sync, and the Back Porch. At the upper-left corner both counters equal zero. As the first scan line is sent to the VGA monitor the pixel counter increases. When the pixel counter equals 512 the HBLANK signal begins and the active (displayed) region of the line ends. When the pixel count equals 528 the HSYNC pulse begins - it ends when the pixel count equals 600. Finally, RDT64, Retro Dumb-Terminal 6 when the pixel count reaches 640, the pixel counter is reset to zero, and the line counter is incremented. Note that the HBLANK signal does not go to the VGA monitor, it is used to disable the video output of the RDT64.

Figure 2.1 Diagram of VGA frame timing.

In a similar fashion, the vertical counter (74HC4040, U6) counts the scan lines in each screen. Programmable logic (ATF16V8, U7) starts and ends the vertical blanking signal (VBLANK) and the vertical synchronization signal (VSYNC) at specific values of the line count. When the line counter equals 400 the VBLANK signal begins and the active (displayed) region of the frame ends. When the line count equals 412 the VSYNC pulse begins - it ends when the line count equals 414. Finally, the line counter is reset to zero, when the line count reaches 449. Note that the VBLANK signal does not go to the VGA monitor, it is used to disable the video output of the RDT64. The HBLANK and VBLANK signals are OR’ed together in U7 to produce the BLANK signal. BLANK is used to gate the Red, Green and Blue video signals to the VGA connector (J3). RDT64, Retro Dumb-Terminal 7

2.2 Generating the video The ASCII code for each of the 1600 characters on the screen are stored sequentially in the 6116 (2k x 8) SRAM chip (U5) and the pixel map for each of the 256 possible ASCII codes is stored in the 2764 (8k x 8) EPROM (U4). See Appendix I for details on the character EPROM. The character EPROM stores a 16 x 8 pixel character map for each ASCII code. Thus, each ASCII character occupies 16 addresses which are the 16 rows, or scan lines, in each character. Let’s look at what happens at the start of a new frame - where the pixel and line counters both equal zero. The eleven address inputs of the SRAM are controlled by the counters; pixel count bits 3 to 8 (PQ3-PQ8) connect to A0-A5 respectively. These six bits count the 64 (0-63) characters in each line. Line count bits 4 to 8 (LQ4-LQ8) connect to A6-A10 respectively. These 5 bits are the character lines; each character line is composed of 16 scan lines. So, for the start of the first line, SRAM A0-A10 are all zero and the SRAM will output the ASCII code for the first character. We’ll deal with how that ASCII code gets into the SRAM later. The 8-bit ASCII value from the SRAM connects to A4-A11 of the character EPROM. A0- A3 are connected to line count bits LQ0-LQ3 respectively. Essentially A4-A11 select the ASCII character and A0-A3 select the row (scan line) in that character’s map; 0000 is the top row and 1111 is the bottom. The eight bits in the selected character row appear at the EPROM output and are connected to the parallel data inputs of the 74HC165 parallel-to-serial shift register (U3). The data is loaded into the shift register by the parallel load (PLD\) signal from U12. PLD\ pulses on every eighth bit of the 20 MHZ clock while an inverted clock signal clocks the bits out of the serial shift register. These serialized bits are the PIXELS seen on the VGA monitor. At the end of the horizontal line, following the Back Porch, U12 pulses PQ_CLR which resets the pixel counter and increments the line counter. The process repeats but this time LQ0- LQ3 is 0001 so the character EPROM will output the second row in the character map. This continues to the end of the video frame when both the pixel and line counters are reset to zero.

2.3 Video Color VGA monitors have three video inputs, Red, Green and Blue, see Appendix E. The RDT64 uses one bit per color which can produce the eight colors shown in Figure 2.2. The RDT64 uses one color for the foreground (characters) and another for the background (blank space). The three bits that define the foreground color and the three that define the background color are six of the eight output bits from the 74HC595 parallel-port (U9). The foreground color bits go to three B-inputs on the 74HC157 quad data- selector, U10; the background color bits go to the matching A-inputs. The PIXEL signal from shift-register U3 connects to the A/B select pin on the data-selector, Thus when PIXEL is true the foreground color bits appear on the data-selector outputs and when PIXEL is false the outputs are the Figure 2.2 Three bit colors background color bits. The output of data-selector U10 is controlled by the BLANK signal connected to the output-enable pin. When BLANK is true, the outputs of the data-selector are forced low. When RDT64, Retro Dumb-Terminal 8

BLANK is false, the outputs follow the selected foreground or background color bits. The input impedance of the Red, Green and Blue pins on a VGA monitor is nominally 75 ohms and the maximum voltage input is 0.7 volt. The 470 ohm resistors on the Red, Green and Blue outputs of the data-selector form a voltage divider with the 75 ohm input impedance reducing the 5V logic signals to approximately 0.67 volt at the VGA connector.

2.4 Video static RAM The RDT64 video SRAM (U5) contains the characters displayed on the screen in the first 1600 bytes of its available 2048 bytes. During the active vertical portion of each frame the address lines to the SRAM are connected as described above. However, during the vertical blanking portion of each frame the SRAM address lines and data are controlled by the main PIC controller (PIC16F1788, U2). When the vertical logic chip (U7) sets VBLANK high at line 400, several things happen in hardware. The VBLANK signal disables the video SRAM (U5) output and selects the B-inputs on the 74HC157 quad data-selectors (U13-U15) connecting the SRAM address lines to the 74HC4040 (U16) character-counter output. Data-selector U15 connects the video SRAM write control to a PIC output line (AC_WR\). U7 also sets VIRQ at the same time as VBLANK. VIRQ remains high until line 448, VBLANK remains high until line 449. The main PIC controller (U2) maintains a copy of the ASCII characters on the screen in an internal buffer. VIRQ causes the PIC to branch to an interrupt service routine which does the following:

· Changes port-B (RB0-RB7) from inputs to outputs - this is the ACD bus · Toggles the character-counter clear line (CC_CLR) which sets the SRAM address to zero [TOP OF LOOP] · Writes the next ASCII character data to port-B – the ACD data bus · Toggles the video SRAM write control (AC_WR\) which stores the character on the ACD bus in the video SRAM · Checks VIRQ still high, else [END OF LOOP] · Checks for screen buffer remaining, else [END OF LOOP] · Toggles the character-counter clock line (CC_CLK) which increments the address to the video SRAM · GOTO [TOP OF LOOP] [END OF LOOP] · Changes port-B (RB0-RB7) from outputs to inputs

VIRQ remains high for approximately 1.53 milliseconds. During this time the PIC can transfer over half the characters to the video SRAM. The PIC only toggles CC_CLR on even numbered interrupts and begins where it left off on odd numbered interrupts. Thus, it takes two VIRQ interrupts to transfer the entire screen buffer from the PIC to the video SRAM. This means the RDT64 screen updates at half the frame rate or approximately 35 Hz. RDT64, Retro Dumb-Terminal 9

The main PIC controller’s internal clock runs at 32 MHz, this makes the instruction cycle time 125 nanoseconds. Video SRAM refresh takes approximately 1.5 milliseconds every frame, or 105 milliseconds out of every second. The remainder of the time the main PIC controller polls the keyboard interface and serial port.

2.5 Keyboard interface The RDT64 interfaces with a standard PS/2 keyboard via connector J1. J1 is connected to a KB1 keyboard interface (U8) based on a PIC16F1823. The KB1 handles all signals between the RDT64 and the keyboard, decodes the keyboard scan codes and provides ASCII data to the main PIC controller (U2). The KB1 can interface with a host via IIC, SPI or UART; the RDT64 uses the SPI interface. When keyboard data is available the KB1 asserts KIRQ\. The KB1 key-stroke buffer is eight deep so no keystrokes are lost if the main PIC controller is busy refreshing the video SRAM.

2.6 Host serial port The RDT64 interfaces with a Host via connector J40, see Appendix C. Standard RS232 voltage levels are provided by the MAX232 interface chip (U40). The Host UART should be set to operate with eight data bits, no parity and one stop bit (8N1). None of the handshake lines are actively controlled by the RDT64. DTR is not connected and thus is ignored. DSR and DCD are hard-wired to the ON condition (ON = spacing = +voltage) at all times. RTS is received, buffered, and looped back to the Host as CTS; thus CTS tracks RTS.

3.0 Software On power-up the PIC computes the checksum of the settings data in the EEPROM. If the checksum is correct it applies the settings and beeps twice. If the EEPROM data is corrupt the PIC applies the default settings and beeps six times. The opening screen shown in Figure 3.1 is displayed.

Lucid Technologies RETRO DUMB-TERMINAL 64, © 2020 Firmware 20.05.28

Press Alt + F1 for setup menu

Figure 3.0 Power-up screen

3.1 Settings Holding the Alt key down and pressing F1 at any time will put the RDT64 in the setup mode and display the screen shown in Figure 3.1. Select a setup option by typing the character in brackets. After a setting is changed the setup menu will be displayed with the new setting. While in setup mode the RDT64 does not communicate with the Host. To leave the setup menu and return to normal operation type Q for Quit. The settings shown in Figure 3.1 are the default RDT64, Retro Dumb-Terminal 10 settings.

RDT64 SETUP MENU [0] Baud rate 9600 [1] Local echo Off [2] CR in translation Off [3] CR out translation On [4] Bell sound On [5] blink On [C] Cursor character _ [6] Font selected Default [V] View selected font [7] ASCII map Printable [8] Foreground color White [9] Background color Black [D] Debug mode Off [S] Save settings [Q] Quit ?

Figure 3.1 RDT64 setup menu

Typing a 0 will bring up the Select Baud Rate sub-menu. Rates of 1200, 2400, 4800 or 9600 can be selected. The new rate is effective when you Quit the setup menu. Typing a 1 will toggle the Local Echo setting. When local echo is on, any character you type will be displayed by the RDT64 and sent to the Host. If the Host then echos the character is will appear twice. When local echo is off, any character you type will be sent to the Host. It will not be displayed unless the Host echos it back to the RDT64. Typing a 2 will toggle the CR In Translation setting. When this option is on, the RDT64 will treat any carriage-return (CR) from the Host as a CR followed by a Line-Feed (LF). If this option is off a CR from the Host will have no effect on the display. Typing a 3 will toggle the CR Out Translation setting. When this option is on, the RDT64 will send a CR, LF combination to the Host whenever you type a Return. If this option is off only a CR will be sent to the Host. Typing a 4 will toggle the Bell Sound setting. If this option is on the RDT64 will produce a bell sound when the Host sends a Ctl-G (0x07) character. If this option is off, no sound will be produced. Typing a 5 will toggle the Cursor Blink setting. If this option is on the cursor will blink at approximately 1.1 Hz. If this option is off the cursor will not blink. Typing a C will bring up the Select Cursor submenu. The cursor may be an underscore (_), vertical bar ( | ), block (O), or there can be no cursor. If there is no cursor character the cursor blink setting is irrelevant. Typing a 6 will toggle the Font Selection between the Default and the Optional fonts. Font RDT64, Retro Dumb-Terminal 11

Selection is effective immediately. Typing a V will cause the entire 256 characters in the selected font to be displayed. See Figure J.1 for an example. Typing a 7 will toggle the RDT64 between use of the Printable ASCII character set (0x20- 0x7F) and the Extended ASCII character set (0x20-0xFF). See Appendix J. Typing a 8 will bring up the Select Color submenu for foreground color. Select one of the eight available colors. The RDT64 will not allow you to select the same color for foreground and background. Typing a 9 will bring up the Select Color submenu for background color. Select one of the eight available colors. The RDT64 will not allow you to select the same color for foreground and background. Typing a D will toggle the Debug Mode. Debug mode it intended to help trouble-shoot problems between the RDT64 and the Host. In Debug Mode characters to and from the Host are displayed as follows: (XX) = the hex value XX sent to Host from RDT64 XX = the hex value XX sent to RDT64 from Host For example, if you typed “Hi” followed by a Return and the Host responded with “Huh”, the display would look like: (48)(69)(0D)(0A) 48 75 68 0D 0A

Most changes are effective immediately. However the settings will only be effective until power is removed. If you want your changes to be permanent they must be stored in the main PIC controller’s EEPROM. Typing an S will save the current settings in the EEPROM. RDT64, Retro Dumb-Terminal 12

4.0 RDT64-1 Circuit Board Assembly

4.1 Preparation You will need the following tools: > A low wattage soldering pencil, approximately 10 to 20 Watts. > Flux core solder wire, organic flux core preferred. > Lead benders. > Lead/wire clippers. Before beginning assemble, carefully check the RDT64 circuit board for shorted or incomplete traces and confirm all parts against the list in Appendix A.

4.2 Assembly checklist Check the value/type of each part as you assemble the board. Clip excess lead length from each component after it's soldered. See Appendix L for parts placement. Check off the components as you go. Insert and solder the low-profile oscillator sockets for: ____ Y1

Insert and solder the low-profile IC sockets for: ____ U1 14-pin DIP ____ U2 28-pin DIP (0.3") ____ U3 16-pin DIP ____ U4 28-pin DIP (0.6") ____ U5 24-pin DIP (0.3") ____ U6 16-pin DIP ____ U7 20-pin DIP ____ U8 14-pin DIP ____ U9 16-pin DIP ____ U10 16-pin DIP ____ U11 16-pin DIP ____ U12 20-pin DIP ____ U13 16-pin DIP ____ U14 16-pin DIP ____ U15 16-pin DIP ____ U16 16-pin DIP ____ U17 8-pin DIP ____ U40 16-pin DIP

Insert and solder the following components. ____ R1 4.7 K, 1/4 W, 5% (yellow-violet-red-gold) ____ R2 10 K, 1/4 W, 5% (brown-black-orange-gold) ____ R3 10 K, 1/4 W, 5% (brown-black-orange-gold) ____ R4 10 K, 1/4 W, 5% (brown-black-orange-gold) ____ R5 15 K, 1/4 W, 5% (brown-green-orange-gold) ____ R6 4.7 K, 1/4 W, 5% (yellow-violet-red-gold) ____ R7 3.3 K, 1/4 W, 5% (orange-orange-red-gold) ____ R8 1 K, 1/4 W, 5% (brown-black-red-gold) ____ R9 10 K, 1/4 W, 5% (brown-black-orange-gold) ____ R10 470, 1/4 W, 5% (yellow-violet-brown-gold) RDT64, Retro Dumb-Terminal 13

____ R11 470, 1/4 W, 5% (yellow-violet-brown-gold) ____ R12 470, 1/4 W, 5% (yellow-violet-brown-gold) ____ R13 470, 1/4 W, 5% (yellow-violet-brown-gold) ____ R40 1.1K, 1/4 W, 5% (brown-brown-red-gold) ____ R40 1.1K, 1/4 W, 5% (brown-brown-red-gold) ____ C1 0.1 uFd, (104) radial. 0.1" lead spacing ____ C2 0.1 uFd, (104) radial. 0.1" lead spacing ____ C3 0.1 uFd, (104) radial. 0.1" lead spacing ____ C4 0.1 uFd, (104) radial. 0.1" lead spacing ____ C5 0.1 uFd, (104) radial. 0.1" lead spacing ____ C6 0.1 uFd, (104) radial. 0.1" lead spacing ____ C7 0.1 uFd, (104) radial. 0.1" lead spacing ____ C8 0.001 uFd, (102) radial. 0.2" lead spacing ____ C9 0.001 uFd, (102) radial. 0.2" lead spacing ____ C10 0.001 uFd, (102) radial. 0.2" lead spacing ____ C11 0.001 uFd, (102) radial. 0.2" lead spacing ____ C12 0.01 uFd, (103) radial. 0.2" lead spacing ____ C13 100 uFd, axial, positive lead toward square pad ____ C40 1.0 uFd, radial, (105) radial. 0.2" lead spacing ____ C41 1.0 uFd, radial, (105) radial. 0.2" lead spacing ____ C42 1.0 uFd, radial, (105) radial. 0.2" lead spacing ____ C43 1.0 uFd, radial, (105) radial. 0.2" lead spacing ____ X1 2040 piezo transducer

Unfortunately, the circuit board had some noise issues not seen in the wire-wrap prototype. These were solved with the addition of two 0.1 uFd bypass capacitors (C14 and C15) soldered on the bottom of the PCB. The bypass caps go between +5V and ground under U11 and U12. To prevent the capacitors’ leads from shorting the pins of U11 and U12, you will need to insulate their leads with shrink tubing or insulation stripped from a wire - see Figure 4.0.

Figure 4.0 C14 and C15 ____ C14 0.1 uFd (104) soldered between U11 pin-16 and U11 pin-8 ____ C15 0.1 uFd (104) soldered between U12 pin-20 and U12 pin-10 or pin-11 RDT64, Retro Dumb-Terminal 14

____ LED 2-pin header is available for a LED to indicate power is applied to the RDT64. The anode should connect to the square pad. ____ SW1 2-pin header is available for a power switch. If a power switch is not used then a jumper (included in the kit) should be placed on the pins of SW1 or a jumper should be soldered across the pads of SW1.

____ J1 Mini-DIN-6, PS/2 keyboard connector ____ J2 DC power jack for 2.1 mm coaxial connector ____ J3 Hi-density DB15, VGA connector ____ J40 DB9, RS-232 serial port connector

Inspect the bottom of the board to be sure you didn’t skip soldering any connections. The last construction step is to clean the board. If you used organic core solder rinse the board in warm water and scrub it with an old toothbrush. If you used acid core solder try scrubbing it with an old toothbrush and rubbing alcohol. Alcohol is flammable - do not clean with alcohol near an open flame or hot soldering iron.

4.3 Circuit Board Checkout You will need a multimeter and a two-channel oscilloscope to check out the RDT64 circuitry. Place the circuit board on an insulating surface. DO NOT install the integrated circuits yet. Set your multimeter to measure resistance and attach one lead to the ground test point. Refer to the schematics (Appendix K) and confirm zero ohms resistance to ground from the ground pins of all IC sockets. Repeat the procedure measuring the resistance from the 5V test point to the Vcc pins of all IC sockets. If any of the pins show a high resistance, ensure the pin is soldered. If is was soldered try re-soldering. Plug-in your +5V wall transformer and connect it to J2 on the RDT64 - note center is positive. The supply voltage should be between 4.9 and 5.1 volts at any Vcc location on the circuit board. Remove power from RDT64. Install the clock oscillator in its socket (Y1) and the 74HC04 in its socket (U1). Reapply power to the RDT64. Using your oscilloscope, you should now be able to see a 20 MHZ signal on pins 1-4 and 10-13 of the 74HC04. Remove power from RDT64. Install the remainder of the integrated circuits. Note that U1- U17 all have pin 1 toward the front of the circuit board, U40 has pin 1 on the left - see Appendix L. The PIC16F1823 keyboard interface controller (U8) may be labeled KB1 and the PIC16F1788 terminal controller (U2) may be labeled RDT64. Pay particular attention to the installation of the programmable logic chips, they can not be swapped. • U7 is the Vertical timing logic and should be labeled V. • U12 is the Horizontal timing logic and should be labeled H. After all integrated circuits are installed, connect a VGA cable between RDT64-J3 and a VGA display. Connect a PS/2 keyboard to RDT64-J1. Turn on the VGA display then apply power to the RDT64. You should hear two beeps and see the opening message on the display - if you RDT64, Retro Dumb-Terminal 15 don’t see the opening message refer to the trouble shooting section. Press Alt-F1 on the keyboard and the RDT64 SETUP MENU should appear. If it does, you have confirmed the majority of the RDT64 is working correctly. The only function not yet checked is the RS-232 serial connection. Remove power from RDT64. Connect a serial cable between RDT64-J40 and a computer running a terminal emulation program or your planned Host device. Check Appendix C to be sure your serial cable wiring is correct. Apply power to the RDT64 and your connected device. You should be able to type characters on you Host device and have them appear on the RDT64 display. Check the RDT64 SETUP MENU and your Host device’s setup to be sure the settings are compatible - such as baud rate, local echo, CR in translation, CR out translation, etc.

5.0 Customization The RDT64 circuit board does not need to be installed in the Simco 150X75 case suggested by this manual. Whether you use a different case, or no case at all, the circuit board gives you the options of: • A normally-open RESET pushbutton, which is not a very useful option. • A LED to show when power is on. • A single-pole single-throw (SPST) toggle switch to control power - instead of using J2. Another thing that is easily customized is the 2764 (U4) character generator EPROM. See Appendix I and the source code for the CROM (Character Read Only Memory) program that comes with the RDT64. You can change the optional or default fonts to be anything you want. RDT64, Retro Dumb-Terminal 16

Appendix A RDT64-1 Printed Circuit Board (PCB) Parts List

Quantity Part Reference ======

9 0.1 uFd, 0.1" LS C1-C7, C14,C15 4 0.001 uFd, 0.2" LS C8-C11 1 0.01 uFd, 0.2" LS C12 1 100 uFd, axial C13 4 1.0 uFd, 0.2" LS C40-43

2 4.7 K, 1/4 W, 5% R1, R6 (yellow-violet-red-gold) 4 10 K, 1/4 W, 5% R2-R4, R9 (brown-black-orange-gold) 1 15 K, 1/4 W, 5% R5 (brown-green-orange-gold) 1 3.3 K, 1/4 W, 5% R7 (orange-orange-red-gold) 1 1 K, 1/4 W, 5% R8 (brown-black-red-gold) 4 470, 1/4 W, 5% R10-R13 (yellow-violet-brown-gold) 2 1.1K, 1/4 W, 5% R40, R41 (brown-brown-red-gold)

1 74HC04A U1 DIP14, hex inverter 1 PIC16F1788 U2 SDIP28, microcontroller 1 74HC165 U3 DIP16, parallel to serial shift register 1 2764 U4 DIP28, 8Kx8 EPROM 1 6116SA20 U5 SDIP24, 2Kx8 SRAM 3 74HC4040 U6, U11, U16 DIP16, 12-stage binary counter 2 ATF16V8B U7, U12 DIP20, generic array logic 1 PIC16F1823(KB1) U8 DIP14, PS/2 keyboard interface 1 74HC595 U9 DIP16, SPI parallel port expander 4 74HC157 U10, U13-U15 DIP16, quad 2-to-1 multiplexor 1 NE555N U17 DIP8, timer 1 MAX232 U40 DIP16, 5V RS-232 interface 1 20 MHZ Y1 DIP8, clock oscillator RDT64, Retro Dumb-Terminal 17

Quantity Part Reference ======1 DIP8 socket U17 1 DIP8 oscillator socket Y1 2 DIP14 socket U1, U8 10 DIP16 socket U3, U6, U9-U11, U13-U16, U40 2 DIP20 socket U7, U12 1 SDIP24 socket U5 1 DIP28 socket U4 1 SDIP28 socket U2

1 Mini-DIN-6 J1 PS/2 keyboard connector 1 Power jack J2 2.1 mm coaxial connector 1 Hi-density DB15 J3 VGA connector 1 DB9 J40 RS-232 serial port connector

1 2040 X1 piezo transducer

1 2-pin header LED optional power on indicator 1 2-pin header SW1 optional power switch 1 Jumper for SW1

4 PCB mounting screws

RDT64, Retro Dumb-Terminal 18

Appendix B RDT64-1 System Parts List

In addition to the parts that come with the RDT64-1 PCB kit, shown in Appendix A, you will need a 5 volt power supply and may want to add some optional parts.

Power supply: +5VDC with 2.1 mm coaxial connector, center positive.

Power switch: Optional SPST toggle switch connected at SW1 on the PCB.

Reset button: Optional normally-open pushbutton connected at RST on the PCB.

Power LED: Optional LED indicating power is on connected at LED. Square pad is +, round pad is ground.

Case: The RDT64-1 PCB is 6 inches by 4.7 inches. It was designed to fit the Simco 150X75 case. https://www.simcobox.com/150x75-desktop-plastic-enclosure.html RDT64, Retro Dumb-Terminal 19

Appendix C RS-232 Serial Interface Connector

The table below shows the most commonly implemented signals and their pin assignments in accordance with RS-232D. Host computers are usually DTE (Data Terminal Equipment) and modems are DCE (Data Communications Equipment). Note that circuits are named from the point of view of the DTE. For example, circuit BB (receive data) is actually data transmitted by the DCE. DCE devices originally used a 25 pin, female, D connector.

Pin Circuit Description Direction 1 AA Protective ground, PG n/a 2 BA Transmit data, TD to DCE 3 BB Receive data, RD from DCE 4 CA Request to send, RTS to DCE 5 CB Clear to send, CTS from DCE 6 CC Data set ready, DSR from DCE 7 AB Signal ground, SG n/a 8 CF Data carrier detect, DCD from DCE 20 CD Data Terminal ready, DTR to DCE 22 CE Ring indicator, RI from DCE

Personal computers have migrated to the use of a 9 pin, male, D connector instead of the 25 pin connector. The pin assignments for such a DTE device are shown below.

Pin Circuit Description Direction 1 CF Data carrier detect, DCD from DCE 2 BB Receive data, RD from DCE 3 BA Transmit data, TD to DCE 4 CD Data Terminal ready, DTR to DCE 5 AB Signal ground, SG n/a 6 CC Data set ready, DSR from DCE 7 CA Request to send, RTS to DCE 8 CB Clear to send, CTS from DCE 9 CE Ring indicator, RI from DCE RDT64, Retro Dumb-Terminal 20

All Lucid Technologies products are designed as DCE devices. They use a 9 pin, female, D connector that is directly compatible with 9 pin COM ports found on personal computers. The pin assignments for this connector are shown below.

Pin Circuit Description Direction 1 CF Data carrier detect, DCD from RDT64 2 BB Receive data, RD from RDT64 3 BA Transmit data, TD to RDT64 4 CD Data Terminal ready, DTR to RDT64 5 AB Signal ground, SG n/a 6 CC Data set ready, DSR from RDT64 7 CA Request to send, RTS to RDT64 8 CB Clear to send, CTS from RDT64 9 CE Ring indicator, RI from RDT64

None of the handshake lines are actively controlled by the RDT64. DTR is not connected and thus is ignored. DSR and DCD are hard-wired to the ON condition (ON = spacing = +voltage) at all times. RTS is received, buffered, and looped back to the host as CTS; thus CTS tracks RTS. RDT64, Retro Dumb-Terminal 21

Appendix D PS/2 Keyboard Connector

PS/2 Keyboards have a male 6-pin mini-DIN connector. Therefore the RDT64-1 has a female 6-pin mini-DIN connector like that shown below. Note that various manufacturers may number the pins in different orders. Of course the position of the signals on the connector remains the same no matter how the pins are numbered.

Figure D1 Female 6-pin mini-DIN connector viewed from the front.

Table D1 Signals for the female 6-pin mini-DIN connector shown above.

Pin 1 Data Pin 2 Not Connected Pin 3 Ground Pin 4 +5V DC at 275 mA Pin 5 Clock Pin 6 Not Connected RDT64, Retro Dumb-Terminal 22

Appendix E VGA Display Connector

VGA cables typically have high-density DB15 male connectors on both ends. Therefore the RDT64-1 has a female high-density DB15 VGA connector.

Figure E1 Female high-density DB15 VGA connector.

Table E1 Signals for the female high-density DB15 connector shown above.

Pin 1 Red, 0-0.7 volts Pin 2 Green, 0-0.7 volts Pin 3 Blue, 0-0.7 volts Pin 4 Not Connected Pin 5 Ground Pin 6 Ground Pin 7 Ground Pin 8 Ground Pin 9 Not Connected Pin 10 Ground Pin11 Not Connected Pin 12 Not Connected Pin 13 Horizontal Sync, 5V logic Pin 14 Vertical Sync, 5V logic Pin 15 Not Connected Appendix F RDT64, Retro Dumb-Terminal 23

References

https://learn.sparkfun.com/tutorials/terminal-basics/serial-terminal-overview Serial Terminal Basics http://www.lucidtechnologies.info/ KB1 user manual, PS/2 keyboard interface http://www.epanorama.net/documents/pc/vga_timing.html Timing details about standard VGA cards http://faculty.lasierra.edu/~ehwang/public/mypublications/VGA%20Monitor%20Controller.pdf Build a VGA Monitor Controller, by Enoch Hwang. Circuit Cellar, Issue 172, November 2004. RDT64, Retro Dumb-Terminal 24

Appendix G Response to Control Characters from Host

Name Acronym Hex Action Null NUL 00 Ignore Start of Heading SOH 01 Ignore Start of Text STX 02 Ignore End of Text ETX 03 Ignore End of Transmission EOT 04 Ignore Enquiry ENQ 05 Return answer-back message: RDT64 Acknowledge ACK 06 Ignore Bell BEL 07 Make bell sound. Backspace BS 08 Move cursor left deleting any character there. Horizontal Tab HT 09 Move cursor right to next Tab location. Tab locations are: 8, 16, 24, 32, 40, 48, 56. Line Feed LF 0A Scroll up function [1] Vertical Tab VT 0B Scroll up function Form Feed FF 0C Scroll up function Carriage Return CR 0D Ignore or Scroll up function [2] Shift Out SO 0E Ignore Shift In SI 0F Ignore Data Link Escape DLE 10 Ignore Device Control 1 DC1 11 Ignore Device Control 2 DC2 12 Ignore Device Control 3 DC3 13 Ignore Device Control 4 DC4 14 Ignore Not Acknowledge NAK 15 Ignore Synchronous Idle SYN 16 Ignore End of Tx Block ETB 17 Ignore RDT64, Retro Dumb-Terminal 25

Cancel CAN 18 Ignore End of Medium EM 19 Ignore Substitute SUB 1A Ignore Escape ESC 1B Sequence introducer File Separator FS 1C Ignore Group Separator GS 1D Ignore Record Separator RS 1E Ignore Unit Separator US 1F Ignore Delete DEL 7F Ignore

[1] Scroll up function moves all lines up one, the top line is lost. The new bottom line is blank. The cursor is placed at the start of the bottom line. [2] Response to CR depends on the CR translation setting. If CR translation is on, a CR will trigger the scroll up function. If CR translation is off, the CR character is ignored. RDT64, Retro Dumb-Terminal 26

Appendix H Response to Escape Sequences from Host

Name Sequence ANSI or Action RDT64 ? Cursor Forward ESC [ C ANSI [1] Move cursor one space right but not past end of line. Destructive move. Cursor Back ESC [ D ANSI Move cursor one space left but not past beginning of line. Destructive move. Scroll Up ESC [ S ANSI Invoke scroll up function. Erase screen ESC [ 2 J ANSI Erase screen Reset screen ESC [ 0 m ANSI Return screen setting to default Default font ESC [ 10 m ANSI Select default font Alternative font ESC [ 11 m ANSI Select alternative font Set foreground ESC [ 3x m ANSI Selects screen foreground color. x is the ASCII color number for the desired color - see color table below. Set background ESC [ 4x m ANSI Selects screen background color. x is the ASCII color number for the desired color - see color table below. Display control ESC Q c RDT64 Display the character for the value c (0x00- character 0x1F) instead of acting on the control character. Printable ESC Q 0 RDT64 Display ASCII characters from 0x20 to 0x7E. character set Extended ESC Q 1 RDT64 Display ASCII characters from 0x20 to 0xFF, character set except for 0x7F. [1] The RDT64 does not support multiple parameters separated by semicolons in ANSI escape sequences, such as: ESC[30;47m. Instead this should be sent as two sequences: ESC[30m and ESC[47m.

Table for foreground and background color digits. Black Red Green Yellow Blue Magenta Cyan White 0 1 2 3 4 5 6 7 RDT64, Retro Dumb-Terminal 27

Appendix I Character EPROM

The Character EPROM is a 2764. This is a UV-erasable electrically-programmable read- only-memory containing 65,536 bits arranged as 8,192 bytes (8k x 8). The 2764 has thirteen address lines (A0-A12) for hex addresses 0x0000 to 0x1FFF. Each character on the screen occupies a cell which is 8 pixels wide by 16 pixels high. Each byte in the 2764 is one row of 8 pixels in a character. Address lines A0-A3 cycle through the 16 rows in a character while address lines A4-A11 select one of the 256 possible ASCII characters. This means it requires 16 times 256 bytes (4096) to store the pixel maps for all 256 characters in the extended ASCII character set. 4096 bytes is 0FFF in hex; thus the memory map for the 2764 is: • 0x0000 - 0x0FFF is the default font • 0x1000 - 0x1FFF is the optional font Address line A12 selects the default or optional font. While each character is defined in an 8 x 16 cell, normal print characters use a 7 x 15 sub- array where the right column and bottom row are blank (0) in order to have space between characters and rows. Actually, the bottom four rows of most characters are blank unless the character has descenders - like g and p. Some characters, such as box drawing, are intended to be contiguous with adjacent characters and rows so they use the full 8 x 16 cell. The example below for a capital A is from the source file for the default font.

* CHARACTER = CAPITAL A * CHAR COLUMN 01234567 FCB %00010000 *LINE 0, TOP FCB %00101000 *LINE 1 FCB %01000100 *LINE 2 FCB %10000010 *LINE 3 FCB %10000010 *LINE 4 FCB %10000010 *LINE 5, lower-case top FCB %11111110 *LINE 6 FCB %10000010 *LINE 7 FCB %10000010 *LINE 8 FCB %10000010 *LINE 9 FCB %10000010 *LINE A FCB %10000010 *LINE B, BOTTOM FCB %00000000 *LINE C, DESCENDERS FCB %00000000 *LINE D, DESCENDERS FCB %00000000 *LINE E, DESCENDERS FCB %00000000 *LINE F Appendix J Default Font RDT64, Retro Dumb-Terminal 28

ASCII Control Characters Decimal Hex Symbol Description Display Character 00 00 NUL Null Space 01 01 SOH Start of Header Face 02 02 STX Start of Text Inverted Face 03 03 ETX End of Text Heart 04 04 EOT End of Transmission Diamond 05 05 ENQ Enquiry Club 06 06 ACK Acknowledge Spade 07 07 BEL Bell Bell Icon 08 08 BS Backspace Hollow Block 09 09 HT Horizontal Tab Circle 10 0A LF Line Feed Key 11 0B VT Vertical Tab Male Symbol 12 0C FF Form Feed Female Symbol 13 0D CR Carriage Return Eighth Note 14 0E SO Shift Out Tied Sixteenth Notes 15 0F SI Shift In Starburst 16 10 DLE Data Link Escape Right-pointing Triangle 17 11 DC1 Device Control 1 Left-pointing Triangle 18 12 CD2 Device Control 2 Up and Down Arrow 19 13 CD3 Device Control 3 Double Exclamation 20 14 DC4 Device Control 4 Pilcrow Sign 21 15 NAK Negative Acknowledge Legal Section Symbol 22 16 SYN Synchronize Horizontal Bar 23 17 ETB End of Transmission Block Underlined Up/Down Arrow Decimal Hex Symbol Description Display Character RDT64, Retro Dumb-Terminal 29

24 18 CAN Cancel Up-pointing Arrow 25 19 EM End of Medium Down-pointing Arrow 26 1A SUB Substitute Right-pointing Arrow 27 1B ESC Escape Left Pointing Arrow 28 1C FS File Separator Right Angle 29 1D GS Group Separator Ankh 30 1E RS Record Separator Up-pointing Triangle 31 1F US Unit Separator Down-pointing Triangle

ASCII Printable Characters Decimal Hex Char. Decimal Hex Char. Decimal Hex Char. 32 20 33 21 ! 34 22 “ 35 23 # 36 24 $ 37 25 % 38 26 & 39 27 ‘ 40 28 ( 41 29 ) 42 2A * 43 2B + 44 2C , 45 2D - 46 2E . 47 2F / 48 30 0 49 31 1 50 32 2 51 33 3 52 34 4 53 35 5 54 36 6 55 37 7 56 38 8 57 39 9 58 3A : 59 3B ; 60 3C < 61 3D 0 62 3E > 63 3F ? 64 40 @ 65 41 A 66 42 B 67 43 C 68 44 D 69 45 E 70 46 F 71 47 G 72 48 H 73 49 I 74 4A J 75 4B K 76 4C L 77 4D M 78 4E N 79 4F O RDT64, Retro Dumb-Terminal 30

Decimal Hex Char. Decimal Hex Char. Decimal Hex Char. 80 50 P 81 51 Q 82 52 R 83 53 S 84 54 T 85 55 U 86 56 V 87 57 W 88 58 X 89 59 Y 90 5A Z 91 5B [ 92 5C \ 93 5D ] 94 5E ^ 95 5F _ 96 60 ` 97 61 a 98 62 b 99 63 c 100 64 d 101 65 e 102 66 f 103 67 g 104 68 h 105 69 I 106 6A j 107 6B k 108 6C l 109 6D m 110 6E n 111 6F o 112 70 p 113 71 q 114 72 r 115 73 s 116 74 t 117 75 u 118 76 v 119 77 w 120 78 x 121 79 y 122 7A z 123 7B { 124 7C | 125 7D } 126 7E ~ 127 7F €

ASCII Extended Characters Decimal Hex Character Description Character 128 80 Up-pointing Arrow 8 129 81 Down-pointing Arrow 9 130 82 Up-left-pointing Arrow a 131 83 Up-right-pointing Arrow _ 132 84 Down-right-pointing Arrow ` 133 85 Down-left-pointing Arrow b 134 86 Dagger † 135 87 Double Dagger ‡ RDT64, Retro Dumb-Terminal 31

Decimal Hex Character Description Character 136 88 Even number character rows 137 89 Odd numbered character rows 138 8A Character row 0 139 8B Character row 1 140 8C Character row 2 141 8D Character row 3 142 8E Character row 4 143 8F Character row 5 144 90 Character row 6 145 91 Character row 7 146 92 Character row 8 147 93 Character row 9 148 94 Character row A 149 95 Character row B 150 96 Character row C 151 97 Character row D 152 98 Character row E 153 99 Character row F 154 9A Currency symbol ¤ 155 9B Cent sign ¢ 156 9C Pound sign £ 157 9D Yen sign ¥ 158 9E Euro sign € 159 9F Function symbol ƒ 160 A0 Even character columns 161 A1 Odd character columns 162 A2 Character column 0 RDT64, Retro Dumb-Terminal 32

Decimal Hex Character Description Character 163 A3 Character column 1 164 A4 Character column 2 165 A5 Character column 3 166 A6 Character column 4 167 A7 Character column 5 168 A8 Character column 6 169 A9 Character column 7 170 AA Not equal sign 171 AB Half fraction ½ 172 AC Quarter fraction ¼ 173 AD Third fraction a 174 AE Much less than sign n 175 AF Much greater than sign o 176 B0 Shaded block, Light ! 177 B1 Shaded block, Medium # 178 B2 Shaded block, Dark $ 179 B3 Box drawing, vertical * 180 B4 Box drawing, left intersection 1 181 B5 Therefore sign ˆ 182 B6 Broken vertical bar ¦ 183 B7 Bar seven 184 B8 Copyright symbol © 185 B9 Home symbol - 186 BA Top dimension 187 BB Bottom dimension 188 BC Left dimension 189 BD Right dimension RDT64, Retro Dumb-Terminal 33

Decimal Hex Character Description Character 190 BE Hollow diamond " 191 BF Box drawing, upper-right corner , 192 C0 Box drawing, lower-left corner . 193 C1 Box drawing, up intersection 2 194 C2 Box drawing, down intersection 0 195 C3 Box drawing, right intersection / 196 C4 Box drawing, horizontal ) 197 C5 Box drawing, four-way intersection 3 198 C6 Digital logic, true or 1 199 C7 Digital logic, false or 0 200 C8 Digital logic, don’t care 201 C9 Digital logic, leading edge 202 CA Digital logic, trailing edge 203 CB Digital logic, positive trigger 204 CC Digital logic, negative trigger 205 CD Digital logic, positive transition 206 CE Digital logic, negative transition 207 CF Digital logic, don’t care transition 208 D0 Digital logic, don’t care to 1 209 D1 Digital logic, don’t care to 0 210 D2 Digital logic, 1 to don’t care 211 D3 Digital logic, 0 to don’t care 212 D4 Chevrons 213 D5 Right hatch block 214 D6 Left hatch block 215 D7 Character size box 216 D8 Full size box RDT64, Retro Dumb-Terminal 34

Decimal Hex Character Description Character 217 D9 Box drawing, lower-right corner - 218 DA Box drawing, upper-left corner + 219 DB Greek, small psi ø 220 DC Greek, capital delta Ä 221 DD Greek, small eta ç 222 DE Greek, small lambda ë 223 DF Greek, small omega ù 224 E0 Greek, small alpha á 225 E1 Greek, small beta â 226 E2 Greek, capital gamma à 227 E3 Greek, small pi ð 228 E4 Greek, capital sigma Ó 229 E5 Greek, small sigma ó 230 E6 Greek, small mu ì 231 E7 Greek, small tau ô 232 E8 Greek, capital phi Ö 233 E9 Greek, small theta è 234 EA Greek, capital omega Ù 235 EB Greek, small delta ä 236 EC Greek, capital lambda Ë 237 ED Greek, small phi ö 238 EE Greek, small epsilon å 239 EF Set intersection symbol _ 240 F0 Equivalent sign / 241 F1 Plus or minus sign ± 242 F2 Greater than or equal sign $ 243 F3 Less than or equal sign # RDT64, Retro Dumb-Terminal 35

Decimal Hex Character Description Character 244 F4 Integral sign, upper half ! 245 F5 Integral sign, lower half " 246 F6 Division sign ÷ 247 F7 Approximate sign . 248 F8 Degree symbol E 249 F9 Integral sign I 250 FA Dot product sign C 251 FB Square root % n 252 FC Exponent n 2 253 FD Exponent 2 254 FE Small block # 255 FF Space RDT64, Retro Dumb-Terminal 36

Figure J.1 Default font display RDT64, Retro Dumb-Terminal 37

Appendix K Schematics RDT64, Retro Dumb-Terminal 38 RDT64, Retro Dumb-Terminal 39 RDT64, Retro Dumb-Terminal 40 RDT64, Retro Dumb-Terminal 41

Appendix L Circuit Board Image RDT64, Retro Dumb-Terminal 42

Assembled RDT64-1 circuit board in case.