DC Bus Voltage Clamp Method to Prevent Over-Voltage Failures in Adjustable Speed Drives Lixiang Wei, Member, IEEE, Zhijun Liu, and Gary L

1778 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 47, NO. 4, JULY/AUGUST 2011 DC Bus Voltage Clamp Method to Prevent Over-Voltage Failures in Adjustable Speed Drives Lixiang Wei, Member, IEEE, Zhijun Liu, and Gary L. Skibinski

Abstract—The inﬂuences of PWM switching and long cable length on motor insulations have been discussed in numerous papers. This paper investigates their effect on the voltage insulation components inside an adjustable speed drive (ASD). This paper shows that high potential voltage insulation issue may exist on various components inside the ASD and cause earlier failures under very long cable or multiple drive conditions. A system model to describe this phenomenon is described in the paper. A dc bus voltage clamp circuit is proposed to reduce these voltage stresses. The effectiveness of this circuit is veriﬁed by both simulation and experimental results. Index Terms—Adjustable speed drive (ASD), insulation, long cable, voltage clamp circuit.

I. INTRODUCTION DVANCES in power electronics technology has enabled A the adjustable speed drive (ASD) to reach higher switching and improved controllability of voltage, current and torque. Higher switching frequency may also reduce acoustic noise. The fast dv/dt PWM switching of the inverter devices also induce high frequency ground leakage current, high shaft insulation voltage, and high levels of bearing current. Numerous Fig. 1. Schematics of a standard ASD with common mode and cable models: (a) Diagram of an ASD drive with SCR front end; (b) Components that are papers have been published to analyze these issues [1]–[11]. exposed to high voltage stresses. Chen and Lipo [1] pointed out that a net common-mode current flowing through three-phase stator windings to the axial common mode impedance external to the inverter. This is true direction produces a time-varying flux surrounding the motor for majority of applications. However, when an ASD is applied shaft. This flux induces a shaft end-to-end voltage driving a with very long cable or multiple parallel cables, common mode circulating bearing current in turn. Reference [2]–[5] analyzed capacitance of the cable and motor may be comparable or even the PWM switching and cable length effect on bearing current, higher than the common mode capacitance inside the drive. EMI emission, and motor insulation. In [4]–[12], various meth- Under this condition, high voltage stresses may be generated ods and topologies were proposed to reduce the effect of the inside the drive. Fig. 1(a) shows a typical diagram of an ASD PWM switching on motor insulation, EMI performance and to be studied with SCR based rectifier. Fig. 1(b) further shows bearing current effect; However, they cannot reduce the voltage the voltage insulation components inside the ASD. stresses inside the ASD drive. Nowadays, the physical sizes of the ASD drive and its high However, analysis of over voltage failures of components voltage components have been reduced dramatically to remain inside the drive has not been fully addressed. One simple competitive. Typical ways of reducing drive size is to replace assumption made from these references is that the common the bus bars with printed circuit board (PCB), to integrate high mode capacitance inside the drive is much higher than the voltage component with low voltage circuitry, to shrink the component sizes, and to reduce or remove unnecessary com- Manuscript received October 16, 2010; revised December 13, 2010 and ponents. All above optimizations may increase voltage stresses February 10, 2011; accepted February 17, 2011. Date of publication May 27, of these components and cause unexpected voltage failures. 2011; date of current version July 20, 2011. Paper 2010-IDC-415.R2, presented at the 2010 IEEE Energy Conversion Congress and Exposition, Atlanta, GA, This paper investigates the effects of PWM switching and September 12–16, and approved for publication in the IEEE TRANSACTIONS long cable lengths on voltage stresses of different compo- ON INDUSTRY APPLICATIONS by the Industrial Drives Committee of the IEEE nents inside the ASD. First, it categorizes the high voltage Industry Applications Society. The authors are with the Rockwell Automation-Allen Bradley, Mequon, components and how to analyze their voltage stresses. It is WI 53092 USA (e-mail: [email protected]; [email protected]; found out that the voltage stresses of the component can be [email protected]). simplified by analyzing the voltage differences between dc Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. bus terminals and the ground potential (GND). Then, a sys- Digital Object Identifier 10.1109/TIA.2011.2154352 tem model to describe this phenomenon is characterized and

0093-9994/$26.00 © 2011 IEEE WEI et al.: DC BUS VOLTAGE CLAMP METHOD TO PREVENT OVER-VOLTAGE FAILURES 1779 developed. It is found out that several potential high voltage stresses operating conditions (much higher than the dc bus voltage) may exist for some severe conditions. After that, a simple dc bus voltage clamp circuit is intro- duced to help reduce the voltage stresses. This circuit has the minimum number of components—two diodes; one capacitor; and one resistor. It clamps the voltage stresses of the ASD drive components to slightly higher than dc bus voltages. One advantage of this circuit is that it only operates when the GND is higher than dc+ or is lower than dc−. The wattage losses of the overall system and the voltage ratings of the discharging capacitors can be very low. Theory analysis, simulation and experimental result are provided in the paper to verify the effectiveness of the circuit.

II. VOLTAGE STRESSES IN ADJUSTABLE SPEED DRIVE A. High Voltage Components and Their Voltage Stresses in ASD Drive One characteristic of ASDs is to use low voltage control signals to control high voltage switching devices. Based on their functionality, there are two types of high voltage components. The first type of components are the main circuit components that transfer power from line to load side, including inverter IGBT, rectifier diode/SCR, dc link choke, dc bus capacitor, snubber capacitor, and etc. They are all located in the differential mode (DM) circuit and their voltage stresses are generally no higher than the dc bus voltage. Selection of voltage ratings for these components is straightforward. The second type of components provide protective separation between the control circuit and the main circuit, including opto-coupler, PCB, sensors, voltage/current transducer, switch mode power supply (SMPS) transformer, and etc. The high voltage (HV) sides of these components are either no higher than the positive bus or no lower than the negative bus. The low voltage (LV) sides are the control voltage that is very close to GND voltage. Therefore, the insulation voltage of the protective separation component can be approximated as the voltage between GND and the dc bus terminals. Selection of the voltage ratings for these components may be influenced by the operating condition heavily and will be analyzed.

B. Differential Mode Voltage Between DC Bus Terminals to the GND The voltage stresses between the ground and the dc bus terminals can be calculated by adding the common mode and differential mode components. For the differential mode circuit, this voltage stresses can be approximated as half the dc bus voltage for a Y grounded system. Where Fig. 2. Schematics of ASD circuit: (a) common mode circuit when choke differential mode current is non-zero; (b) common mode circuit when recitiﬁer Vdc Vdc side diode/SCR are all off; (c) ASD circuit when only one side choke (upper) Vpgpk_DM = ; Vngpk_DM = − (1) 2 2 is conducting, the other side is anti-biased; (d) inverter common mode voltage at high speed; (e) inverter common mode voltage at low speed. where Vpgpk_DM is the maximum voltage between positive dc bus and the GND in differential mode circuit, Vngpk_DM is the For a corner grounded system, the maximum voltage stresses minimum voltage between negative bus voltage and the GND between dc bus terminals to the GND can be as high as dc in differential mode circuit. bus voltage between positive bus and the GND and as low as 1780 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 47, NO. 4, JULY/AUGUST 2011

Fig. 3. Proposed clamp ciricuit is a solid Y ground system. negative dc bus voltage between negative bus to the GND as bus terminals and the inverter side components. The voltage shown in stresses of the drive components are generally higher than Fig. 2(a). − Vpgpk_DM = Vdc; Vngpk_DM = Vdc. (2) Fig. 2(c) shows the third equivalent circuits. Under this condition, only one side of the rectifier Diode/SCR is conducting. The common mode and differential mode circuit are combined C. Common Mode Voltage Between DC Bus Terminals together and cannot be separated. For the case of Fig. 2(c), and the GND where only upper side diode/SCR are conducting, the upper side voltage potential between GND and dc+ are clamped by For the common mode voltage, it is determined by the cable the input circuit. length, common mode capacitance of the ASD drive, and PWM At low speed or no load condition, the system may transit be- switching frequency. This voltage can be much higher than the tween these three conditions. As a result, the AC side common rated dc bus voltage for some cable and operating conditions as mode capacitor maybe in and out of different equivalent circuits explained in the following sections. and cause excessive voltages stresses between dc bus terminals The main objective of this paper is to investigate the voltage to GND. stresses of insulation components inside a drive; the effect The inverter common mode voltage is generated by the PWM of the PWM switching to the motor winding and bearing switching of the inverter. Fig. 2(d) shows a typical common insulations will not be discussed. As a result, the common mode mode voltage generated by the PWM inverter at high speed. model of the cable and motor is simplified as a single L–C–R From this figure, the common mode voltage increase Vdc/3 at circuit [6]. each step. When the inverter operates at low speed, the highest According to the conduction state of the input diode rectifier, common mode voltage steps generated as shown in Fig. 2(e). In there are three different simplified models of the common mode this condition, the duty ratios of all three inverter legs are close circuit for the ASD drive. to 50%. The common mode voltage may change from Vdc/2 to Figs. 2(a) and 3 show the equivalent circuit of common mode −Vdc/2 directly as shown in Fig. 2(e). circuit when the rectifier has at least one switches of the upper It should be noted that some articles have proposed common (T1/T3/T5) diode/SCR and at least one switches of the lower mode reduction PWM method (CMRPWM) for inverters [13]. diode/SCR (T2/T4/T6) conducting in the same time. Under With this method, the zero vectors 000 and 111 are eliminated this condition, the common mode circuit and differential mode to reduce the common mode stresses. Under this condition, circuit are decoupled and it has been used as an equivalent the common mode voltage only increases Vdc/3 at each step. circuit of the system for most of the reference papers. The The voltage insulation between dc bus terminals to the GND common mode stresses generated by the PWM switching will will be reduced dramatically. However, this method does not be distributed to rectifier side, dc bus, and the inverter side create the best electrical performance to the system at low components. A much less voltage stresses is generated inside speed. It generates higher current stresses to dc bus capacitor, the drive under this condition. increase the harmonics and temperature of the motor winding Fig. 2(a) is typical equivalent circuit discussed by most and increase the audible noises at low speed. In this paper, researchers. However, this is only true when the inverter is only the standard PWM control method will be discussed to operated under high loaded condition where the rectifier circuit represent the best electrical performance and the worst case for operates under continuous mode. There are two other operating insulation components inside the drive. conditions exist when the rectifier operated under discontinuous mode. Both states may generate higher voltage stresses to the drive components. D. Voltage Stresses Analysis and the Capacitance Ratio Fig. 2(b) shows an equivalent circuit of the drive when there Between ASD and the Load at Discontinuous Mode are no Diode/SCRs conducting. This operating state can be found widely when the rectifier has SCR switches. It exists For a RLC resonant circuit as shown in Fig. 2(b), a step when the system operates at light load or regenerating condition change with an amplitude of Vdc in the common mode voltage where both Diode/SCRs in the rectifier remains off state while can induce as higher as two times of Vdc voltage spike in the the inverter is switching. Under this condition, the switching capacitor Cmo and 2 ∗ Cf if the effect of the resistance can be energy in the common mode circuit only distributed to the dc neglected. Thus, the worst case common mode voltage stress in WEI et al.: DC BUS VOLTAGE CLAMP METHOD TO PREVENT OVER-VOLTAGE FAILURES 1781

mode voltage can be expressed as 4Cf Vpg = Vpgpk_DM + Vcmpk = 3 − Vdc Ccmo +2Cf 4Cf Vng = Vngpk_DM − Vcmpk = − 3 − Vdc. (5) Ccmo +2Cf Theoretically, the maximum voltage stresses existed between dc bus terminals when the common mode capacitance Cf is 0 and the inverter operated at low speed. It can reach as high as 2.5 time of the dc bus voltage for Y grounded system and 3 time of the dc bus voltage at corner grounded system. However, this value is an ideal calculation by neglecting the damping of the output common mode circuit and the common mode capacitance of the power converter. Due to the conductor resistance Fig. 4. Worst-case peak common mode voltage between GND and the bus and insulation resistance between cable and the ground, the terminals (Vdc is set as 640 V). peak voltage stress may never be able to reach this level.

III. PROPOSED VOLTAGE CLAMP METHOD capacitor Cf generated by a single common mode voltage step of Vdc (zero speed) can be calculated as Fig. 4 show the proposed voltage clamp circuit for an ASD drive. It consists of three types of components. · 2Vdc Ccmo 4Cf • Two diodes clamped between the positive and negative bus Vcmpk = = 2 − Vdc (3) Ccmo +2· Cf Ccmo +2Cf voltage. • A clamping capacitor between the neutral of the two where Cf is the common mode capacitor in dc link, the Ccmo is diodes and the GND. The snubber capacitance is generally the equivalent common mode capacitor of the cable and motor. selected to be higher than the common mode capacitance For majority of the applications, common mode ﬁlter capac- of the cables and motors. The leakage inductance between itor Cf is much higher than Ccmo. The peak common mode the capacitor to the dc bus terminal should be designed as voltage stresses of Cf are low and the voltage potential of GND low as possible. is between dc+ and dc−. The voltage stresses of the protective • A discharging resistor in parallel with the clamping insulation components are low. capacitor. For some special conditions where multiple cables or very There are three operation modes of the clamp circuit. long cables are associated, the total capacitance Ccmo may be • Standby Mode: During normal condition, the voltage of higher than common mode capacitance Cf . The peak voltage the GND is always lower than the dc+ and higher than induced in the common mode capacitor will be increased to as dc−, both diodes are anti-biased. The voltage across the high as twice the dc bus voltage. As a result, the voltage stresses RC snubber circuit is zero as shown in Fig. 5(a). of the protective separation component may be two times higher • The voltage difference between GND and bus terminal is than the dc bus voltage as shown in Fig. 4. less than Vdc = Vdc+ − Vdc−. • Clamping Mode: If the GND is either higher than dc+ or lower than the dc−, one of the diode starts to conduct. E. Overall Stresses Adding DM and CM Voltages The common mode energy will be transferred to the RC The worst case voltage stresses of between the dc bus to the snubber circuit, since the capacitance of this snubber GND adding differential mode voltage for Y grounded system circuit is selected to be much higher than the overall cable can be expressed as and motor common mode capacitance. The potential of the GND will be clamped to one of the two dc bus voltages − 4Cf (dc+ or dc ). Fig. 5(b) shows a circuit diagram at this Vpg = Vpgpk_DM + Vcmpk = 2.5 − Vdc Ccmo +2Cf mode when Vgnd is higher than Vdc+. The voltage difference between GND and bus terminal is slightly higher than 4Cf Vdc = Vdc+ − Vdc−. Vng = Vngpk_DM − Vcmpk = − 2.5 − Vdc Ccmo +2Cf • Discharging Mode: After the PWM switching transient is over, the GND potential is low than dc+ and higher (4) than the dc−. Both diodes return to off condition. The energy of the snubber capacitor is now discharged by where, Vpg/Vng is the voltage stresses between dc+ /dc− and the snubber resistor. After all energies are discharged, the GND, respectively system goes back to standby mode. The voltage difference For corner grounded system, the worst case voltage stresses between GND and bus terminal is still less than Vdc = between the dc bus terminals to the GND adding differential Vdc+ − Vdc−. 1782 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 47, NO. 4, JULY/AUGUST 2011

Fig. 5. Three operation mode of the clamp circuit: (a) standby mode; (b) clamping mode when Vgnd >Vdc+; (c) discharging mode.

To guarantee that the system goes back to standby mode during each switching cycle, the time constants of the RC snubber can be selected as much lower than the PWM frequency. Since Fig. 6. Voltage stresses of the dc+ to GND (Vpg) and dc− to GND (Vng) the resistor is only used to discharge the power, the leakage under low common mode capacitance with Y grounded system: (a) without clamp circuit and (b) with clamp circuit. inductance of the resistor is not critical as well. It should also be noted that the watt loss of the RC snubber resistor is proportional to the switching frequency of the in- Cable length: 1200 ft shielded/AWG #2 verter. The wattage of the resistor is much lower than the energy Motor: 460 V/50 hp/59.6 Arms being charged/discharged by the inverter cable capacitance. The value of the clamp circuit components are: While selecting the RC resistor, its wattage must be able to Snubber capacitor: 5 uF support the inverters to operate under the highest switching Snubber resistor: 86 Ω frequency. Diode: 1200 V/10 A rated The proposed method has the following advantages. • It has the minimum number of components, only two diodes and a RC snubber circuit is needed. A. Low Common Mode Capacitance Case • The voltage across the capacitor is zero majority of time, To verify the highest voltage stress between bus terminals the voltage stresses on the clamped capacitor is much and the GND. Common mode capacitance is manually reduced lower than other topologies. to 0.001 uF. The output speed of the inverter is set at 0 Hz during • The circuit only starts to operate when the GND potential simulation. − is higher than dc+ or lower dc . The wattage losses of Fig. 6 shows the voltage between GND and dc+ with and the discharging resistor can be much lower than any other without the clamp circuit under Y grounded system. The dc bus circuit that operates all the time. voltage of the inverter is simulated as 667 V. From this ﬁgure, it can be found that the voltage stress between dc bus terminals IV. SIMULATION RESULT VERIFICATION to GND may increase to as high as 1600 V without the clamp circuit—around 2.4 time of the dc bus voltage. The high voltage Several potential high voltage stress cases are studied in stress as estimated in Section II is clearly veriﬁed. With the simulation SIMPLORER. During the study, the drive and motor clamp circuit, the voltage drops to around 700 V as shown in data used are shown below. Fig. 6(b). The voltage stresses reduces 900 V with the clamp ASD drive rating: 480 V/75 hp circuit added. Switching frequency: 4 kHz Fig. 7 further shows the voltage between GND and dc+ with Common mode capacitance: 0.1 uF or 0.001 uF and without the clamp circuit under corner grounded system WEI et al.: DC BUS VOLTAGE CLAMP METHOD TO PREVENT OVER-VOLTAGE FAILURES 1783

− Fig. 7. Voltage stresses of the dc+ to GND (Vpg) and dc to GND (Vng) Fig. 8. Voltage waveform of the single drive simulation case, during drive under low common mode capacitance with corner grounded system: (a) without deceleration. Vclamp_cap: Voltage of the clamp capacitor. (a) Without clamp clamp circuit and (b) with clamp. circuit. (b) With clamp circuit.

C. Summary (input phase B is grounded). The dc bus voltage of the inverter is simulated as 667 V. From this figure, it can be found that the For all above cases, the voltage stresses between dc bus voltage stress between dc bus terminals to GND may increase to terminals to the GND are much higher than the dc bus voltage as high as 2000 V without the clamp circuit-around 3 time of the without the clamp circuit. After the clamp circuit is added, the dc bus voltage. The high voltage stress as estimated in Section II voltages are slightly higher than dc bus voltage. The effective- is clearly verified. With the clamp circuit, the voltage drops ness of the circuit is clearly verified. to around 700 V as shown in Fig. 7(b). The voltage stresses It should be noted that the main focus of this circuit is to reduces 1300 V with the clamp circuit added. protect the drive component from voltage failure due to PWM For both conditions, the effectiveness of clamp circuit is switching of the inverter. The voltage protection of the line side clearly verified. It helps to clamp the bus terminals to GND to transient condition such as input voltage surge can be solved by slightly higher than the dc bus voltage. other solutions. It will not be discussed in this paper.

V. E XPERIMENTAL RESULT VERIFICATION B. Voltage Stresses While Rectifier SCR Anti-Biased The effectiveness of clamp circuit is verified on a 480 V/ Under this simulation, the system is High Resistance 75 hp drive with the same parameters and Y grounded system Grounded (HRG) at the source neutral with a grounding resistor as shown in the simulation. The common mode capacitance in of 300 Ω. The common mode capacitance of the drive is set the dc link circuit is set as 0.1 uF. as the same capacitance (0.1 uF) as in the drive. Fig. 8 shows Fig. 9 show the voltage between GND and dc+ during the the voltage between GND and dc+ with and without the clamp acceleration with and without the clamp circuit. It can be found circuit for the single drive case during drive deceleration. The that this voltage may increase to as high as 1112 V without the waveforms are taken at about drive output frequency of about clamp circuit. With the clamp circuit applied, the voltage drops 0 Hz and also the SCRs at the lower legs of the rectifier being to 740 V. The voltage stress reduces almost 400 V under this turned off. It can be seen that this voltage may increase to condition. as high as 1134 V without the clamp circuit. With the clamp Fig. 10 further shows the voltage between GND and dc+ circuit, the voltage drops to 683 V. The voltage stress reduces during the deceleration with and without the clamp circuit. 451 V by the clamp circuit. Again, it can be found that the voltage between GND and bus 1784 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 47, NO. 4, JULY/AUGUST 2011

Fig. 9. Voltage stresses between GND and bus terminal during acceleration. Fig. 10. Voltage stresses between GND and bus terminal during deceleration. (a) Ch1: voltage between GND and dc+. (b) Ch1: 500 V/div voltage between (a) Ch1: voltage between GND and dc+. (b) Ch1: 500 V/div voltage between GND and dc+, Ch2: 10 V/div clamp circuit capacitor voltage, Vclamp_cap. GND and dc+, Ch2: 10 V/div clamp circuit capacitor voltage: Vclamp_cap. terminal is reduced from 1092 V to 740 V. The effectiveness of grounding of the system, PWM control method and snubber the clamp circuit is clearly verified. circuit was performed. The influence of the dc clamp circuit to From Figs. 7(b) and 10(b), it can also be verified that the ground current under different configurations was discussed. voltage stresses of the snubber capacitor Vclamp_cap is less than 30 V. A very low voltage capacitor can be selected to reduce the cost. REFERENCES [1] S. Chen, T. A. Lipo, and D. Fitzgerald, “Source of induction motor bearing currents caused by PWM inverters,” IEEE Trans. Energy Con- VI. CONCLUSION vers., vol. 11, no. 1, pp. 25–32, Mar. 1996. [2] D. Busse, R. J. Kerkman, J. Erdman, D. Schlegel, and G. Skibinski, This paper investigated the effect of PWM switching into “Bearing currents and their relationship to PWM drives,” IEEE Trans. long motor cables on the voltage stresses of different compo- Power Electron., vol. 2, no. 2, pp. 243–252, Mar./Apr. 1997. [3] R. J. Kerkman, D. Leggate, and G. Skibinski, “Interaction of drive nents inside an ASD. It was shown that a potential voltage modulation and cable parameters on AC motor transients,” IEEE Trans. insulation problem may exist on certain ASD components and Ind. Appl., vol. 33, no. 3, pp. 722–731, May/Jun. 1997. cause insulation failures under several extreme operating condi- [4] G. Skibinski, D. Leggate, and R. J. Kerkman, “Cable characteristics and their influence on motor over voltage,” in Proc. IEEE Appl. Power tions. A dc bus voltage clamp circuit was proposed to mitigate Electron. Conf., Atlanta, GA, Feb. 23–27, 1997, pp. 114–121. the increased stresses. Simulation and experimental result were [5] G. Skibinski, R. J. Kerkman, and D. Schlegel, “EMI emissions of provided to verify its effectiveness. With the proposed clamp modern PWM AC drives,” IEEE Ind. Appl. Mag., vol. 5, no. 6, pp. 47– 80, Nov./Dec. 1999. circuit, the voltage between the GND and dc bus terminals [6] S. Ogasawara, H. Ayano, and H. Akagi, “An active circuit for cancellation are all clamped to the slightly higher than the value dc bus of common-mode voltage generated by a PWM inverter,” IEEE Trans. voltage. Power Electron., vol. 13, no. 5, pp. 835–841, Sep. 1998. [7] A. Julian, G. Oriti, and T. Lipo, “Elimination of common-mode voltage in To fully understand the voltage stresses inside the ASD drive, three phase sinusoidal power converters,” IEEE Trans. Power Electron., detailed study of the bus to GND voltage as a function in input vol. 14, no. 5, pp. 982–989, Sep. 1999. WEI et al.: DC BUS VOLTAGE CLAMP METHOD TO PREVENT OVER-VOLTAGE FAILURES 1785

[8] M. M. Swamy, K. Yamada, and T. Kume, “Common mode current Zhijun Liu received the B.S. and M.S. degrees attenuation techniques for use with PWM drives,” IEEE Trans. Power in electrical engineering from Harbin Institute of Electron., vol. 16, no. 2, pp. 248–255, Mar. 2001. Technology, Harbin, China, in 1982 and 1985, [9] Y. C. Son and S. K. Sul, “A new active common-mode ﬁlter for PWM respectively, and the D.Eng. degree from Cleveland inverter,” IEEE Trans. Power Electron., vol. 18, no. 6, pp. 1309–1314, State University, Cleveland, OH, in 1993. Nov. 2003. From 1993 to 1995, he was an Electrical En- [10] D. Hyypio, “Mitigation of bearing electro-erosion of inverter-fed motors gineer at Electric Systems, Inc., Chattanooga, TN. through passive common-mode voltage suppression,” IEEE Trans. Ind. Since 1995, he has been employed with Rockwell Appl., vol. 41, no. 2, pp. 576–583, Mar./Apr. 2005. Automation-Allen Bradley, Mequon, WI, where he [11] H. Akagi and T. Doumoto, “An approach to eliminating high-frequency is currently a Project Engineer in the Systems and shaft voltage and leakage current from an inverter-driven motor,” IEEE Solutions Business. His research interests are in the Trans. Ind. Appl., vol. 40, no. 4, pp. 1162–1169, Jul./Aug. 2004. areas of power electronics and ac drives, control systems and algorithms, [12] D. Gritter and J. Reichard, “DV/DT limiting of inverter output voltage,” system modeling and analysis, and application of drive systems in industrial U.S. Patent 5 633 790, May 27, 1997. process lines. [13] A. Hava and E. Un, “Performance analysis of reduced common mode voltage PWM methods and comparison with standard PWM methods for three phase voltage source inverters,” IEEE Trans. Power Electron., vol. 24, no. 1, pp. 241–252, Jan. 2009. Gary L. Skibinski received B.S. and M.S. degrees in electrical engineering from the University of Lixiang Wei (S’98–A’00–M’03) was born in China Wisconsin, Milwaukee, and the Ph.D. degree from in 1973. He received the Ph.D. degree in electri- the University of Wisconsin-Madison, Madison, in cal engineering from the University of Wisconsin- 1976, 1980, and 1992, respectively. Madison, Madison, in 2003. From 1976 to 1980, he was an Electrical Engineer He is currently employed as a Principal Engi- working on naval nuclear power converters at Eaton. neer with Standard Drive Division of Rockwell From 1981 to 1985, he worked as Senior Project En- Automation-Allen Bradley, Mequon, WI. He has gineer at Allen-Bradley on servo controllers. During involved in research and development of power elec- the Ph.D. program, he was a Consultant for UPS tronics and motor drive area for over 10 years. He is and switch-mode power supply products at R.T.E. the author of more than 30 international journal and Corporation He is currently Engineering Fellow at Rockwell Automation-Allen conference papers and received three IAS committee Bradley, Mequon, WI. His current interests include power semiconductors, paper prizes. He is also the author of 12 U.S. patents and has more than power electronic applications, and high-frequency high-power converter cir- 30 other U.S. patents pending. His main research areas are power converter cuits for ac drives. He is the holder of 29 U.S. patents, published articles design, thermal analysis of multiple-chip power modules, ﬁlter and magnetic in two IEEE press books, published over 80 articles in professional journals/ design, low power and high power converter design, and various motor control conferences with nineteen being prize awards and is a registered PE in the state systems. of Wisconsin. Dr. Wei is currently the Chair of Industrial Power Converter Committee of Dr. Skibinski is the Chairman of IEEE Std. 518 Guide for the Installation of IEEE Industry Application Society. Electrical Equipment to Minimize Electrical Noise.