Structural Parameters Improvement of an Integrated HBT in a Cascode Configuration Opto- Electronic Mixer

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Structural parameters improvement of an integrated HBT in a cascode configuration opto- electronic mixer

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Please note that terms and conditions apply. Vol. 34, No. 9 Journal of Semiconductors September 2013

Structural parameters improvement of an integrated HBT in a cascode configuration opto-electronic mixer

Hassan Kaatuzian, Hadi Dehghan Nayeri, Masoud Ataei, and Ashkan Zandi

Photonics Research Laboratory (PRL), Electrical Engineering Department, AmirKabir University of Technology, Hafez Avenue No. 424, Tehran-15914, Iran

Abstract: We analyze an integrated electrically pumped opto-electronic mixer, which consists of two InP/GaInAs hetero junction bipolar transistors (HBT), in a cascode configuration. A new HBT with modified physical structure is proposed and simulated to improve the frequency characteristics of a cascode mixer. For the verification and calibrating software simulator, we compare the simulation results of a typical HBT, before modifying it and com- paring it with empirical reported experiments. Then we examine the simulator on our modified proposed HBT to prove its wider frequency characteristics with better flatness and acceptable down conversion gain. Although the idea is examined in several GHz modulation, it may easily be extended to state of the art HBT cascode mixers in much higher frequency range.

Key words: cascode; down conversion gain; mixer; opto-electronic; photo HBT; simulation DOI: 10.1088/1674-4926/34/9/094001 EEACC: 2570

1. Introduction

Opto-electronic mixers (OEMs) based on InP/GaInAs HBT are attractive components for optical sub carrier multi- plexed systemsŒ1. InP/GaInAs HBTs exhibit a large inherent nonlinearityŒ2 that’s a key property for mixing operation efficiency. Both single and cascode configuration of HBTs have been examined for better performances in frequency response. In this paper, first of all, in Section 2, we develop a software simulator, to simulate behaviors of a cascode opto-electronic mixer which has already been fabricated and empirically tested by Betser et al.Œ3. In Sections 3 to 5, we use the experimental results to verify our software with suitable fitting parameters. Then in Section 6, we take a further look at the physical struc- Fig. 1. T model for bipolar transistor. ture of a typical HBT to modify its physical dimensions in a way to obtain better performances. Physical dimensions are converted into Y -parameters (systematic model), and then this model is used in our developed software to prove better performances of the new proposed HBT. We also have a conclusion section.

2. Setting up a simulation work space

The model we used for simulation was based on the P-SPICE charge control model. The P-SPICE large-signal modelŒ4 is based on the T model shown in Fig. 1. The following relationships are used in this modelŒ4: Fig. 2. P-SPICE model for transistor. Is Ä Â VBE Ã Is Ä ÂVBC Ã ib exp 1 exp 1 ; (1) D ˇF nVT C ˇR nVT

Ä Â VBE Ã Ä ÂVBC Ã iB and iC are obtained from the T model expressed before iT Is exp 1 Is exp 1 ; (2) D nVT nVT in Fig. 1: iT is a controlled current source that is controlled with base– emitter and base–collector voltages. The complete model that Is Â VBC Ã is used in the large-signal P-SPICE model is shown in Fig. 2. iC iT exp 1 ; (3) D ˇR nVT † Corresponding author. Email: [email protected] Received 13 February 2013, revised manuscript received 17 March 2013 © 2013 Chinese Institute of Electronics

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Table 1. Values of the equivalent circuit components. ˇF Is CBC CBE0 n 130 36.2 fA 43 fF 100 fF 1.217 1.8 ps

Fig. 3. P-SPICE model for transistor used for our simulation.

Â Is ÃÂ VBE Ã iE iT exp 1 : (4) D C ˇF nVT Base–emitter and base–collector capacitances are variable Fig. 4. Schematic diagram of the epitaxial layer structure and mesa capacitances which include both diffusion and depletion capac- structure. The optical window is located on the base mesa. itances. The diffusion part of base–emitter capacitance is expressed as:

Cde Fgm; (5) D in which

W 2 F ; (6) D 2Dn and the depletion part can be expressed asŒ4: Fig. 5. Experimental setup for measuring the opto-electronic cascode Cje0 mixer. Cje 2Cje0: (7) D V m Š Â1 BE Ã V0e ˇ is the collector current gain. Base collector capacitance W is the base width and Dn is the diffusivity of electrons is reported to be 43 fFŒ3. Values of the equivalent circuit com- in base. ponentsŒ3 are shown in Table 1. Our model is the mentioned model in Fig. 2 that is to some extent simplified. The above model works in both active and saturation regimes, but our research is confined to the active 3. Experimental arrangement mode, so the model for the transistor can be simplified. In A schematic diagram of the epitaxial layer structure and Ref. [3] the base emitter capacitor is expressed as: mesa structure is shown in Fig. 4. The epitaxial layers were grown on a semi-insulating substrate by a compact molecular VBE Is exp beam epitaxy (MBE). The emitter and base dimensions were VT 2 2 CBE CBE0 2Cje0: (8) 4 11 m and 9 23 m respectively. Obtained FT and D C VT Š Fmax of the single device were 70 and 50 GHz respectively. is the collector-to-emitter transit time, and CBE0 is the Small signal S-parameters of the single device and the cas- base–emitter capacitance for VBE 0. Œ3 D code pair were measured up to 40 GHz . The schematic dia- The model we used for the transistor is shown in Fig. 3. gram of the experimental arrangement is shown in Fig. 5. The Œ5 RBi is the intrinsic base resistance that is expressed as : 5 6 m2 optical window was located on the base mesa of HBT Q1 in Fig. 5. 1 We RBi b ; (9) The light detection, mixing and amplifying were per- D 12 LeXb formed by HBT Q1, while HBT Q2 served as a low input re- Œ5 in which b is the resistivity of the base material : sistance unity. In Fig. 5 the base of Q1 is the input port and collector of HBT Q2 is the output. A 50 local oscillator and 1 a DC voltage source were connected via bias T to the base port. b : (10) D qbNb The output power was measured using a spectrum analyzer. The base of HBT Q2 was connected to a dc voltage source us- We, Le and Xb are emitter width, emitter length and base thickness. ing a DC probe with a 120 pF capacitor to provide a radio frequency (RF) ground. A distributed feedback laser emitting at The diode relationship is expressed as: 1.55 m was externally modulated by a Mach Zender modula-

VBE tor. The modulated light was amplified using an erbium doped ib Is exp : (11) fiber amplifier (EDFA). The light was focused onto the opti- D nVT

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Fig. 6. Schematic of the simulation of single HBT mixer. cal window using a microscope. The modulation index was reported to be 27% ( 6:7 dB). In the experiment an average optical power typically of about –15.3 dBm is incident on HBT’s optical window. Both intrinsic and extrinsic conversion gains Fig. 7. Down conversion gain comparison of simulation results and are useful figures of merit. experimental results. The intrinsic conversion gain Gint is defined as the ratio of the output power to Pprime, the primary photo-detected RF power. Pprime is the photo induced RF electrical power detected by the base–collector junction that was measured by shorting the base–emitter junction. The extrinsic conversion gain is defined as the ratio of the output power of up or down converted signal to the equivalent electrical RF power Pin that would have been detected by an ideal photo diode with equal load resistance. The relation between the incident peak modulated com- ponent of the optical power, Pmod, and the equivalent electrical 2 RLOAD input power is pin .qPmodhv/ Á, where q is the elec- D 2 tric charge, hv is the photon energy and RLOAD 50. Pprime D and Pin are related by the external quantum efficiency of the 2 base–collector photo diode (), Gext Gint . The external quantum efficiencyŒ6 was reported toD be 29% or 2 Fig. 8. Schematic of the simulation for cascode pair and comparison –10.8 dBŒ3. D D with experiment. 4. Simulation of the experiment of single HBT sults, because our simulator doesn’t take into account the sat- The simulation is based on the previous transistor uration effects. The figure shows that for various VBEs down schematic. Here we used an inductance and capacitance with conversion gain varies widely with base emitter bias, because large magnitude for simulating bias T of the base. The out- of the nonlinearity effect of input impedance that varies widely put bias T is omitted for simplification of calculations. The with base–emitter bias (the mixing efficiency is dependant on schematic of the simulation is shown in Fig. 6. the nonlinearity of the circuit). For single HBT mixer RBi was calculated from Eq. (9) to be 31 . The current source IOPT is the representation of photo- 5. Simulation of the experiment of the cascode induced current that is produced in the base. The current source Œ7 HBT mixer IOPT is a sinusoidal current source with 3 GHz frequency . For every VBE, the base–emitter capacitance CBE is calculated As in the previous section, the bias T components are from Eq. (8). VLO is a sinusoidal voltage source with 3.5 GHz shown with an inductance and a capacitance and for simplifica- frequency. The diode relationship is that mentioned in Eq. (11). tion the output base T is omitted. Schematic of the simulation CBC was 43 fF in simulation and LT and CT are bias T compo- for the cascode pair and comparison with experiment is shown nents. The current controlled current source, is the diode cur- in Fig. 8. rent multiplied by ˇ. The simulation was repeated for various The base of Q2 is connected to a 2 V DC voltage source. Vbe’s. After this section the simulation results were compared The simulation was repeated for various VBE. Then the simula- to the experimental results. A simulation fitting coefficient was tion results were compared with the experimental results. A fit- exerted on the simulation results. Figure 7 shows the compar- ting coefficient was exerted on the simulation results. Figure 9 ison of simulation results and experimental results in one dia- shows the comparison of simulation results and experimental gram. results in one diagram. In Fig. 7, down conversion gain is plotted versus base– In Fig. 9 down conversion gain is plotted versus base- emitter voltage. The figure shows that the maximum power emitter voltage. The figure shows that the maximum power gain can be obtained in VBE 0.78 V. In large base–emitter gain can be obtained in VBE 0.8 V. The figure shows that for D D voltages, simulation can’t show the drop of experimental re- various VBEs, down conversion gain varies widely with base

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Fig. 10. hybrid- model used for an HBT.

time. ! is the frequency in which the transistor is working multiplied by 2. Cje is the base–emitter capacitance:

"s Cje AE ; (16) D XdepE Fig. 9. Comparison of simulation results and experimental results for cascode pair. where AE is the emitter area, "s is the dielectric constant of the emitter and XdepE is the depletion thickness of base–emitter junction: emitter bias; this is because of the nonlinearity effect of input s 2"s impedance that varies widely with base–emitter bias (the mix- XdepE .BE VBE/; (17) ing efficiency is dependant on the nonlinearity of the circuit). D qNE

where NE is the emitter doping. BE is the built-in potential of 6. Improving the transistor function the base–emitter junction:

For hetero junction bipolar transistors, one of the important BE Eg emitter EV : (18) D j jemitter base parameters for verifying small signal parameters is the base, j collector and emitter materials. Function of this kind of tran- Eg emitter is the band gap of the emitter and EV emitter base j j j sistors is based on the difference between base and emitter en- is the difference between emitter and base valence bands’ energy band gaps. Double hetero junction transistors use different ergy. Cjc is the base collector capacitance: kinds of materials for both the emitter and the collector from "s the base, whereas in common HBTs, base and collector mate- Cjc Ac : (19) D X rials are the same and differ from the emitter. dep

The common emitter y-parameters of a typical single HBT AC is the collector junction area; Xdep is the depletion may be described using physical parameters, then we are able thickness of the base collector junction: to convert physical parameters to small signal parameters. Here Œ5 we only bring the results : s 2"s Xdep .CB VCB/: (20) !Tm ! D qNC C 2ge.1 ˛T0/ j!.Cje Cjc/ jge jge j!Cjc3 C C C 2 C !0 Œy : e 6 7 NC is the collector doping. CB is the built-in potential of D Ä ! !m 4 ˛T0ge 1 j.1 m/ exp j!Cjc j!Cjc 5 !0 2 the base–collector junction: (12) Now we define the parameters that are used in the rela- Eg.base/ kT NC CB ln : (21) tionship of Eq. (12). ge is the emitter transconductance that is D 2 C q ni defined as: qIE ni is the collector intrinsic carrier concentration. m is the ge ; (13) D nKT collector transit time. where q is the electron charge, IE the emitter current, n the Xdep m : (22) ideality factor, k Boltzmann constant and T the absolute tem- D Vsat perature. ˛T0 is the DC base transport factor (zero means at zero frequency) and is given by: Vsat is the saturation velocity; !0 is the base transit frequency: X 2 2Dn ˛ 1 B ; (14) !0 : (23) T0 2 D X 2 D 2Ln b where X is the base thickness and L is the diffusion length This model can be converted to hybrid- model. The B n of the minority electron in the base and is given by: hybrid- model is shown in Fig. 10. In Fig. 10 RBi is the base parasitic resistance:

Ln pDnBn; (15) D 1 We RBi b ; (24) D 12 L X where DnB is the diffusion coefficient of the minority electron e b in the base and n is the minority electron recombination life where b is the base resistivity:

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Table 2. Set of physical dimensions for our new proposed HBT device. Xb We Le Ac 400 Å 4 m 4 m 200 m2

Table 3. Comparison between some equivalent circuit components in this work and Ref. [3]. Parameter CBC CBE0 ˇF Ref. [3] 43 fF 100 fF 130 This work 33 fF 44 fF 146.6

Fig. 11. Down conversion gain of single HBT mixer versus RF frequency.

Fig. 13. New proposed transistor schematic.

Fig. 12. Down conversion gain of cascode HBT mixer versus RF frequency.

1 b : (25) D qpNb

Nb is the base doping. We and Le are emitter width and length respectively. ˇdc is the dc current gain:

DnBXeNe EV Fig. 14. Down conversion gain of new proposed single HBT mixer ˇdc exp : (26) D DpEXbNb kT=q versus RF frequency and comparison with previous transistor.

Usually ˇdc is a large number. m is a constant between 0 and 1, typically equal to 0.66. Using these relationships we wrote a program that converts physical parameters to y- a wider bandwidth operation of single and cascode mixer. The parameters and h-parameters. This program enabled us to ver- set of parameters which are changed are shown in Table 2. ify the effects of changing several physical parameters. We first New proposed transistor schematic is shown in Fig. 13. verified the transistor that was used in the experiment. By the Table 3 shows a comparison between some equivalent cir- hybrid- model and our simulation schematic we were able to cuit components estimated theoretically in this work, with pre- Œ3 draw the function of mixer versus RF frequency. Figures 11 vious work . It demonstrates considerably better performance and 12 show the down conversion gain versus frequency for with this new work. By the means of the new proposed tran- single and cascade HBT respectively. sistor structure the simulation was repeated and a better band- This calculation was for VBE 0.7 V and not for the max- width response was obtained. imum attainable gain base–emitterD voltage. This point was se- In Figs. 14 and 15, new diagrams for the single and cas- lected because at this point we had a coincidence between code HBT down conversion gains are plotted. These figures experimental and simulation results exactly for single HBT. demonstrate better bandwidth operation of new proposed tran- At this point we tested several physical parameters for better sistor. hybrid- parameters. We found a better set of parameters for RF frequency and comparison with previous transistor.

094001-5 J. Semicond. 2013, 34(9) Hassan Kaatuzian et al. operation was plotted and compared to the existing transistor operation.

References

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