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National HPC Task-Force Modeling and Organizational Guidelines
FP7-INFRASTRUCTURES-2010-2 HP-SEE High-Performance Computing Infrastructure for South East Europe’s Research Communities Deliverable 2.2 National HPC task-force modeling and organizational guidelines Author(s): HP-SEE Consortium Status –Version: Final Date: June 14, 2011 Distribution - Type: Public Code: HPSEE-D2.2-e-2010-05-28 Abstract: Deliverable D2.2 defines the guidelines for set-up of national HPC task forces and their organisational model. It identifies and addresses all topics that have to be considered, collects and analyzes experiences from several European and SEE countries, and use them to provide guidelines to the countries from the region in setting up national HPC initiatives. Copyright by the HP-SEE Consortium The HP-SEE Consortium consists of: GRNET Coordinating Contractor Greece IPP-BAS Contractor Bulgaria IFIN-HH Contractor Romania TUBITAK ULAKBIM Contractor Turkey NIIFI Contractor Hungary IPB Contractor Serbia UPT Contractor Albania UOBL ETF Contractor Bosnia-Herzegovina UKIM Contractor FYR of Macedonia UOM Contractor Montenegro RENAM Contractor Moldova (Republic of) IIAP NAS RA Contractor Armenia GRENA Contractor Georgia AZRENA Contractor Azerbaijan D2.2 National HPC task-force modeling and organizational guidelines Page 2 of 53 This document contains material, which is the copyright of certain HP-SEE beneficiaries and the EC, may not be reproduced or copied without permission. The commercial use of any information contained in this document may require a license from the proprietor of that information. The beneficiaries do not warrant that the information contained in the report is capable of use, or that use of the information is free from risk, and accept no liability for loss or damage suffered by any person using this information. -
UNICOS/Mk Status)
Status on the Serverization of UNICOS - (UNICOS/mk Status) Jim Harrell, Cray Research, Inc., 655-F Lone Oak Drive, Eagan, Minnesota 55121 ABSTRACT: UNICOS is being reorganized into a microkernel based system. The purpose of this reorganization is to provide an operating system that can be used on all Cray architectures and provide both the current UNICOS functionality and a path to the future distributed systems. The reorganization of UNICOS is moving forward. The port of this “new” system to the MPP is also in progress. This talk will present the current status, and plans for UNICOS/mk. The chal- lenges of performance, size and scalability will be discussed. 1 Introduction have to be added in order to provide required functionality, such as support for distributed applications. As the work of adding This discussion is divided into four parts. The first part features and porting continues there is a testing effort that discusses the development process used by this project. The ensures correct functionality of the product. development process is the methodology that is being used to serverize UNICOS. The project is actually proceeding along Some of the initial porting can be and has been done in the multiple, semi-independent paths at the same time.The develop- simulator. However, issues such as MPP system organization, ment process will help explain the information in the second which nodes the servers will reside on and how the servers will part which is a discussion of the current status of the project. interact can only be completed on the hardware. The issue of The third part discusses accomplished milestones. -
Innovatives Supercomputing in Deutschland
inSiDE • Vol. 6 No.1 • Spring 2008 Innovatives Supercomputing in Deutschland Editorialproposals for the development of soft- Contents ware in the field of high performance Welcome to this first issue of inSiDE in computing. The projects within this soft- 2008. German supercomputing is keep- ware framework are expected to start News ing the pace of the last year with the in autumn 2008 and inSiDE will keep Automotive Simulation Centre Stuttgart (ASCS) founded 4 Gauss Centre for Supercomputing taking reporting on this. the lead. The collaboration between the JUGENE officially unveiled 6 three national supercomputing centres Again we have included a section on (HLRS, LRZ and NIC) is making good applications running on one of the three PRACE Project launched 7 progress. At the same time European main German supercomputing systems. supercomputing has seen a boost. In this In this issue the reader will find six issue you will read about the most recent articles about the various fields of appli- Applications developments in the field in Germany. cations and how they exploit the various Drag Reduction by Dimples? architectures made available. The sec- An Investigation Relying Upon HPC 8 In January the European supercomput- tion not only reflects the wide variety of ing infrastructure project PRACE was simulation research in Germany but at Turbulent Convection in large-aspect-ratio Cells 14 started and is making excellent prog- the same time nicely shows how various Editorial ress led by Prof. Achim Bachem from architectures provide users with the Direct Numerical Simulation Contents the Gauss Centre. In February the fast- best hardware technology for all of their of Flame / Acoustic Interactions 18 est civil supercomputer JUGENE was problems. -
Recent Developments in Supercomputing
John von Neumann Institute for Computing Recent Developments in Supercomputing Th. Lippert published in NIC Symposium 2008, G. M¨unster, D. Wolf, M. Kremer (Editors), John von Neumann Institute for Computing, J¨ulich, NIC Series, Vol. 39, ISBN 978-3-9810843-5-1, pp. 1-8, 2008. c 2008 by John von Neumann Institute for Computing Permission to make digital or hard copies of portions of this work for personal or classroom use is granted provided that the copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. To copy otherwise requires prior specific permission by the publisher mentioned above. http://www.fz-juelich.de/nic-series/volume39 Recent Developments in Supercomputing Thomas Lippert J¨ulich Supercomputing Centre, Forschungszentrum J¨ulich 52425 J¨ulich, Germany E-mail: [email protected] Status and recent developments in the field of supercomputing on the European and German level as well as at the Forschungszentrum J¨ulich are presented. Encouraged by the ESFRI committee, the European PRACE Initiative is going to create a world-leading European tier-0 supercomputer infrastructure. In Germany, the BMBF formed the Gauss Centre for Supercom- puting, the largest national association for supercomputing in Europe. The Gauss Centre is the German partner in PRACE. With its new Blue Gene/P system, the J¨ulich supercomputing centre has realized its vision of a dual system complex and is heading for Petaflop/s already in 2009. In the framework of the JuRoPA-Project, in cooperation with German and European industrial partners, the JSC will build a next generation general purpose system with very good price-performance ratio and energy efficiency. -
UNICOS® Installation Guide for CRAY J90lm Series SG-5271 9.0.2
UNICOS® Installation Guide for CRAY J90lM Series SG-5271 9.0.2 / ' Cray Research, Inc. Copyright © 1996 Cray Research, Inc. All Rights Reserved. This manual or parts thereof may not be reproduced in any form unless permitted by contract or by written permission of Cray Research, Inc. Portions of this product may still be in development. The existence of those portions still in development is not a commitment of actual release or support by Cray Research, Inc. Cray Research, Inc. assumes no liability for any damages resulting from attempts to use any functionality or documentation not officially released and supported. If it is released, the final form and the time of official release and start of support is at the discretion of Cray Research, Inc. Autotasking, CF77, CRAY, Cray Ada, CRAYY-MP, CRAY-1, HSX, SSD, UniChem, UNICOS, and X-MP EA are federally registered trademarks and CCI, CF90, CFr, CFr2, CFT77, COS, Cray Animation Theater, CRAY C90, CRAY C90D, Cray C++ Compiling System, CrayDoc, CRAY EL, CRAY J90, Cray NQS, CraylREELlibrarian, CraySoft, CRAY T90, CRAY T3D, CrayTutor, CRAY X-MP, CRAY XMS, CRAY-2, CRInform, CRIlThrboKiva, CSIM, CVT, Delivering the power ..., DGauss, Docview, EMDS, HEXAR, lOS, LibSci, MPP Apprentice, ND Series Network Disk Array, Network Queuing Environment, Network Queuing '!boIs, OLNET, RQS, SEGLDR, SMARTE, SUPERCLUSTER, SUPERLINK, Trusted UNICOS, and UNICOS MAX are trademarks of Cray Research, Inc. Anaconda is a trademark of Archive Technology, Inc. EMASS and ER90 are trademarks of EMASS, Inc. EXABYTE is a trademark of EXABYTE Corporation. GL and OpenGL are trademarks of Silicon Graphics, Inc. -
The Gemini Network
The Gemini Network Rev 1.1 Cray Inc. © 2010 Cray Inc. All Rights Reserved. Unpublished Proprietary Information. This unpublished work is protected by trade secret, copyright and other laws. Except as permitted by contract or express written permission of Cray Inc., no part of this work or its content may be used, reproduced or disclosed in any form. Technical Data acquired by or for the U.S. Government, if any, is provided with Limited Rights. Use, duplication or disclosure by the U.S. Government is subject to the restrictions described in FAR 48 CFR 52.227-14 or DFARS 48 CFR 252.227-7013, as applicable. Autotasking, Cray, Cray Channels, Cray Y-MP, UNICOS and UNICOS/mk are federally registered trademarks and Active Manager, CCI, CCMT, CF77, CF90, CFT, CFT2, CFT77, ConCurrent Maintenance Tools, COS, Cray Ada, Cray Animation Theater, Cray APP, Cray Apprentice2, Cray C90, Cray C90D, Cray C++ Compiling System, Cray CF90, Cray EL, Cray Fortran Compiler, Cray J90, Cray J90se, Cray J916, Cray J932, Cray MTA, Cray MTA-2, Cray MTX, Cray NQS, Cray Research, Cray SeaStar, Cray SeaStar2, Cray SeaStar2+, Cray SHMEM, Cray S-MP, Cray SSD-T90, Cray SuperCluster, Cray SV1, Cray SV1ex, Cray SX-5, Cray SX-6, Cray T90, Cray T916, Cray T932, Cray T3D, Cray T3D MC, Cray T3D MCA, Cray T3D SC, Cray T3E, Cray Threadstorm, Cray UNICOS, Cray X1, Cray X1E, Cray X2, Cray XD1, Cray X-MP, Cray XMS, Cray XMT, Cray XR1, Cray XT, Cray XT3, Cray XT4, Cray XT5, Cray XT5h, Cray Y-MP EL, Cray-1, Cray-2, Cray-3, CrayDoc, CrayLink, Cray-MP, CrayPacs, CrayPat, CrayPort, Cray/REELlibrarian, CraySoft, CrayTutor, CRInform, CRI/TurboKiva, CSIM, CVT, Delivering the power…, Dgauss, Docview, EMDS, GigaRing, HEXAR, HSX, IOS, ISP/Superlink, LibSci, MPP Apprentice, ND Series Network Disk Array, Network Queuing Environment, Network Queuing Tools, OLNET, RapidArray, RQS, SEGLDR, SMARTE, SSD, SUPERLINK, System Maintenance and Remote Testing Environment, Trusted UNICOS, TurboKiva, UNICOS MAX, UNICOS/lc, and UNICOS/mp are trademarks of Cray Inc. -
Trends in HPC Architectures and Parallel Programmming
11 th Advanced School on Parallel Computing February 9-13, 2015 Bologna Trends in HPC Architectures and Parallel Programmming Giovanni Erbacci - [email protected] Supercomputing, Applications & Innovation Department - CINECA CINECA, February 9-13, 2015 11 th Advanced School on Parallel Computing February 9-13, 2015 Bologna Agenda • Computational Sciences • Trends in Parallel Architectures • Trends in Parallel Programming • HPC access offer: ISCRA and PRACE 1 11 th Advanced School on Parallel Computing February 9-13, 2015 Bologna Computational Sciences Computational science (with theory and experimentation ), is the “third pillar” of scientific inquiry, enabling researchers to build and test models of complex phenomena Quick evolution of innovation : • Instantaneous communication • Geographically distributed work • Increased productivity • More data everywhere • Increasing problem complexity • Innovation happens worldwide 2 11 th Advanced School on Parallel Computing Technology Evolution February 9-13, 2015 Bologna More data everywhere : Radar, satellites, CAT scans, weather models, the human genome. The size and resolution of the problems scientists address today are limited only by the size of the data they can reasonably work with. There is a constantly increasing demand for faster processing on bigger data. Increasing problem complexity : Partly driven by the ability to handle bigger data, but also by the requirements and opportunities brought by new technologies. For example, new kinds of medical scans create new computational challenges. -
Curriculum Vitae
CURRICULUM VITAE Name: Mateo Valero Position: Full Professor (since 1983) Contact: Phone: +34-93- Affiliation: Universitat Politécnica de Catalunya 4016979 / 6986 (UPC) Fax: +34-93-4017055 Computer Architecture Department E-mail: [email protected] Postal Address: Jordi Girona 1-3, Módulo D6 URL 08034 – Barcelona, Spain www.ac.upc.es/homes/mateo 1. Summary Professor Mateo Valero, born in 1952 (Alfamén, Zaragoza), obtained his Telecommunication Engineering Degree from the Technical University of Madrid (UPM) in 1974 and his Ph.D. in Telecommunications from the Technical University of Catalonia (UPC) in 1980. He has been teaching at UPC since 1974; since 1983 he has been a full professor at the Computer Architecture Department. He has also been a visiting professor at ENSIMAG, Grenoble (France) and at the University of California, Los Angeles (UCLA). He has been Chair of the Computer Architecture Department (1983-84; 1986-87; 1989- 90 and 2001-2005) and the Dean of the Computer Engineering School (1984-85). His research is in the area of computer architecture, with special emphasis on high performance computers: processor organization, memory hierarchy, systolic array processors, interconnection networks, numerical algorithms, compilers and performance evaluation. Professor Valero has co-authored over 600 publications: over 450 in Conferences and the rest in Journals and Books Chapters. He was involved in the organization of more than 300 International Conferences as General Chair (11), including ICS95, ISCA98, ICS99 and PACT01, Steering Committee member (85), Program Chair (26) including ISCA06, Micro05, ICS07 and PACT04, Program Committee member (200), Invited Speaker (70), and Session Chair (61). He has given over 400 talks in conferences, universities and companies. -
Financing the Future of Supercomputing: How to Increase
INNOVATION FINANCE ADVISORY STUDIES Financing the future of supercomputing How to increase investments in high performance computing in Europe years Financing the future of supercomputing How to increase investment in high performance computing in Europe Prepared for: DG Research and Innovation and DG Connect European Commission By: Innovation Finance Advisory European Investment Bank Advisory Services Authors: Björn-Sören Gigler, Alberto Casorati and Arnold Verbeek Supervisor: Shiva Dustdar Contact: [email protected] Consultancy support: Roland Berger and Fraunhofer SCAI © European Investment Bank, 2018. All rights reserved. All questions on rights and licensing should be addressed to [email protected] Financing the future of supercomputing Foreword “Disruptive technologies are key enablers for economic growth and competitiveness” The Digital Economy is developing rapidly worldwide. It is the single most important driver of innovation, competitiveness and growth. Digital innovations such as supercomputing are an essential driver of innovation and spur the adoption of digital innovations across multiple industries and small and medium-sized enterprises, fostering economic growth and competitiveness. Applying the power of supercomputing combined with Artificial Intelligence and the use of Big Data provide unprecedented opportunities for transforming businesses, public services and societies. High Performance Computers (HPC), also known as supercomputers, are making a difference in the everyday life of citizens by helping to address the critical societal challenges of our times, such as public health, climate change and natural disasters. For instance, the use of supercomputers can help researchers and entrepreneurs to solve complex issues, such as developing new treatments based on personalised medicine, or better predicting and managing the effects of natural disasters through the use of advanced computer simulations. -
RES Updates, Resources and Access / European HPC Ecosystem
RES updates, resources and Access European HPC ecosystem Sergi Girona RES Coordinator RES: HPC Services for Spain •The RES was created in 2006. •It is coordinated by the Barcelona Supercomputing Center (BSC-CNS). •It forms part of the Spanish “Map of Unique Scientific and Technical Infrastructures” (ICTS). RES: HPC Services for Spain RES is made up of 12 institutions and 13 supercomputers. BSC MareNostrum CESGA FinisTerrae CSUC Pirineus & Canigo BSC MinoTauro UV Tirant UC Altamira UPM Magerit CénitS Lusitania & SandyBridge UMA PiCaso IAC La Palma UZ CaesarAugusta SCAYLE Caléndula UAM Cibeles 1 10 100 1000 TFlop/s (logarithmiC sCale) RES: HPC Services for Spain • Objective: coordinate and manage high performance computing services to promote the progress of excellent science and innovation in Spain. • It offers HPC services for non-profit, open R&D purposes. • Since 2006, it has granted more than 1,000 Million CPU hours to 2,473 research activities. Research areas Hours granted per area 23% AECT 30% Mathematics, physics Astronomy, space and engineering and earth sciences BCV FI QCM 19% 28% Life and health Chemistry and sciences materials sciences RES supercomputers BSC (MareNostrum 4) 165888 cores, 11400 Tflops Main processors: Intel(R) Xeon(R) Platinum 8160 Memory: 390 TB Disk: 14 PB UPM (Magerit II) 3920 cores, 103 Tflops Main processors : IBM Power7 3.3 GHz Memory: 7840 GB Disk: 1728 TB UMA (Picasso) 4016 cores, 84Tflops Main processors: Intel SandyBridge-EP E5-2670 Memory: 22400 GB Disk: 720 TB UV (Tirant 3) 5376 cores, 111,8 Tflops -
System Programmer Reference (Cray SV1™ Series)
® System Programmer Reference (Cray SV1™ Series) 108-0245-003 Cray Proprietary (c) Cray Inc. All Rights Reserved. Unpublished Proprietary Information. This unpublished work is protected by trade secret, copyright, and other laws. Except as permitted by contract or express written permission of Cray Inc., no part of this work or its content may be used, reproduced, or disclosed in any form. U.S. GOVERNMENT RESTRICTED RIGHTS NOTICE: The Computer Software is delivered as "Commercial Computer Software" as defined in DFARS 48 CFR 252.227-7014. All Computer Software and Computer Software Documentation acquired by or for the U.S. Government is provided with Restricted Rights. Use, duplication or disclosure by the U.S. Government is subject to the restrictions described in FAR 48 CFR 52.227-14 or DFARS 48 CFR 252.227-7014, as applicable. Technical Data acquired by or for the U.S. Government, if any, is provided with Limited Rights. Use, duplication or disclosure by the U.S. Government is subject to the restrictions described in FAR 48 CFR 52.227-14 or DFARS 48 CFR 252.227-7013, as applicable. Autotasking, CF77, Cray, Cray Ada, Cray Channels, Cray Chips, CraySoft, Cray Y-MP, Cray-1, CRInform, CRI/TurboKiva, HSX, LibSci, MPP Apprentice, SSD, SuperCluster, UNICOS, UNICOS/mk, and X-MP EA are federally registered trademarks and Because no workstation is an island, CCI, CCMT, CF90, CFT, CFT2, CFT77, ConCurrent Maintenance Tools, COS, Cray Animation Theater, Cray APP, Cray C90, Cray C90D, Cray CF90, Cray C++ Compiling System, CrayDoc, Cray EL, CrayLink, -
Academic Supercomputing in Europe (Sixth Edition, Fall 2003)
Academic Supercomputing in Europe (Sixth edition, fall 2003) Rossend Llurba The Hague/Den Haag, januari 2004 Netherlands National Computing Facilities Foundation Academic Supercomputing in Europe Facilities & Policies - fall 2003 Seventh edition Llurba, R. (Rossend) ISBN 90-70608-37-5 Copyright © 2004 by Stichting Nationale Computerfaciliteiten Postbus 93575, 2509 AN Den Haag, The Netherlands http://www.nwo.nl/ncf All rights reserved. No part of this publication may be reproduced, in any form or by any means, without permission of the author. Contents PREFACE ..............................................................................................................................................1 1 EUROPEAN PROGRAMMES AND INITIATIVES ................................................................................3 1.1 EUROPEAN UNION...................................................................................................................................................................3 1.2 SUPRANATIONAL CENTRES AND CO-OPERATIONS. ....................................................................................................................5 2 PAN-EUROPEAN RESEARCH NETWORKING ...................................................................................7 2.1 NETWORK ORGANISATIONS......................................................................................................................................................7 2.2 OPERATIONAL NETWORKS.......................................................................................................................................................7