System Programmer Reference (Cray SV1™ Series)

Total Page:16

File Type:pdf, Size:1020Kb

System Programmer Reference (Cray SV1™ Series) ® System Programmer Reference (Cray SV1™ Series) 108-0245-003 Cray Proprietary (c) Cray Inc. All Rights Reserved. Unpublished Proprietary Information. This unpublished work is protected by trade secret, copyright, and other laws. Except as permitted by contract or express written permission of Cray Inc., no part of this work or its content may be used, reproduced, or disclosed in any form. U.S. GOVERNMENT RESTRICTED RIGHTS NOTICE: The Computer Software is delivered as "Commercial Computer Software" as defined in DFARS 48 CFR 252.227-7014. All Computer Software and Computer Software Documentation acquired by or for the U.S. Government is provided with Restricted Rights. Use, duplication or disclosure by the U.S. Government is subject to the restrictions described in FAR 48 CFR 52.227-14 or DFARS 48 CFR 252.227-7014, as applicable. Technical Data acquired by or for the U.S. Government, if any, is provided with Limited Rights. Use, duplication or disclosure by the U.S. Government is subject to the restrictions described in FAR 48 CFR 52.227-14 or DFARS 48 CFR 252.227-7013, as applicable. Autotasking, CF77, Cray, Cray Ada, Cray Channels, Cray Chips, CraySoft, Cray Y-MP, Cray-1, CRInform, CRI/TurboKiva, HSX, LibSci, MPP Apprentice, SSD, SuperCluster, UNICOS, UNICOS/mk, and X-MP EA are federally registered trademarks and Because no workstation is an island, CCI, CCMT, CF90, CFT, CFT2, CFT77, ConCurrent Maintenance Tools, COS, Cray Animation Theater, Cray APP, Cray C90, Cray C90D, Cray CF90, Cray C++ Compiling System, CrayDoc, Cray EL, CrayLink, Cray J90, Cray J90se, Cray J916, Cray J932, Cray MTA, Cray MTA-2, Cray MTX, Cray NQS, Cray/REELlibrarian, Cray S-MP, Cray SSD-T90, Cray SV1, Cray SV2, Cray T90, Cray T94, Cray T916, Cray T932, Cray T3D, Cray T3D MC, Cray T3D MCA, Cray T3D SC, Cray T3E, CrayTutor, Cray X-MP, Cray XMS, Cray-2, CSIM, CVT, Delivering the power..., DGauss, Docview, EMDS, GigaRing, HEXAR, IOS, ND Series Network Disk Array, Network Queuing Environment, Network Queuing Tools, OLNET, RQS, SEGLDR, SMARTE, SUPERLINK, System Maintenance and Remote Testing Environment, Trusted UNICOS, and UNICOS MAX are trademarks of Cray Inc. All other trademarks are the property of their respective owners. Direct requests for copies of publications to: Mail: Cray Inc. Logistics PO Box 6000 Chippewa Falls, WI 54729-0080 USA E-mail: [email protected] Web: http://techinfo.cray.com/pubscat/data/pubscat.htm Select the Order Form button that is located at the bottom of the Web page. Fax: +1 715 726 4602 Direct comments about this publication to: Mail: Cray Inc. Technical Training and Documentation P.O. Box 6000 Chippewa Falls, WI 54729-0080 USA E-mail: [email protected] Fax: +1 715-726-4991 System Programmer Reference System Programmer Reference 108-0245-003 Cray SV1 Series Last Modified: February 2002 RecordofRevision .............................................. 10 CraySV1SeriesSystemOverview.................................. 11 CraySV1eProcessor.......................................... 12 CraySV1ex-1andCraySV1ex-1ASystems ....................... 12 MainframeOverview............................................. 13 SIOOverview .................................................. 15 GigaRingOverview........................................... 15 VME-basedI/OSubsystemOverview................................ 17 NetworkInterfaces............................................... 18 MaintenancePlatform ............................................ 19 CentralMemory................................................. 19 MemoryInstructions .......................................... 20 LogicalOrganization.......................................... 22 PortUtilization............................................... 24 ConflictResolution ........................................... 27 GuaranteeingMemoryAccessOrder ............................. 30 CalculatingAbsoluteMemoryAddress............................ 32 AddressRangeChecking....................................... 33 ErrorDetectionandCorrection.................................. 34 CentralMemoryPerformanceSummary........................... 37 VMEI/OSection................................................ 39 Y1ChannelPairs............................................. 40 ErrorHandling............................................... 46 HighPerformanceParallelInterface(HIPPI) ....................... 47 GigaRingI/OSection............................................. 52 MPN-1FunctionalOverview.................................... 53 IPN-1FunctionalOverview..................................... 54 108-0245-003 Cray Proprietary 1 System Programmer Reference FCN-1andFCN-2FunctionalOverview........................... 56 HPNFunctionalOverview...................................... 57 BMN-1FunctionalOverview ................................... 58 ESN-1FunctionalOverview.................................... 59 FOXOverview............................................... 60 ErrorReportingandHandling................................... 61 InterprocessorCommunication ..................................... 62 Clusters .................................................... 62 SharedRegisters ............................................. 63 Semaphore Registers .......................................... 63 TestandSetControl........................................... 66 Deadlock ................................................... 66 InterprocessorInterrupts ....................................... 67 Real-time Clock ................................................. 68 ExchangeMechanism ............................................ 70 ExchangePackage............................................ 70 ExchangeSequence........................................... 79 ExchangePackageManagement................................. 82 InstructionFetchSequence ........................................ 83 InstructionFetchHardware..................................... 83 InstructionIssue................................................. 87 InstructionIssueHardware ..................................... 87 ReservationsandHoldIssueConditions........................... 96 ProgrammableClock............................................. 97 InterruptIntervalRegister...................................... 98 Operation................................................... 98 StatusRegister.................................................. 98 PerformanceMonitor............................................. 99 SelectingandReadingPerformanceEvents ........................ 102 Testing Performance Counters . .................................. 104 CacheMemory.................................................. 104 DetailedOperationofCacheMemory............................. 106 2 Cray Proprietary 108-0245-003 System Programmer Reference CPUComputation ............................................... 109 OperatingRegisters.............................................. 110 Address(A)Registers ......................................... 110 IntermediateScalar(T)Registers ................................ 124 Vector(V)Registers........................................... 125 VectorInstructionIssueTiming.................................. 132 Vector Instruction Issue Conflict Timing ........................... 133 VectorControlRegisters ....................................... 136 VectorLengthRegister ........................................ 137 VectorMaskRegister.......................................... 137 UserModeVectorInstructionTiming............................. 137 BitMatrixMultiply(BMM)Register ............................. 141 FunctionalUnits................................................. 141 AddressFunctionalUnits....................................... 142 ScalarFunctionalUnits........................................ 143 VectorFunctionalUnits........................................ 144 Floating-pointFunctionalUnits.................................. 147 Bit-matrixMultiplyFunctionalUnit.............................. 149 FunctionalUnitOperations........................................ 155 LogicalOperations............................................ 156 IntegerArithmetic ............................................ 157 24-bit Integer Multiplication . .................................. 157 MultiplicationofOperandsGreaterthan24Bits..................... 158 Floating-pointArithmetic ...................................... 159 ParallelProcessingFeatures ....................................... 172 PipeliningandSegmentation....................................... 173 FunctionalUnitIndependence...................................... 174 Multiprocessing and Multitasking . .................................. 175 AutotaskingFeature.............................................. 176 EnablingandDisablingtheMaintenanceMode ........................ 176 UsingMaintenanceMode ......................................... 177 CPUInstructions ................................................ 179 108-0245-003 Cray Proprietary 3 System Programmer Reference Quick-referenceTableofCPUInstructions............................ 180 Notational Conventions ........................................... 188 InstructionFormats .............................................. 188 1-parcel Instruction Format with Discrete j and k Fields............... 189 1-parcel Instruction Format with Combined j and k Fields............. 189 2-parcel Instruction Format with Combined i, j, k,andm Fields ........ 190 3-parcel Instruction Format with Combined m and n Fields............ 190 SpecialRegisterValues..........................................
Recommended publications
  • UNICOS/Mk Status)
    Status on the Serverization of UNICOS - (UNICOS/mk Status) Jim Harrell, Cray Research, Inc., 655-F Lone Oak Drive, Eagan, Minnesota 55121 ABSTRACT: UNICOS is being reorganized into a microkernel based system. The purpose of this reorganization is to provide an operating system that can be used on all Cray architectures and provide both the current UNICOS functionality and a path to the future distributed systems. The reorganization of UNICOS is moving forward. The port of this “new” system to the MPP is also in progress. This talk will present the current status, and plans for UNICOS/mk. The chal- lenges of performance, size and scalability will be discussed. 1 Introduction have to be added in order to provide required functionality, such as support for distributed applications. As the work of adding This discussion is divided into four parts. The first part features and porting continues there is a testing effort that discusses the development process used by this project. The ensures correct functionality of the product. development process is the methodology that is being used to serverize UNICOS. The project is actually proceeding along Some of the initial porting can be and has been done in the multiple, semi-independent paths at the same time.The develop- simulator. However, issues such as MPP system organization, ment process will help explain the information in the second which nodes the servers will reside on and how the servers will part which is a discussion of the current status of the project. interact can only be completed on the hardware. The issue of The third part discusses accomplished milestones.
    [Show full text]
  • CRAY X-MP Series of Computer Systems
    For close to a decade, Cray Research has been the industry leader in large-scale computer systems. Today, about 70 percent of all supercomputers installed worldwide are Cray systems. They are used in advanced scientific and research Eaboratories around the world and have gained strong acceptance in diverse industrial environments. No other manufacturer has Cray Research's breadth of success and experience in supercomputer development. The company's initial product, the CRAY-I Computer System, was first installed in 1976and quickly became the standard for large-scale scientific computers -and the first commercially successful vector processor. For some time previously, the potential advantages of vector processing had been understood, but effective practical implementation had eluded computer architects. The CRAY-1 broke that barrier, and today vectorization techniques are used commonly by scientists and engineers in a wide variety of disciplines. The field-proven GRAY X-MP Computer Systems now offer significantly more power tosolve new and bigger problems while providing better value than any other systems available. Large memory size options allow a wider range of problems to be solved, while innovative multiprocessor design provides practical opportunities to exploit multitasking, the next dimension of parallel processing beyond vectorization. Once again, Cray Research, has moved supercomputing forward, offering new levels of hardware performance and software techniques to serve the needs of scientists and engineers today and in the future. Introducing the CRAY X-MP Series of Computer Systems Announcing expanded capabilities to serve the needs of a broadening marketplace: the CRAY X-MP Series of Computer Systems. The CRAY X-MP Series now comprises nine models, ranging from a uniprocessor version with one million words of central memory to a top-end system with four processors and a 16-million-word memory.
    [Show full text]
  • Cray Product Installation and Configuration
    Cray Product Installation and Configuration Scott E. Grabow, Silicon Graphics, 655F Lone Oak Drive, Eagan, MN 55121, [email protected] ABSTRACT: The Common Installation Tool (CIT) has had a large impact upon the installation process for Cray software. The migration to CIT for installation has yielded a large number of questions about the methodology for installing new software via CIT. This document discusses the installation process with CIT and how CIT’s introduction has brought about changes to our installation process and documentation. 1 Introduction • Provide a complete replacement approach rather than an incremental software approach or a mods based release The Common Installation Tool (CIT) has made a dramatic change to the processes and manuals for installation of UNICOS • Provide a better way to ensure that relocatable and source and asynchronous products. This document is divided into four files match on site after an install major sections dealing with the changes and the impacts of the • Reduce the amount of time to do an install installation process. • Support single source upgrade option for all systems 2 Changes made between UNICOS 9.0 and Some customers have expressed that the UNICOS 9.0 instal- UNICOS 10.0/UNICOS/mk lation process is rather hard to understand initially due to the incremental software approach, the number of packages needed With the release of UNICOS 9.2 and UNICOS/mk the pack- to be loaded, and when these packages need to be installed. Part aging and installation of Cray software has undergone major of the problem was the UNICOS Installation Guide[1] did not changes when compared to the UNICOS 9.0 packaging and present a clear path as what should be performed during a installation process.
    [Show full text]
  • Vector Vs. Scalar Processors: a Performance Comparison Using a Set of Computational Science Benchmarks
    Vector vs. Scalar Processors: A Performance Comparison Using a Set of Computational Science Benchmarks Mike Ashworth, Ian J. Bush and Martyn F. Guest, Computational Science & Engineering Department, CCLRC Daresbury Laboratory ABSTRACT: Despite a significant decline in their popularity in the last decade vector processors are still with us, and manufacturers such as Cray and NEC are bringing new products to market. We have carried out a performance comparison of three full-scale applications, the first, SBLI, a Direct Numerical Simulation code from Computational Fluid Dynamics, the second, DL_POLY, a molecular dynamics code and the third, POLCOMS, a coastal-ocean model. Comparing the performance of the Cray X1 vector system with two massively parallel (MPP) micro-processor-based systems we find three rather different results. The SBLI PCHAN benchmark performs excellently on the Cray X1 with no code modification, showing 100% vectorisation and significantly outperforming the MPP systems. The performance of DL_POLY was initially poor, but we were able to make significant improvements through a few simple optimisations. The POLCOMS code has been substantially restructured for cache-based MPP systems and now does not vectorise at all well on the Cray X1 leading to poor performance. We conclude that both vector and MPP systems can deliver high performance levels but that, depending on the algorithm, careful software design may be necessary if the same code is to achieve high performance on different architectures. KEYWORDS: vector processor, scalar processor, benchmarking, parallel computing, CFD, molecular dynamics, coastal ocean modelling All of the key computational science groups in the 1. Introduction UK made use of vector supercomputers during their halcyon days of the 1970s, 1980s and into the early 1990s Vector computers entered the scene at a very early [1]-[3].
    [Show full text]
  • UNICOS® Installation Guide for CRAY J90lm Series SG-5271 9.0.2
    UNICOS® Installation Guide for CRAY J90lM Series SG-5271 9.0.2 / ' Cray Research, Inc. Copyright © 1996 Cray Research, Inc. All Rights Reserved. This manual or parts thereof may not be reproduced in any form unless permitted by contract or by written permission of Cray Research, Inc. Portions of this product may still be in development. The existence of those portions still in development is not a commitment of actual release or support by Cray Research, Inc. Cray Research, Inc. assumes no liability for any damages resulting from attempts to use any functionality or documentation not officially released and supported. If it is released, the final form and the time of official release and start of support is at the discretion of Cray Research, Inc. Autotasking, CF77, CRAY, Cray Ada, CRAYY-MP, CRAY-1, HSX, SSD, UniChem, UNICOS, and X-MP EA are federally registered trademarks and CCI, CF90, CFr, CFr2, CFT77, COS, Cray Animation Theater, CRAY C90, CRAY C90D, Cray C++ Compiling System, CrayDoc, CRAY EL, CRAY J90, Cray NQS, CraylREELlibrarian, CraySoft, CRAY T90, CRAY T3D, CrayTutor, CRAY X-MP, CRAY XMS, CRAY-2, CRInform, CRIlThrboKiva, CSIM, CVT, Delivering the power ..., DGauss, Docview, EMDS, HEXAR, lOS, LibSci, MPP Apprentice, ND Series Network Disk Array, Network Queuing Environment, Network Queuing '!boIs, OLNET, RQS, SEGLDR, SMARTE, SUPERCLUSTER, SUPERLINK, Trusted UNICOS, and UNICOS MAX are trademarks of Cray Research, Inc. Anaconda is a trademark of Archive Technology, Inc. EMASS and ER90 are trademarks of EMASS, Inc. EXABYTE is a trademark of EXABYTE Corporation. GL and OpenGL are trademarks of Silicon Graphics, Inc.
    [Show full text]
  • Through the Years… When Did It All Begin?
    & Through the years… When did it all begin? 1974? 1978? 1963? 2 CDC 6600 – 1974 NERSC started service with the first Supercomputer… ● A well-used system - Serial Number 1 ● On its last legs… ● Designed and built in Chippewa Falls ● Launch Date: 1963 ● Load / Store Architecture ● First RISC Computer! ● First CRT Monitor ● Freon Cooled ● State-of-the-Art Remote Access at NERSC ● Via 4 acoustic modems, manually answered capable of 10 characters /sec 3 50th Anniversary of the IBM / Cray Rivalry… Last week, CDC had a press conference during which they officially announced their 6600 system. I understand that in the laboratory developing this system there are only 32 people, “including the janitor”… Contrasting this modest effort with our vast development activities, I fail to understand why we have lost our industry leadership position by letting someone else offer the world’s most powerful computer… T.J. Watson, August 28, 1963 4 2/6/14 Cray Higher-Ed Roundtable, July 22, 2013 CDC 7600 – 1975 ● Delivered in September ● 36 Mflop Peak ● ~10 Mflop Sustained ● 10X sustained performance vs. the CDC 6600 ● Fast memory + slower core memory ● Freon cooled (again) Major Innovations § 65KW Memory § 36.4 MHz clock § Pipelined functional units 5 Cray-1 – 1978 NERSC transitions users ● Serial 6 to vector architectures ● An fairly easy transition for application writers ● LTSS was converted to run on the Cray-1 and became known as CTSS (Cray Time Sharing System) ● Freon Cooled (again) ● 2nd Cray 1 added in 1981 Major Innovations § Vector Processing § Dependency
    [Show full text]
  • Internet Engineering Task Force January 18-20, 1989 at University
    Proceedings of the Twelfth Internet Engineering Task Force January 18-20, 1989 at University of Texas- Austin Compiled and Edited by Karen Bowers Phill Gross March 1989 Acknowledgements I would like to extend a very special thanks to Bill Bard and Allison Thompson of the University of Texas-Austin for hosting the January 18-20, 1989 IETF meeting. We certainly appreciated the modern meeting rooms and support facilities made available to us at the new Balcones Research Center. Our meeting was especially enhanced by Allison’s warmth and hospitality, and her timely response to an assortment of short notice meeting requirements. I would also like to thank Sara Tietz and Susie Karlson of ACE for tackling all the meeting, travel and lodging logistics and adding that touch of class we all so much enjoyed. We are very happy to have you on our team! Finally, a big thank you goes to Monica Hart (NRI) for the tireless and positive contribution she made to the compilation of these Proceedings. Phill Gross TABLE OF CONTENTS 1. CHAIRMANZS MESSAGE 2. IETF ATTENDEES 3. FINAL AGENDA do WORKING GROUP REPORTS/SLIDES UNIVERSITY OF TEXAS-AUSTIN JANUARY 18-20, 1989 NETWORK STATUS BRIEFINGS AND TECHNICAL PRESENTATIONS O MERIT NSFNET REPORT (SUSAN HARES) O INTERNET REPORT (ZBIGNIEW 0PALKA) o DOEESNET REPORT (TONY HAIN) O CSNET REPORT (CRAIG PARTRIDGE) O DOMAIN SYSTEM STATISTICS (MARK LOTTOR) O SUPPORT FOR 0SI PROTOCOLS IN 4.4 BSD (ROB HAGENS) O TNTERNET WORM(MICHAEL KARELS) PAPERS DISTRIBUTED AT ZETF O CONFORMANCETESTING PROFILE FOR D0D MILITARY STANDARD DATA COMMUNICATIONS HIGH LEVEL PROTOCOL ~MPLEMENTATIONS (DCA CODE R640) O CENTER FOR HIGH PERFORMANCE COMPUTING (U OF TEXAS) Chairman’s Message Phill Gross NRI Chair’s Message In the last Proceedings, I mentioned that we were working to improve the services of the IETF.
    [Show full text]
  • (PDF) Kostenlos
    David Gugerli | Ricky Wichum Simulation for All David Gugerli Ricky Wichum The Politics of Supercomputing in Stuttgart David Gugerli, Ricky Wichum SIMULATION FOR ALL THE POLITICS OF SUPERCOMPUTING IN STUTTGART Translator: Giselle Weiss Cover image: Installing the Cray-2 in the computing center on 7 October 1983 (Polaroid UASt). Cover design: Thea Sautter, Zürich © 2021 Chronos Verlag, Zürich ISBN 978-3-0340-1621-6 E-Book (PDF): DOI 10.33057/chronos.1621 German edition: ISBN 978-3-0340-1620-9 Contents User’s guide 7 The centrality issue (1972–1987) 13 Gaining dominance 13 Planning crisis and a flood of proposals 15 5 Attempted resuscitation 17 Shaping policy and organizational structure 22 A diversity of machines 27 Shielding users from complexity 31 Communicating to the public 34 The performance gambit (1988–1996) 41 Simulation for all 42 The cost of visualizing computing output 46 The false security of benchmarks 51 Autonomy through regional cooperation 58 Stuttgart’s two-pronged solution 64 Network to the rescue (1997–2005) 75 Feasibility study for a national high-performance computing network 77 Metacomputing – a transatlantic experiment 83 Does the university really need an HLRS? 89 Grid computing extends a lifeline 95 Users at work (2006–2016) 101 6 Taking it easy 102 With Gauss to Europe 106 Virtual users, and users in virtual reality 109 Limits to growth 112 A history of reconfiguration 115 Acknowledgments 117 Notes 119 Bibliography 143 List of Figures 153 User’s guide The history of supercomputing in Stuttgart is fascinating. It is also complex. Relating it necessarily entails finding one’s own way and deciding meaningful turning points.
    [Show full text]
  • RATFOR User's Guide B
    General Disclaimer One or more of the Following Statements may affect this Document This document has been reproduced from the best copy furnished by the organizational source. It is being released in the interest of making available as much information as possible. This document may contain data, which exceeds the sheet parameters. It was furnished in this condition by the organizational source and is the best copy available. This document may contain tone-on-tone or color graphs, charts and/or pictures, which have been reproduced in black and white. This document is paginated as submitted by the original source. Portions of this document are not fully legible due to the historical nature of some of the material. However, it is the best reproduction available from the original submission. Produced by the NASA Center for Aerospace Information (CASI) NASA CONTRACTOR REPORT 166601 Ames RATFOR User's Guide b Leland C. Helmle (NASA—CH-166601) RATFOR USERS GUIDE 0 (Informatics General Corp,) N85-16490 51 p HC A04/mZ A01 CSCL 09B Unclas G3/61 13243 CONTRACT NAS2— 11555 January 1985 v NASA NASA CONTRACTOR REPORT 166601 *i Ames RATF'OR User's Guide Leland C. Helmle Informatics General Corporation 1121 San Antonio Road Palo Alto, CA 94303 i i _I Prepared for Ames Research Center under Contract NAS2-11555 i n ASA National Aeronautics and 1 Space Administration Ames Research Center Moffett Field, California 94035 '^ I I w Ames R.A.TFOR User's Guide Version 2.0 by Loland C. Helmle Informatics General Corporation July 16, 1983 Prepared under Contract NA52-11555, Task 101 ^ Table of Contents page v 1 Introduction .
    [Show full text]
  • NQE Release Overview RO–5237 3.3
    NQE Release Overview RO–5237 3.3 Document Number 007–3795–001 Copyright © 1998 Silicon Graphics, Inc. and Cray Research, Inc. All Rights Reserved. This manual or parts thereof may not be reproduced in any form unless permitted by contract or by written permission of Silicon Graphics, Inc. or Cray Research, Inc. RESTRICTED RIGHTS LEGEND Use, duplication, or disclosure of the technical data contained in this document by the Government is subject to restrictions as set forth in subdivision (c) (1) (ii) of the Rights in Technical Data and Computer Software clause at DFARS 52.227-7013 and/or in similar or successor clauses in the FAR, or in the DOD or NASA FAR Supplement. Unpublished rights reserved under the Copyright Laws of the United States. Contractor/manufacturer is Silicon Graphics, Inc., 2011 N. Shoreline Blvd., Mountain View, CA 94043-1389. Autotasking, CF77, CRAY, Cray Ada, CraySoft, CRAY Y-MP, CRAY-1, CRInform, CRI/TurboKiva, HSX, LibSci, MPP Apprentice, SSD, SUPERCLUSTER, UNICOS, and X-MP EA are federally registered trademarks and Because no workstation is an island, CCI, CCMT, CF90, CFT, CFT2, CFT77, ConCurrent Maintenance Tools, COS, Cray Animation Theater, CRAY APP, CRAY C90, CRAY C90D, Cray C++ Compiling System, CrayDoc, CRAY EL, CRAY J90, CRAY J90se, CrayLink, Cray NQS, Cray/REELlibrarian, CRAY S-MP, CRAY SSD-T90, CRAY T90, CRAY T3D, CRAY T3E, CrayTutor, CRAY X-MP, CRAY XMS, CRAY-2, CSIM, CVT, Delivering the power . ., DGauss, Docview, EMDS, GigaRing, HEXAR, IOS, ND Series Network Disk Array, Network Queuing Environment, Network Queuing Tools, OLNET, RQS, SEGLDR, SMARTE, SUPERLINK, System Maintenance and Remote Testing Environment, Trusted UNICOS, UNICOS MAX, and UNICOS/mk are trademarks of Cray Research, Inc.
    [Show full text]
  • Cielo Computational Environment Usage Model
    Cielo Computational Environment Usage Model With Mappings to ACE Requirements for the General Availability User Environment Capabilities Release Version 1.1 Version 1.0: Bob Tomlinson, John Cerutti, Robert A. Ballance (Eds.) Version 1.1: Manuel Vigil, Jeffrey Johnson, Karen Haskell, Robert A. Ballance (Eds.) Prepared by the Alliance for Computing at Extreme Scale (ACES), a partnership of Los Alamos National Laboratory and Sandia National Laboratories. Approved for public release, unlimited dissemination LA-UR-12-24015 July 2012 Los Alamos National Laboratory Sandia National Laboratories Disclaimer Unless otherwise indicated, this information has been authored by an employee or employees of the Los Alamos National Security, LLC. (LANS), operator of the Los Alamos National Laboratory under Contract No. DE-AC52-06NA25396 with the U.S. Department of Energy. The U.S. Government has rights to use, reproduce, and distribute this information. The public may copy and use this information without charge, provided that this Notice and any statement of authorship are reproduced on all copies. Neither the Government nor LANS makes any warranty, express or implied, or assumes any liability or responsibility for the use of this information. Bob Tomlinson – Los Alamos National Laboratory John H. Cerutti – Los Alamos National Laboratory Robert A. Ballance – Sandia National Laboratories Karen H. Haskell – Sandia National Laboratories (Editors) Cray, LibSci, and PathScale are federally registered trademarks. Cray Apprentice2, Cray Apprentice2 Desktop, Cray C++ Compiling System, Cray Fortran Compiler, Cray Linux Environment, Cray SHMEM, Cray XE, Cray XE6, Cray XT, Cray XTm, Cray XT3, Cray XT4, Cray XT5, Cray XT5h, Cray XT5m, Cray XT6, Cray XT6m, CrayDoc, CrayPort, CRInform, Gemini, Libsci and UNICOS/lc are trademarks of Cray Inc.
    [Show full text]
  • Unix and Linux System Administration and Shell Programming
    Unix and Linux System Administration and Shell Programming Unix and Linux System Administration and Shell Programming version 56 of August 12, 2014 Copyright © 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010, 2011, 2012, 2013, 2014 Milo This book includes material from the http://www.osdata.com/ website and the text book on computer programming. Distributed on the honor system. Print and read free for personal, non-profit, and/or educational purposes. If you like the book, you are encouraged to send a donation (U.S dollars) to Milo, PO Box 5237, Balboa Island, California, USA 92662. This is a work in progress. For the most up to date version, visit the website http://www.osdata.com/ and http://www.osdata.com/programming/shell/unixbook.pdf — Please add links from your website or Facebook page. Professors and Teachers: Feel free to take a copy of this PDF and make it available to your class (possibly through your academic website). This way everyone in your class will have the same copy (with the same page numbers) despite my continual updates. Please try to avoid posting it to the public internet (to avoid old copies confusing things) and take it down when the class ends. You can post the same or a newer version for each succeeding class. Please remove old copies after the class ends to prevent confusing the search engines. You can contact me with a specific version number and class end date and I will put it on my website. version 56 page 1 Unix and Linux System Administration and Shell Programming Unix and Linux Administration and Shell Programming chapter 0 This book looks at Unix (and Linux) shell programming and system administration.
    [Show full text]