Minimizing Bank Selection Instructions for Partitioned Memory Architectures∗
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Linux and Electronics
Linux and Electronics Urs Lindegger Linux and Electronics Urs Lindegger Copyright © 2019-11-25 Urs Lindegger Table of Contents 1. Introduction .......................................................................................................... 1 Note ................................................................................................................ 1 2. Printed Circuits ...................................................................................................... 2 Printed Circuit Board design ................................................................................ 2 Kicad ....................................................................................................... 2 Eagle ..................................................................................................... 13 Simulation ...................................................................................................... 13 Spice ..................................................................................................... 13 Digital simulation .................................................................................... 18 Wings 3D ....................................................................................................... 18 User interface .......................................................................................... 19 Modeling ................................................................................................ 19 Making holes in Wings 3D ....................................................................... -
Sensors: Sensing and Data Acquisidon
Sensors: Sensing and Data Acquisi3on Prof. Yan Luo For UMass Lowell 16.480/552 Sensors: Sensing and Data Acquisi3on 1 Prof. Yan Luo, UMass Lowell Outline • Sensors • Sensor interfacing • Sensor data conversion and acquisi3on • PIC microcontroller programming • Lab 1: Sensor design and data acquisi3on (a light intensity sensor) Sensors: Sensing and Data Acquisi3on 2 Prof. Yan Luo, UMass Lowell Basic Principle of Sensors • Transducer: a device that converts energy from one form to another • Sensor: converts a physical parameter to an electric output – Electric output is desirable as it enables further signal processing. • Actuator: coverts an electric signal to a physical output Sensors: Sensing and Data Acquisi3on 3 Prof. Yan Luo, UMass Lowell Sensors • Cameras • Analog sensors • Accelerometer - Con3nuously varying output • Rate gyro • Digital sensors • Strain gauge - on/off • Microphone - Pulse trains (freq convey measurement) • Magnetometer • Chemical sensors • Op3cal sensors Sensors: Sensing and Data Acquisi3on 4 Prof. Yan Luo, UMass Lowell Example: Photoresistor • Or Light Dependent Resistor (LDR) – Resistance decreases with increasing light intensity – Made of semiconductor – Photons absorbed cause electrons to jump into conduc3on band Sensors: Sensing and Data Acquisi3on 5 Prof. Yan Luo, UMass Lowell Interfacing with Sensors • Interface circuitry • ADC • Interfaces of the embedded system • SoVware drivers and APIs Sensors: Sensing and Data Acquisi3on 6 Prof. Yan Luo, UMass Lowell Example voltage divider circuit Vcc R2 V=Vcc x R1/(R1+R2) V R1 Sensors: Sensing and Data Acquisi3on 7 Prof. Yan Luo, UMass Lowell Analog-Digital Converter (ADC) • Types of ADC – Integrang ADC • Internal voltage controlled oscillator • slow – Successive approximaon ADC • Digital code driving the analog reference voltage – Flash ADC • A bank of comparators • Fast Sensors: Sensing and Data Acquisi3on 8 Prof. -
"Firefly" Z80 General-Purpose Retro Computing Platform
"FIREFLY" Z80 GENERAL-PURPOSE RETRO COMPUTING PLATFORM THREE FARTHING LABS http://www.threefarthing.com Page 1 of 13 PREFACE A project has to have a name and this one wound up being called "Firefly" as it©s the culmination of a wirewrap board begun several years ago while binge-watching the series of the same name. That board, in turn, was a redesign of a single board computer I created in 1998, creatively named the "SBCZ1." All three of these projects were begun as a chance to tinker with a processor I first met hands- on in 1984, the ZiLOG Z-80, though it was long-established by that time and dominated the business computer market. It was the CPU of preference behind most CP/M machines and CP/M was what I wanted to tinker with again, from the ground up ± not in some cozy emulator. When I began preparing to design the board I looked around on the Internet and found many excellent Z80 projects, including kit options. The choice was made to "roll my own" for numerous reasons. In the SBCZ1 I had most of a good design and wanted to retain a lot of hard work (done before I had Internet access, mind you). There were also specific reasons for wanting "to stay within ZiLOG canon" and work with a particular hardware configuration. I saw no kits that did just what I wanted in the way that I wanted. There was also a desire to maintain modularity and be extensible but not require a proliferation of modules for what I considered core functionality, yet great restraint was employed to keep "core functionality" spartan. -
Efficient Automated Code Partitioning for Microcontrollers with Switchable
Efficient Automated Code Partitioning for Microcontrollers with Switchable Memory Banks MICHAL CISZEWSKI and KONRAD IWANICKI, University of Warsaw 114 Switching active memory banks at runtime allows a processor with a narrow address bus to access memory that exceeds ranges normally addressable via the bus. Switching code memory banks is regaining interest in microcontrollers for the Internet of Things (IoT), which have to run continuously growing software, while at the same time consuming ultra-small amounts of energy. To make use of bank switching, such software has to be partitioned among the available banks and augmented with bank-switching instructions. In contrast to the augmenting, which is done automatically by a compiler, today the partitioning is normally done manually by programmers. However, since IoT software is cross-compiled on much more powerful machines than its target microcontrollers, it becomes possible to partition it automatically during compilation. In this article, we thus study the problem of partitioning program code among banks such that the resulting runtime performance of the program is maximized. We prove that the problem is NP-hard and propose a heuristic algorithm with a low complexity, so that it enables fast compilation, and hence interactive software development. The algorithm decomposes the problem into three subproblems and introduces a heuristic for each of them: (1) Which pieces of code to partition? (2) Which of them to assign to permanently mapped banks? and (3) How to divide the remaining ones among switchable banks? We integrate the algorithm, together with earlier ones, in an open-source compiler and test the resulting solution on synthetic as well as actual commercial IoT software bases, thereby demonstrating its advantages and drawbacks. -
Tesis De Microcontroladores.Pdf
UNIVERSIDAD DE EL SALVADOR FACULTAD MULTIDISCIPLINARIA DE OCCIDENTE DEPARTAMENTO DE INGENIERÍA Y ARQUITECTURA. TRABAJO DE GRADUACIÓN DENOMINADO: “DISEÑO DE GUÍAS DE TRABAJO Y CONSTRUCCIÓN DE EQUIPO DIDÁCTICO PARA LA IMPLANTACIÓN DE PRÁCTICAS DE LABORATORIO CON MICRO CONTROLADORES EN LA CARRERA DE INGENIERÍA DE SISTEMAS INFORMÁTICOS DE LA FACULTAD MULTIDISCIPLINARIA DE OCCIDENTE.” PARA OPTAR AL GRADO DE: INGENIERO DE SISTEMA INFORMÁTICOS PRESENTAN: FRANCIA ESCOBAR, ROBERTO ANTONIO GARCÍA, JUAN CARLOS UMAÑA ORDOÑEZ, JORGE ARTURO DOCENTE DIRECTOR ING. JOSE FRANCISCO ANDALUZ NOVIEMBRE, 2007. SANTA ANA EL SALVADOR CENTRO AMÉRICA UNIVERSIDAD DE EL SALVADOR RECTOR MÁSTER RUFINO ANTONIO QUEZADA SÁNCHEZ VICERRECTOR ACADÉMICO MÁSTER MIGUEL ÁNGEL PÉREZ RAMOS VICE RECTOR ADMINISTRATIVO MÁSTER ÓSCAR NOÉ NAVARRETE SECRETARIO GENERAL LICENCIADO DOUGLAS VLADIMIR ALFARO CHÁVEZ FACULTAD MULTIDISCIPLINARIA DE OCCIDENTE DECANO LIC. JORGE MAURICIO RIVERA VICE DECANO LIC. ELADIO ZACARÍAS ORTEZ SECRETARIO LIC. VÍCTOR HUGO MERINO QUEZADA JEFE DE DEPARTAMENTO DE INGENIERÍA ING. RENÉ ERNESTO MARTÍNEZ BERMÚDEZ AGRADECIMIENTOS A DIOS TODOPODEROSO Por permitir que llegara hasta el final de la carrera, por no dejarme solo en este camino y siempre levantarme cuando necesite de su apoyo y fuerza para continuar adelante. A MI MADRE ÁNGELA VICTORIA ESCOBAR DE FRANCIA Por su apoyo, paciencia y ser un pilar en mi vida; sin la cual no hubiese podido culminar la carrera., le dedico este triunfo con las palabras con las que siempre me ha dado confianza y fuerza de seguir adelante “se triunfa cuando se persevera”. A MI PADRE JOSÉ ANTONIO FRANCIA ESCOBAR Que su ejemplo formo en mi la idea de siempre mirar más adelante, seguir luchando y creer que siempre es posible superarse cada día más; gracias por su inmenso apoyo desde todos los puntos de mi carrera y mi vida, como padre, docente, asesor y amigo. -
The Ultimate C64 Overview Michael Steil, 25Th Chaos Communication Congress 2008
The Ultimate C64 Overview Michael Steil, http://www.pagetable.com/ 25th Chaos Communication Congress 2008 Retrocomputing is cool as never before. People play Look and Feel C64 games in emulators and listen to SID music, but few people know much about the C64 architecture A C64 only needs to be connected to power and a TV and its limitations, and what programming was like set (or monitor) to be fully functional. When turned back then. This paper attempts to give a comprehen- on, it shows a blue-on-blue theme with a startup mes- sive overview of the Commodore 64, including its in- sage and drops into a BASIC interpreter derived from ternals and quirks, making the point that classic Microsoft BASIC. In order to load and save BASIC computer systems aren't all that hard to understand - programs or use third party software, the C64 re- and that programmers today should be more aware of quires mass storage - either a “datasette” cassette the art that programming once used to be. tape drive or a disk drive like the 5.25" Commodore 1541. Commodore History Unless the user really wanted to interact with the BA- SIC interpreter, he would typically only use the BA- Commodore Business Machines was founded in 1962 SIC instructions LOAD, LIST and RUN in order to by Jack Tramiel. The company specialized on elec- access mass storage. LOAD"$",8 followed by LIST tronic calculators, and in 1976, Commodore bought shows the directory of the disk in the drive, and the chip manufacturer MOS Technology and decided LOAD"filename",8 followed by RUN would load and to have Chuck Peddle from MOS evolve their KIM-1 start a program. -
Z80 Bank-Switching Scheme An101
Z80 BANK-SWITCHING SCHEME AN101 1. INTRODUCTION 1. Scope: This Application Note gives a description of a circuit design allowing the classic Z80 microproces- sor to access expanded memory, beyond the 64K bytes made readily available by its 16 address lines, A0 through A15. 2. Z80 microprocessor: Though it has been over 20 years since the introduction of the Z80, this family of microprocessors still finds application in new designs. This is because the Z80 is still cost-effective for many 8-bit applications; because many users have a large library of tested code for the Z80; and because the parts are readily available from several manufacturers, easing supply concerns that apply to sole-sourced processors. 3. Applicable chips: This Application Note applies to the classic Z80 microprocessor. It can also be applied to the newer Z84C15, which comprises a Z80 CPU, a clock generator, four Z80 CTC channels, two Z80 SIO channels, DMA, chip select signals, and glue logic in a 100-pin quad flat pack. However this external bank-switching circuitry is not necessary for members of the Z80180 family, which have a built-in MMU (memory management unit) on-chip. 2. DESIGN GOALS 1. Program memory: We wanted to expand program memory space to 128K bytes for our application. We needed to support in-circuit reprogramming, so we chose the AMD 29F010 flash memory device. This +5 volt part does not require a +12 volt power supply for programming. After the flash chip is initially programmed at the factory with the bootstrap loader and the current application code, it can later be reprogrammed in the field over the RS-232 serial port. -
Genel Amaçli Robot Kolu Tasarimi
DOKUZ EYLÜL ÜNøVERSøTESø FEN Bø/øMLERø ENSTøTÜSÜ GENEL AMAÇLI ROBOT KOLU TASARIMI Orhan Efe ALP Nisan, 2012 øZMøR GENEL AMAÇLI ROBOT KOLU TASARIMI Dokuz Eylül Üniversitesi Fen Bilimleri Enstitüsü Yüksek Lisans Tezi Mekatronik Mühendisli÷i Bölümü, Mekatronik Mühendisli÷i ProgramÕ Orhan Efe ALP Nisan, 2012 øZMøR TEùEKKÜR ÇalÕúmalarÕm boyunca de÷erli yardÕm ve katkÕlarÕyla beni yönlendiren, hoúgörü ve sabÕr gösteren de÷erli hocam ve tez danÕúmanÕm Yrd. Doç. Dr. Nalan ÖZKURT’a, yine önemli tecrübelerinden faydalandÕ÷Õm Prof. Dr. Erol UYAR hocama, robotik konusunda yo÷un tecrübelerinden yararlandÕ÷Õm de÷erli arkadaúÕm Aytekin GÜÇLÜ ’ye, mekanik aksam konusunda yo÷un eme÷i geçen, atölye ve teçhizatlarÕQÕ kullanÕPÕma açan de÷erli ustalarÕm Önder ve Erkan KURTKAFA’ya, bana verdikleri destek için çok teúekkür ederim. Son olarak bu günleri görmemi sa÷layan, hayatÕmda herúeyi borçlu oldu÷um herúeyden çok sevdi÷im, güvenlerini ve sevgilerini her zaman yo÷un hissetti÷im Húim Hatice ALP, annem Nüzhet ALP, babam Ali Ergün ALP, ablalarÕm Fethiye Yelkin ALP, Ceren SERøNKAN, Canan TOKEM, dayÕm Niyazi TOKEM ve anneannem Fikriye TOKEM’ en büyük teúekkürü borç bildi÷imi söylemek isterim. Orhan Efe ALP iii GENEL AMAÇLI ROBOT KOLU TASARIMI ÖZ Bu tez, üç eksen ve bir adet tutucuya sahip bir robot manipülatör ve robot manipülatöre insansÕ el hassasiyeti kazandÕrmak amacÕ ile ivmeölçer sensörlerden gönderilen komutlarla yönlendirilen, mikroiúlemci ailesinden PIC ile kontrol edilen servo motor sürücü kartÕ tasarÕm çalÕúmasÕQÕ ortaya koymaktadÕr. Robot manipülatörün tasarÕPÕ için Dassault Systemes firmasÕQÕn üretti÷i Solidworks programÕ kullanÕlmÕúWÕr. BaskÕ devre tekni÷i ile üretilen 5 adet servo motoru sürebilen motor sürücü kartÕ Proteus ve Eagle çizim programlarÕnda tasarlanmÕú ve çizilmiútir. -
Introduction to PIC 18 Microcontrollers
Mod-5: PIC 18 Introduction 1 Module 5 Contents: Overview of PIC 18, memory organisation, CPU, registers, pipelining, instruction format, addressing modes, instruction set, interrupts, interrupt operation, resets, parallel ports, timers, CCP. Features of the PIC18 microcontroller 8-bit CPU 2 MB program memory space 256 bytes to 1KB of data EEPROM Up to 3968 bytes of on-chip SRAM 4 KB to 128KB flash program memory Sophisticated timer functions that include: input capture, output compare, PWM, real- time interrupt, and watchdog timer Serial communication interfaces: SCI SPI I2C and CAN Background debug mode (BDM) 10-bit A/D converter Memory protection capability Instruction pipelining Operates at up to 40 MHz crystal oscillator Overview of the PIC18 MCU Microchip has introduced six different lines of 8-bit MCUs over the years: 1. PIC12XXX: 8-pin, 12- or 14-bit instruction format 2. PIC14000: 28-pin, 14-bit instruction format (same as PIC16XX) 3. PIC16C5X: 12-bit instruction format 4. PIC16CXX: 14-bit instruction format 5. PIC17: 16-bit instruction format 6. PIC18: 16-bit instruction format Each line of the PIC MCUs supports different number of instructions with slightly different instruction formats and different design in their peripheral functions. This makes products designed with a different family of PIC MCUs incompatible. The members of the Muhammed Riyas A.M, Assistant Professor,Department of E.C.E, M.C.E.T Pathanamthitta Mod-5: PIC 18 Introduction 2 PIC18 family share the same instruction set and the same peripheral function design and provide from eight to more than 80 signal pins. -
Universidad De San Carlos De Guatemala Facultad De Ingeniería Escuela De Ingeniería Mecánica Eléctrica
Universidad de San Carlos de Guatemala Facultad de Ingeniería Escuela de Ingeniería Mecánica Eléctrica IMPLEMENTACIÓN DEL PIC PLC AL LABORATORIO DE ELECTRÓNICA III Juan Alejandro Ortíz Chial Asesorado por el Ing. Enrique Sarvelio Ortíz Chial Guatemala, mayo de 2018 UNIVERSIDAD DE SAN CARLOS DE GUATEMALA FACULTAD DE INGENIERÍA IMPLEMENTACIÓN DEL PIC PLC AL LABORATORIO DE ELECTRÓNICA III TRABAJO DE GRADUACIÓN PRESENTADO A LA JUNTA DIRECTIVA DE LA FACULTAD DE INGENIERÍA POR JUAN ALEJANDRO ORTÍZ CHIAL ASESORADO POR EL ING. ENRIQUE SARVELIO ORTÍZ CHIAL AL CONFERÍRSELE EL TÍTULO DE INGENIERO ELECTRICISTA GUATEMALA, MAYO DE 2018 UNIVERSIDAD DE SAN CARLOS DE GUATEMALA FACULTAD DE INGENIERÍA NÓMINA DE JUNTA DIRECTIVA DECANO Ing. Pedro Antonio Aguilar Polanco VOCAL I Ing. Angel Roberto Sic García VOCAL II Ing. Pablo Christian De León Rodríguez VOCAL III Ing. José Milton De León Bran VOCAL IV Br. Óscar Humberto Galicia Núñez VOCAL V Br. Carlos Enrique Gómez Donis SECRETARIA Inga. Lesbia Magalí Herrera López TRIBUNAL QUE PRACTICÓ EL EXAMEN GENERAL PRIVADO DECANO a.i. Ing. Angel Roberto Sic García EXAMINADOR Ing. Bayron Armando Cuyán Culajay EXAMINADOR Ing. Julio Rolando Barrios Archila EXAMINADOR Ing. Jorge Gilberto González Padilla SECRETARIO Ing. Hugo Humberto Rivera Pérez HONORABLE TR¡BUNAL EXAMINADOR En cumplimiento con Ios preceptos que establece la ley de la Universidad de San Carlos de Guatemala, presento a su consideracién mi trabajo de graduación titulado: IMPLEMENTACIÓN DEL PIC PLC AL LABORATORIO DE ELECTRÓNICA I¡I Tema que me fuera asignado por la Dirección de la Escuela de lngeniería Mecánica Eléctrica, con fecha 01 de julio de 2011. Ghial ACTO QUE DEDICO A: Dios Por ser una importante influencia en mi carrera, entre otras cosas. -
Microcontrollers Apnote AP0821
查询AP0821供应商 捷多邦,专业PCB打样工厂,24小时加急出货 Microcontrollers ApNote AP0821 o additional file APXXXX01.EXE available C5xx / 80C5xx In-System FLASH Programming The following approach describes the proceeding for in-system reprogramming of an external (5V-only) FLASH code memory by using the internal ROM code. Due to the ´Havard Architecture´, an additional external logic (PLD) is used for a software switching mechanism between code and data memory. K. Scheibert / Siemens HL MC AT Semiconductor Group 08.96, Rel. 01 C5xx / 80C5xx In-System FLASH Programming 1 Memory Organization............................................................................................. 4 2 Hardware Description............................................................................................. 5 3 Functional Description of the ROM Software Routine ........................................ 7 AP0821 ApNote - Revision History Actual Revision : Rel.01 Previous Revison: Rel. none Page of Page of Subjects changes since last release) actual Rel. prev. Rel. Semiconductor Group 2 of 7 AP0821 08.96 C5xx / 80C5xx In-System FLASH Programming In-System FLASH Programming with hardware implemented bank switching capability The following information concerns all microcontrollers of the C5xx / SAB 80C5xx family which use an internal ROM mask in combination with an external code FLASH memory. The external FLASH memory can be used as reprogrammable code memory for the application software. This application focuses on SIEMENS 8-bit microcontroller derivatives with internal code memory (ROM) sizes of 8/16 Kbyte in maximum because of the overlapped code memory area of the FLASH memory of 8/16 Kbyte cannot be used: • C501-1R • C502-2R • C504-2R • C511(A)-R • C513(A)-R/-2R • C515-1R • SAB 80C535 • SAB 80C537 This application note describes the proceeding for the in-system reprogramming of application software by using special application hardware for memory bank switching and software programming service routines in the internal mask programmable ROM for external FLASH memories (5V-only). -
The Triumphant March of the 6502.Pdf
INFOTAINMENT THE 6502 The Triumphant March 30-year old design still inspires thousand Roelf Sluman Are eight-bit processors something from the past or is it still possible to do some- thing useful with them? Elektor Electronics went looking and discovered that the good-old 6502, in a world of threaded computing and dual-core processors, still has a following of faithful fans. In the 1970’s and 80’s three 8-bit processors dominated elegant 8-bit processor. Many thousands of enthusiasts the market: the 6809 from Motorola, the Z80 from Zilog across the whole world still work daily with the 6502 and the 6502 from MOS. By far the most popular of and make it do things that were not considered possible these three was the in 1975. 6502: its low cost (when introduced, the 6502 set you back about 25 dol- Price war History lars) and the advanced The 6502 processor cele- design for its time made When the 6502 was introduced in 1975 it cost brates its 30th anniver- sure that the 6502 con- about 25 dollars. That made it a serious com- sary this year. The intro- quered the world in a petitor to the processor it was copied from, the duction was preceded by short time as the brain in 6800, which by comparison costs a whopping a scandal: the designers popular home-computers 179 dollars. No wonder computer manufacturers of the 6502 had, in the such as the such as Apple and Commodore went for the first instance, developed Commodore 64 and the 6502.