1

 Development Systems: Product Descriptions

November 25, 1997 (Version 2.0) 12*

Development Systems Descriptions It’s simple to order a Xilinx Development System. Just choose a Foundation or Alliance Series and a few options. Give your local Xilinx Sales Office a call for information about our evaluation kits. Foundation Series • Foundation Base System (PC) • Foundation Base-Express System (PC) • Foundation Standard System (PC) • Foundation Express System (PC) Alliance Series • Alliance Base (PC or Workstation) • Alliance Standard (PC or Workstation) Alliance Series Options • VIEWlogic Workview Office Standard Development System Options (PC)

November 25, 1997 (Version 2.0) 2-3 Development Systems: Product Descriptions

Foundation Series: Foundation Base System (PC) Overview Package Features - Foundation Base The Foundation Series provides a complete, ready-to-use System design system for the design of Xilinx programmable logic FND FND FND FND devices. The Foundation Base System provides design Feature BAS STD BSX EXP entry (schematic and Abel HDL), simulation, and device √√√√ implementation tools for a broad array of FPGA and CPLD CPLD Devices √1 √√1 √ devices targeted for low density and high volume applica- FPGA Devices tions. Libraries and Interface √√√√ Schematic Editor √√√√ System Features HDL Editor √√√√ • Project manager Graphical State Editor √√√√ • Schematic editor ABEL 6 Entry / Synthesis √√√√ • Integrated HDL editor with support for the Abel 6 HDL VHDL Entry / Synthesis √√ • Functional and timing simulator √√ • EDIF, VHDL (VITAL compliant), and Verilog / SDF Verilog Entry / Synthesis √√√√ design interfaces Schematic-centric Synthesis • Device implementation software for Xilinx CPLDs and HDL-centric Synthesis √ FPGAs Simulator √√√√ • Comprehensive on-line help, on-line documentation, Device Implementation √√√√ and software tutorials Maintenance2 √√√√ • Software maintenance, including hotline support and 11/12/97 software updates Notes: 1. Spartan, XC3x00A/X, XC4000E/X up to XC4010E/X, and XC5200 up to XC5210. Device Support 2. A period of maintenance is included with new • CPLDs: design system licenses, after which annual maintenance contracts may be purchased. - XC9500 Contact your Xilinx sales representative for more • FPGAs: information. - XC4000E/X Up to XC4010E/X - Spartan - XC3x00A/L - XC5200 Up to XC5210 FPGAs Required Hardware Environment • Windows 95 and Windows NT 4.0 compatible PCs • Minimum memory requirements: 32 MB RAM, 32-64 MB Virtual Memory • CD-ROM drive

2-4 November 25, 1997 (Version 2.0) Foundation Series: Foundation Base-Express System with VHDL/Verilog Synthesis(PC) Overview Package Features - Foundation The Foundation Series provides a complete, ready-to-use Base-Express System design system for the design of Xilinx programmable logic FND FND FND FND devices. The Foundation Express System incorporates Feature BAS STD BSX EXP advanced synthesis technology from Synopsys, and pro- √√√√ vides design entry (schematic and HDL), VHDL and Verilog CPLD Devices √1 √ √1 √ synthesis, simulation, and device implementation tools for a FPGA Devices broad array of FPGA and CPLD devices targeted for low Libraries and Interface √√√√ density and high volume applications. Schematic Editor √√√√ HDL Editor √√√√ System Features Graphical State Editor √√√√ • Project manager ABEL 6 Entry / Synthesis √√√√ • Schematic editor VHDL Entry / Synthesis √√ • Integrated HDL editor with support for VHDL, Verilog, √√ and Abel 6 HDL Verilog Entry / Synthesis √√√√ • VHDL and Verilog synthesis, including compilation and Schematic-centric Synthesis optimization HDL-centric Synthesis √ • Functional and timing simulator Simulator √√√√ • EDIF, VHDL (VITAL compliant), and Verilog / SDF Device Implementation √√√√ design interfaces Maintenance2 √√√√ • Device implementation software for Xilinx CPLDs and 11/12/97 FPGAs Notes: 1. Spartan, XC3x00A/L, XC4000E/X up to • Comprehensive on-line help, on-line documentation, XC4010E/X, and XC5200 up to XC5210. and software tutorials 2. A period of maintenance is included with new • Software maintenance, including hotline support and design system licenses, after which annual software updates maintenance contracts may be purchased. Contact your Xilinx sales representative for more information. Device Support • CPLDs: - XC9500 • FPGAs: - XC4000E/X Up to XC4010E/X - Spartan - XC3x00A/L - XC5200 Up to XC5210 FPGAs Required Hardware Environment • Windows 95 and Windows NT 4.0 compatible PCs • Minimum memory requirements: 32 MB RAM, 32-64 MB Virtual Memory • CD-ROM drive

November 25, 1997 (Version 2.0) 2-5 Development Systems: Product Descriptions

Foundation Series: Foundation Standard System (PC) Overview Package Features - Foundation Base The Foundation Series provides a complete, ready-to-use System design system for the design of Xilinx programmable logic FND FND FND FND devices. The Foundation Standard System provides design Feature BAS STD BSX EXP entry (schematic and Abel HDL), simulation, and device √ √√√ implementation tools for all Xilinx CPLDs and Xilinx CPLD Devices √1 √√1 √ FPGAs. FPGA Devices Libraries and Interface √ √√√ System Features Schematic Editor √ √√√ • Project manager HDL Editor √ √√√ • Schematic editor Graphical State Editor √ √√√ • Integrated HDL editor with support for the Abel 6 HDL ABEL 6 Entry / Synthesis √ √√√ • Functional and timing simulator VHDL Entry / Synthesis √√ • EDIF, VHDL (VITAL compliant), and Verilog / SDF √√ design interfaces Verilog Entry / Synthesis √ √√√ • Device implementation software for Xilinx CPLDs and Schematic-centric Synthesis FPGAs HDL-centric Synthesis √ • Comprehensive on-line help, on-line documentation, Simulator √ √√√ and software tutorials Device Implementation √ √√√ • Software maintenance, including hotline support and Maintenance2 √ √√√ software updates 11/12/97 Notes: 1. Spartan, XC3x00A/L, XC4000E/X up to Device Support XC4010E/X, and XC5200 up to XC5210. • CPLDs: 2. A period of maintenance is included with new - XC9500 design system licenses, after which annual maintenance contracts may be purchased. • FPGAs: Contact your Xilinx sales representative for more - XC4000E/X information. - Spartan - XC3x00A/L - XC5200 Required Hardware Environment • Windows 95 and Windows NT 4.0 compatible PCs • Minimum memory requirements - Small Devices (< 10K gates): 32 MB RAM, 32-64 MB Virtual Memory - Medium Devices (10K to 30K gates): 64 MB RAM, 64-128 MB Virtual Memory - Large Devices (> 30K gates): 128 MB RAM, 128-256 MB Virtual Memory • CD-ROM drive

2-6 November 25, 1997 (Version 2.0) Foundation Series: Foundation Express System (PC) Overview Package Features - Foundation Base The Foundation Series provides a complete, ready-to-use System design system for the design of Xilinx programmable logic FND FND FND FND devices. The Foundation Express System incorporates Feature BAS STD BSX EXP advanced synthesis technology from Synopsys, and pro- √√√√ vides design entry (schematic and HDL), VHDL and Verilog CPLD Devices √1 √√1 √ synthesis, simulation, and device implementation tools for FPGA Devices all Xilinx CPLDs and Xilinx FPGAs. Libraries and Interface √√√√ Schematic Editor √√√√ System Features HDL Editor √√√√ • Project manager Graphical State Editor √√√√ • Schematic editor ABEL 6 Entry / Synthesis √√√√ • Integrated HDL editor with support for VHDL, Verilog, VHDL Entry / Synthesis √ √ and Abel 6 HDL √ √ • VHDL and Verilog synthesis, including compilation and Verilog Entry / Synthesis √√√√ optimization Schematic-centric Synthesis • Functional and timing simulator HDL-centric Synthesis √ • EDIF, VHDL (VITAL compliant), and Verilog / SDF Simulator √√√√ design interfaces Device Implementation √√√√ • Device implementation software for Xilinx CPLDs and Maintenance2 √√√√ FPGAs 11/12/97 • Comprehensive on-line help, on-line documentation, Notes: 1. Spartan, XC3x00A/L, XC4000E/X up to and software tutorials XC4010E/X, and XC5200 up to XC5210. • Software maintenance, including hotline support and 2. A period of maintenance is included with new software updates design system licenses, after which annual maintenance contracts may be purchased. Contact your Xilinx sales representative for more Device Support information. • CPLDs: - XC9500 • FPGAs: - XC4000E/X - Spartan - XC3x00A/L - XC5200 Required Hardware Environment • Windows 95 and Windows NT 4.0 compatible PCs • Minimum memory requirements - Small Devices (< 10K gates): 32 MB RAM, 32-64 MB Virtual Memory - Medium Devices (10K to 30K gates): 64 MB RAM, 64-128 MB Virtual Memory - Large Devices (> 30K gates): 128 MB RAM, 128-256 MB Virtual Memory • CD-ROM drive

November 25, 1997 (Version 2.0) 2-7 Development Systems: Product Descriptions

Alliance Series: Alliance Base (PC or Workstation) Overview Libraries and Interfaces Next generation FPGA/CPLD design solutions leveraging Cadence “Open Systems” integration with premier EDA partners for • Concept schematic libraries and Verilog-XL simulation devices up to 10,000 gates. models Base System Features: Mentor • EDA Libraries & Interfaces • Falcon Framework schematic capture library and • Design Manager and Flow Engine ModelSim simulation models • LogiBLOX Module Generator • Leonardo synthesis libraries and interfaces are • Gate Optimizer available from Mentor or Exemplar Logic • Complete HDL design methodology support • Incremental design capabilities Synopsys • Place and route utilizing SMARTspecs • HDL Design Solutions (VHDL and Verilog) • Re-entrant router • Design Compiler, FPGA Compiler II, FPGA Express, • Multi-pass PAR VSS • Timing Analyzer • Vital Simulation models • Standard netlist and backannotation (EDIF, SDF, VITAL • DesignWare arithmetic modules VHDL and Verilog) * No libraries required to support FPGA Express • Xchecker Hardware Debugger (workstation only) VIEWlogic Package Includes: • Workview Office schematic capture library and functional and timing simulation interface • Alliance Quick Start Guide • Alliance Release Document Exemplar • Answer Database • Leonardo and Galileo synthesis libraries and interfaces • Core Technology CD are available from Exemplar Logic • CAE Libraries CD Synplicity • On-line Documentation CD with DynaText browser • Hardware Cable • Synplify synthesis libraries and interfaces are available • Demoboard from Synplicity Model Technology Device Support: • ModelSim, V-System HDL simulation libraries and • CPLDs: interface - XC9500 • FPGAs: - XC4000E/X Up to XC4010E/X Contact your local EDA sales office to purchase these EDA - Spartan tools. - XC3x00A/L - XC5200 Up to XC5210 FPGAs Support and Updates Include: • Answers Database - http://www.xilinx.com or Answers electronic book included. • Hotline Telephone Support • Apps FAX and E-Mail • Online Documentation • World Wide Web Access • Technical Newletter • Extensive Application Notes • Software Updates (for in-maintenance customers) - A period of maintenance is included with new design system licenses, after which annual maintenance contracts may be purchased. Contact your Xilinx sales representative for more information

2-8 November 25, 1997 (Version 2.0) Required Hardware Environment (PC) Required Hardware Environment • Fully IBM compatible PC486/Pentium (Workstation) - NEC98 supported • Ultra Sparc (or equivalent) • Windows 95, Windows NT 4.0 - Sun OS 4.1.3 and 4.1.4 - Chinese, Korean and Japanese versions - Solaris 2.5 • Minimum 300 Mbytes hard-disk space • HP715 (or equivalent) • CD-ROM drive - HP-UX 10.2 • VGA display • RS6000 • Serial port mouse - AIX 4.1.5 (no GUIs) • One parallel and two serial ports • 64 MB RAM (Use additional to increase performance) • 32 MB RAM (Use additional RAM to increase • 64MB min Swap Space performance) • Color Monitor • 32 MB - 64 MB Virtual Memory

November 25, 1997 (Version 2.0) 2-9 Development Systems: Product Descriptions

Alliance Series: Alliance Standard (PC or Workstation) Overview Libraries and Interfaces Next generation FPGA/CPLD design solutions leveraging Cadence “Open Systems” integration with premier EDA partners for • Concept schematic libraries and Verilog-XL simulation unlimited gate capacity. models Base System Features: Mentor • EDA Libraries & Interfaces • Falcon Framework schematic capture library and • Design Manager and Flow Engine ModelSim simulation models • LogiBLOX Module Generator • Leonardo synthesis libraries and interfaces are • Gate Optimizer available from Mentor or Exemplar Logic • Full HDL design methodology support Synopsys • Incremental design capabilities • HDL Design Solutions (VHDL and Verilog) • Place and route utilizing SMARTspecs • Design Compiler, FPGA Compiler II, FPGA Express, • Re-entrant router VSS • Multi-pass PAR • Vital Simulation models • Timing Analyzer • DesignWare arithmetic modules • Standard netlist and backannotation (EDIF, SDF, VITAL * No libraries required to support FPGA Express VHDL and Verilog) • Xchecker Hardware Debugger (workstation only) VIEWlogic • Workview Office schematic capture library and Package Includes: functional and timing simulation interface • Alliance Quick Start Guide Exemplar • Alliance Release Document • Leonardo and Galileo synthesis libraries and interfaces • Answer Database are available from Exemplar Logic • Core Technology CD • CAE Libraries CD Synplicity • On-line Documentation CD with DynaText browser • Synplify synthesis libraries and interfaces are available • Hardware Cable from Synplicity • Demoboard Model Technology Device Support: • ModelSim, V-System HDL simulation libraries and • CPLDs: interface - XC9500 • FPGAs: Contact your local EDA sales office to purchase these EDA - XC4000E/X tools. - Spartan - XC3x00A/L Support and Updates Include: - XC5200 • Answers Database - http://www.xilinx.com or Answers electronic book included. • Hotline Telephone Support • Apps FAX and E-Mail • Online Documentation • World Wide Web Access • Technical Newletter • Extensive Application Notes • Software Updates (for in-maintenance customers) - A period of maintenance is included with new design system licenses, after which annual maintenance contracts may be purchased. Contact your Xilinx sales representative for more information

2-10 November 25, 1997 (Version 2.0) Required Hardware Environment (PC) Required Hardware Environment • Fully IBM compatible PC486/Pentium (Workstation) - NEC98 supported • Ultra Sparc (or equivalent) • Windows 95, Windows NT 4.0 - Sun OS 4.1.3 and 4.1.4 - Chinese, Korean and Japanese versions - Solaris 2.5 • Minimum 300 Mbytes hard-disk space • HP715 (or equivalent) • CD-ROM drive - HP-UX 10.2 • VGA display • RS6000 • Serial port mouse - AIX 4.1.5 (no GUIs) • One parallel and two serial ports • Small Devices: (28K or <) XC4000E; • Small Devices: (8K or <) XC9536 - XC95108; XC4028EX - XC4036EX; XC4005XL - XC4028XL XC4003E - XC4008E; XC4005XL - XC4008XL - 64 MB RAM (Use additional RAM to increase - 32 MB RAM (Use additional RAM to increase performance) performance) - 64MB min Swap Space - 32 -64 MB Virtual Memory • Large Devices (36K or >) XC4036XL - XC4062XL • Medium Devices: (10K- 28K) XC95144 - XC95216; - 128 MB RAM (Use additional RAM to increase XC4010E - XC4025E; XC4028EX - XC4036EX; performance) XC4010XL - XC4028XL - 128 MB min Swap Space - 64 MB RAM (Use additional RAM to increase • Color Monitor performance) - 64-128 MB Virtual Memory • Large Devices: (36K or >) XC4036XL - XC4062XL - 128K RAM (Use additional RAM to increase performance) - 128 - 256 MB Virtual Memory

November 25, 1997 (Version 2.0) 2-11 Development Systems: Product Descriptions

Alliance Series Options (PC) Overview Support and Updates Include: VIEWlogic Workview Office schematic capture and gate • Answers Database - http://www.xilinx.com or Answers simulator development system with libraries and interfaces electronic book included. for Xilinx FPGAs and CPLDs. • Hotline Telephone Support • Apps FAX and E-Mail Workview Office Standard Features: • Software Updates (for in-maintenance customers) • Workview Office schematic editor • Online Documentation • Workview Office gate simulator • World Wide Web Access • Libraries and interfaces • Technical Newletter • Hotline support • Extensive Application Notes • Software maintenance for 90-days Required Hardware Environment: Libraries Support: • Fully IBM compatible PC486/Pentium • CPLDs: • Windows 95, Windows NT 4.0 - XC9500 - Chinese, Korean and Japanese versions • FPGAs: • Minimum 500 Mbytes hard-disk space - XC4000E/X • CD-ROM drive - Spartan • VGA display - XC3x00A/L • Serial port mouse - XC5200 • One parallel and two serial ports • 64 Mbytes RAM recommended (increase to improve performance)

2-12 November 25, 1997 (Version 2.0)