Efficient Large Electromagnetic Simulation Based on Hybrid TLM

Total Page:16

File Type:pdf, Size:1020Kb

Efficient Large Electromagnetic Simulation Based on Hybrid TLM Efficient large electromagnetic simulation based on hybrid TLM and modal approach on grid computing and supercomputer Mihai Alexandru To cite this version: Mihai Alexandru. Efficient large electromagnetic simulation based on hybrid TLM and modal ap- proach on grid computing and supercomputer. Micro and nanotechnologies/Microelectronics. Institut National Polytechnique de Toulouse - INPT, 2012. English. tel-00797061 HAL Id: tel-00797061 https://tel.archives-ouvertes.fr/tel-00797061 Submitted on 5 Mar 2013 HAL is a multi-disciplinary open access L’archive ouverte pluridisciplinaire HAL, est archive for the deposit and dissemination of sci- destinée au dépôt et à la diffusion de documents entific research documents, whether they are pub- scientifiques de niveau recherche, publiés ou non, lished or not. The documents may come from émanant des établissements d’enseignement et de teaching and research institutions in France or recherche français ou étrangers, des laboratoires abroad, or from public or private research centers. publics ou privés. ฀ ฀ ฀฀฀฀฀ %0$503"5%&-6/*7&34*5²฀ %&506-064& ฀฀ Institut National Polytechnique฀ de Toulouse (INP Toulouse) ฀฀฀ Micro-ondes, Electromagnétisme฀ et Optoélectronique ฀ ฀฀฀฀฀฀ Mihai ALEXANDRU฀ ฀ vendredi 14 décembre 2012 ฀ ฀ ฀฀ Efficient large electromagnetic simulation based on hybrid TLM and modal฀ approach on grid computing and฀ supercomputer ฀ ฀฀฀ Génie Electrique, Electronique฀ et Télécommunications (GEET) ฀฀฀฀ LAAS-CNRS ฀฀฀ PR Hervé AUBERT MCU Thierry MONTEIL ฀ PR Serge VERDEYME฀ DR Christian฀ PEREZ M฀฀฀: PR Roberto SORRENTINO, PR Serge VERDEYME, DR Christian PEREZ, PR Hervé AUBERT, MCU Thierry MONTEIL, Dr Fabio Coccetti, Dr Petr LORENZ THESE` en vue de l’obtention du Doctorat de l’Universit´ede Toulouse d´elivr´epar l’Institut National Polytechnique de Toulouse (INP Toulouse) Ecole Doctorale : G´enie Electrique, Electronique et T´el´ecommunications (GEET) Discipline : Micro-ondes, Electromagn´etisme et Opto´electronique pr´esent´ee et soutenue par Mihai ALEXANDRU le 14 d´ecembre 2012 Efficient large electromagnetic simulation based on hybrid TLM and modal approach on grid computing and supercomputer Jury M.SergeVERDEYME Rapporteur M.ChristianPEREZ Rapporteur M.Herv´eAUBERT Directeurdeth`ese M.ThierryMONTEIL Co-Directeurdeth`ese M. Roberto SORRENTINO Examinateur M.FabioCOCCETTI Examinateur M.PetrLORENZ Invit´e I would like to dedicate this thesis to my loving parents ... Remerciements Ce travail a ´et´er´ealis´eau Laboratoire d’Analyse et d’Architecture des Syst`emes (LAAS) `aToulouse, au sein des groupes de recherche MINC et MRS (devenu par la suite SARA). J’exprime ma profonde gratitude `al’´egard de Messieurs Herv´eAubert, Professeur `al’ENSEEIHT et Thierry Monteil, Maˆıtre des Conf´erences `a l’INSA de Toulouse, pour m’avoir propos´ece sujet de recherche et pour avoir dirig´emon parcours. Leur dynamisme et leurs comp´etences scientifiques ont constitu´ele support qui m’a permis d’aboutir aux r´esultats de cette th`ese. J’adresse toute l’expression de ma reconnaissance aux Messieurs Serge Verdeyme, Professeur `al’Universit´ede Limoges, et Christian Perez, Directeur de recherche `al’INRIA de Lyon, pour avoir accept´ed’ˆetre rapporteurs de ma th`ese. Je les remercie notamment pour l’int´erˆet manifest´epour ce travail. Je suis tr`es sensible `ala pr´esence dans mon jury de th`ese de Monsieur Roberto Sorrentino, Professeur `al’Universit´ede Perugia, Italie, qui m’a fait l’honneur de pr´esider le jury. Je le remercie pour l’examen attentif port´e`ama th`ese. Je remercie vivement Monsieur Fabio Coccetti, charg´ede recherche au LAAS- CNRS, pour l’aide apport´ee `amon travail tout au long de la th`ese et pour avoir pris part `ace jury. J’exprime ´egalement ma profonde gratitude `aMonsieur Petr Lorenz pour le sup- port dans la validation du code de calcul. Toute mon amiti´e`aCristian Ruiz et Tom Gu´erout pour les collaborations fructueuses que nous avons men´ees ensemble. Je remercie ´egalement Alexandru Takacs et Daniela Dragomirescu pour les mo- ments pass´es ensemble, pour leurs conseils et leur gentillesse. J’exprime toute mon amiti´e`aNuria Torres Matabosch et Mariano Ercoli avec qui j’ai partag´ele bureau pendant pr´esque trois ans. Je leur souhaite beaucoup de bien. Un GRAND merci `atous mes coll`egues de laboratoire, pour les discussions tr`es vari´ees tout au long de ces trois ann´ees: Dina Medhat, Giancarlo Vincenzi, Hong Liu (Patricia), Franck Chebila, Tonio Idda, Farook Ahmad Tahir, Badreddine Ougague, Florian Perget, Rosa De Paolis, Sofiene Bouaziz, Khaldoun Saleh, Serge Karboyan, Aur´elien Gonzalez, R´emi Sharrock, Ahmad Al Sheikh, Jean-Marie Codol, Robert Guduvan, Miruna Stoicescu, Georgia Deaconu et Roxana Albu. Enfin, je tiens `aremercier le LAAS, notamment le service du personnel, le service Gestion financi`ere, le magasin, le service Logistique et infrastructure, le service Information Scientifique et Technique-Edition. Abstract In the context of Information Communications Technology (ICT), the major challenge is to create systems increasingly small, boarding more and more intel- ligence, hardware and software, including complex communicating architectures. This requires robust design methodologies to reduce the development cycle and prototyping phase. Thus, the design and optimization of physical layer commu- nication is paramount. The complexity of these systems makes them difficult to optimize, because of the explosion in the number of unknown parameters. The methods and tools developed in past years will be eventually inadequate to address problems that lie ahead. Communicating objects will be very often integrated into cluttered environments with all kinds of metal structures and dielectric larger or smaller sizes compared to the wavelength. The designer must anticipate the presence of such barriers in the propagation channel to establish properly link budgets and an optimal design of the communicating object. For example, the wave propagation in an airplane cabin from sensors or even an antenna, towards the cockpit is greatly affected by the presence of the metal structure of the seats inside the cabin or even the passengers. So, we must absolutely take into account this perturbation to predict correctly the power balance between the antenna and a possible receiver. More generally, this topic will address the theoretical and computational elec- tromagnetics in order to propose an implementation of informatics tools for the rigorous calculation of electromagnetic scattering inside very large structures or radiation antenna placed near oversized objects. This calculation involves the numerical solution of very large systems inaccessible by traditional resources. The solution will be based on grid computing and supercomputers. Electromagnetic modeling of oversized structures by means of different numer- ical methods, using new resources (hardware and software) to realize yet more performant calculations, is the aim of this work. The numerical modeling is based on a hybrid approach which combines Transmis- sion-Line Matrix (TLM) and the mode matching methods. The former is applied to homogeneous volumes while the latter is used to describe complex planar structures. In order to accelerate the simulation, a parallel implementation of the TLM algorithm in the context of distributed computing paradigm is proposed. The subdomain of the structure which is discretized upon TLM is divided into several parts called tasks, each one being computed in parallel by different processors. To achieve this, the tasks communicate between them during the simulation by a message passing library. An extension of the modal approach to various modes has been developped by increasing the complexity of the planar structures. The results prove the benefits of the combined grid computing and hybrid ap- proach to solve electrically large structures, by matching the size of the problem with the number of computing resources used. The study highlights the role of parallelization scheme, cluster versus grid, with respect to the size of the problem and its repartition. Moreover, a prediction model for the computing performances on grid, based on a hybrid approach that combines a historic-based prediction and an application profile-based prediction, has been developped. The predicted values are in good agreement with the measured values. The analysis of the simulation performances has allowed to extract practical rules for the estimation of the required resources for a given problem. Using all these tools, the propagation of the electromagnetic field inside a complex oversized structure such an airplane cabin, has been performed on grid and also on a supercomputer. The advantages and disadvantages of the two environments are discussed. Contents Contents vii List of Figures ix List of Tables xiii Abbreviations xv 1 Introduction 1 1.1 Backgroundandmotivation . 1 1.2 Objectifsandcontributions . .... 1 1.3 Structureofthethesis ............................ 2 2 Computational Electromagnetics 5 2.1 NumericalModeling ............................... 5 2.2 ComputationalElectromagnetics(CEM) . ...... 6 2.3 ClassificationofNumericalMethodsinCEM . ..... 8 2.4 AnalyticalandNumericalIssuesinCEM . ... 9 2.5 Transmission-Line Matrix vs Finite-Difference Time-Domain ......... 11 2.6 Conclusions .................................... 11 3 Parallel Computing 13 3.1 Parallelanddistributed architectures . ......... 14 3.1.1 Gridcomputing.............................. 15 3.1.1.1 Grid’5000platform . 18 3.1.2 Hyperion-Calmip ............................
Recommended publications
  • Parallelization Hardware Architecture Type to Enter Text
    Parallelization Hardware architecture Type to enter text Delft University of Technology Challenge the future Contents • Introduction • Classification of systems • Topology • Clusters and Grid • Fun Hardware 2 hybrid parallel vector superscalar scalar 3 Why Parallel Computing Primary reasons: • Save time • Solve larger problems • Provide concurrency (do multiple things at the same time) Classification of HPC hardware • Architecture • Memory organization 5 1st Classification: Architecture • There are several different methods used to classify computers • No single taxonomy fits all designs • Flynn's taxonomy uses the relationship of program instructions to program data • SISD - Single Instruction, Single Data Stream • SIMD - Single Instruction, Multiple Data Stream • MISD - Multiple Instruction, Single Data Stream • MIMD - Multiple Instruction, Multiple Data Stream 6 Flynn’s Taxonomy • SISD: single instruction and single data stream: uniprocessor • SIMD: vector architectures: lower flexibility • MISD: no commercial multiprocessor: imagine data going through a pipeline of execution engines • MIMD: most multiprocessors today: easy to construct with off-the-shelf computers, most flexibility 7 SISD • One instruction stream • One data stream • One instruction issued on each clock cycle • One instruction executed on single element(s) of data (scalar) at a time • Traditional ‘von Neumann’ architecture (remember from introduction) 8 SIMD • Also von Neumann architectures but more powerful instructions • Each instruction may operate on more than one data element • Usually intermediate host executes program logic and broadcasts instructions to other processors • Synchronous (lockstep) • Rating how fast these machines can issue instructions is not a good measure of their performance • Two major types: • Vector SIMD • Parallel SIMD 9 Vector SIMD • Single instruction results in multiple operands being updated • Scalar processing operates on single data elements.
    [Show full text]
  • DE86 006665 Comparison of the CRAY X-MP-4, Fujitsu VP-200, And
    Distribution Category: Mathematics and Computers General (UC-32) ANL--85-1 9 DE86 006665 ARGONNE NATIONAL LABORATORY 9700 South Cass Avenue Argonne, Illinois 60439 Comparison of the CRAY X-MP-4, Fujitsu VP-200, and Hitachi S-810/20: An Argonne Perspcctive Jack J. Dongarra Mathematics and Computer Science Division and Alan Hinds Computing Services October 1985 DISCLAIMER This report was prepared as an account of work sponsored by an agency o h ntdSae Government. Neither the United States Government nor any agency of the United States employees, makes any warranty, express or implied, or assumes ancy thereof, nor any of their bility for the accuracy, completeness, or usefulness of any informany legal liability or responsi- process disclosed, or represents that its use would nyinformation, apparatus, product, or ence enceherinherein tooay any specificcomriseii commercial rdt not infringe privately owned rights. Refer- product, process, or service by trade name, trademak manufacturer, or otherwise does not necessarily constitute or imply itsenrme, r ark, mendation, or favoring by the United States Government or any ag endorsement, recom- and opinions of authors expressed herein do not necessarily st agency thereof. The views United States Government or any agency thereof.ry to or reflect those of the DISTRIBUTION OF THIS DOCUMENT IS UNLIMITE Table of Contents List of Tables v List of Figures v Abstract 1 1. Introduction 1 2. Architectures 1 2.1 CRAY X-MP 2 2.2 Fujitsu VP-200 4 2.3 Hitachi S-810/20 6 3. Comparison of Computers 8 3.1 IBM Compatibility
    [Show full text]
  • Performance of Various Computers Using Standard Linear Equations Software
    ———————— CS - 89 - 85 ———————— Performance of Various Computers Using Standard Linear Equations Software Jack J. Dongarra* Electrical Engineering and Computer Science Department University of Tennessee Knoxville, TN 37996-1301 Computer Science and Mathematics Division Oak Ridge National Laboratory Oak Ridge, TN 37831 University of Manchester CS - 89 - 85 June 15, 2014 * Electronic mail address: [email protected]. An up-to-date version of this report can be found at http://www.netlib.org/benchmark/performance.ps This work was supported in part by the Applied Mathematical Sciences subprogram of the Office of Energy Research, U.S. Department of Energy, under Contract DE-AC05-96OR22464, and in part by the Science Alliance a state supported program at the University of Tennessee. 6/15/2014 2 Performance of Various Computers Using Standard Linear Equations Software Jack J. Dongarra Electrical Engineering and Computer Science Department University of Tennessee Knoxville, TN 37996-1301 Computer Science and Mathematics Division Oak Ridge National Laboratory Oak Ridge, TN 37831 University of Manchester June 15, 2014 Abstract This report compares the performance of different computer systems in solving dense systems of linear equations. The comparison involves approximately a hundred computers, ranging from the Earth Simulator to personal computers. 1. Introduction and Objectives The timing information presented here should in no way be used to judge the overall performance of a computer system. The results reflect only one problem area: solving dense systems of equations. This report provides performance information on a wide assortment of computers ranging from the home-used PC up to the most powerful supercomputers. The information has been collected over a period of time and will undergo change as new machines are added and as hardware and software systems improve.
    [Show full text]
  • Performance of Various Computers Using Standard Linear Equations Software
    ———————— CS - 89 - 85 ———————— Performance of Various Computers Using Standard Linear Equations Software Jack J. Dongarra* Electrical Engineering and Computer Science Department University of Tennessee Knoxville, TN 37996-1301 Computer Science and Mathematics Division Oak Ridge National Laboratory Oak Ridge, TN 37831 University of Manchester CS - 89 - 85 September 30, 2009 * Electronic mail address: [email protected]. An up-to-date version of this report can be found at http://WWW.netlib.org/benchmark/performance.ps This Work Was supported in part by the Applied Mathematical Sciences subprogram of the Office of Energy Research, U.S. Department of Energy, under Contract DE-AC05-96OR22464, and in part by the Science Alliance a state supported program at the University of Tennessee. 9/30/2009 2 Performance of Various Computers Using Standard Linear Equations Software Jack J. Dongarra Electrical Engineering and Computer Science Department University of Tennessee Knoxville, TN 37996-1301 Computer Science and MatHematics Division Oak Ridge National Laboratory Oak Ridge, TN 37831 University of Manchester September 30, 2009 Abstract This report compares the performance of different computer systems in solving dense systems of linear equations. The comparison involves approximately a hundred computers, ranging from the Earth Simulator to personal computers. 1. Introduction and Objectives The timing information presented here should in no way be used to judge the overall performance of a computer system. The results reflect only one problem area: solving dense systems of equations. This report provides performance information on a wide assortment of computers ranging from the home-used PC up to the most powerful supercomputers. The information has been collected over a period of time and will undergo change as new machines are added and as hardware and software systems improve.
    [Show full text]
  • Fujitsu Data Book 2014
    FUJITSU DATA BOOK Published October 2014 Contents Corporate Data FUJITSU Way 2 Corporate Data 3 Management Direction Fiscal 2014 4 Organizational Chart 6 Management 7 CSR and Environmental Activities 13 Financial Information 14 Principal Development and Manufacturing Facilities in Japan 18 Listed Subsidiaries in Japan 20 Principal Subsidiaries and Affiliated Companies 21 Intellectual Property 26 Structural Reforms, M&A Transactions and Spin-Off Ventures 27 History of Fujitsu 29 Fujitsu’s Business Overview 38 Vendor Share by Category 40 Big Data 42 Security 43 Cloud 44 Mobile 45 Manufacturing 46 Digital Marketing 47 Transformation of Work Styles 47 Health and Medical 48 Education 49 Disaster Mitigation and Prevention 49 Food and Agriculture 50 Transport and Vehicle 50 Case Studies 51 System Products 52 High Performance Computing (HPC) 54 Network Products 56 Ubiquitous Solutions 58 Research & Development (Fujitsu Laboratories Ltd.) 60 FUJITSU DATA BOOK 1 Corporate Data Corporate FUJITSU Way The Fujitsu Way embodies the philosophy of the Fujitsu Group, our reason for existence, values and the principles that we follow in our daily activities. The Fujitsu Way will facilitates management innovation and promotes a unified direction for the Fujitsu Group as we expand our global business activities, bringing innovative technology and solutions to every corner of the globe. The Fujitsu Way provides a common direction for all employees of the Fujitsu Group. By adhering to its FUJITSU Way principles and values, employees enhance corporate value and their contributions to global and local societies. Corporate Through our constant pursuit of innovation, the Fujitsu Group aims to contribute to the creation of a networked society that is rewarding and secure, bringing Vision about a prosperous future that fulfills the dreams of people throughout the world.
    [Show full text]
  • Uniform Random Number Generators for Vector and Parallel Computers∗
    Uniform Random Number Generators for Vector and Parallel Computers∗ Richard P. Brent Computer Sciences Laboratory Australian National University Canberra, ACT 0200 [email protected] Report TR-CS-92-02 March 1992 Abstract We consider the requirements for uniform pseudo-random number generators on modern vector and parallel machines; consider the pros and cons of various popular classes of methods and some new methods; and outline what is currently available. We then make a proposal for a class of random number generators which have good statistical properties and can be implemented efficiently on vector processors and parallel machines. A proposal regarding initialization of these generators is made. We also discuss the results of a trial implementation on a Fujitsu VP 2200/10 vector processor. 1 Introduction – Requirements Pseudo-random numbers have been used in Monte Carlo calculations [1, 15, 25, 29] since the pioneering days of Von Neumann [28]. With the increasing speed of vector processors and parallel computers, considerable attention must be paid to the quality of random number generators available in subroutine libraries. A program running on a supercomputer might use 108 random numbers per second over a period of many hours (or months in the case of QCD calculations), so 1012 or more random numbers might contribute to the result. Small correlations or other deficiencies in the random number generator could easily lead to spurious effects and invalidate the results of the computation. Applications require random numbers with various distributions (e.g. normal, exponential, Poisson, ...) but the algorithms used to generate these random numbers almost invariably require a good uniform random number generator – see for example [2, 16, 32].
    [Show full text]
  • Recent Supercomputing Development in Japan
    Development of Supercomputers in Japan --From the Numerical Wind Tunnel to Fugaku-- Yoshio Oyanagi Science Advisor, RIST Kobe Center (高度情報科学技術研究機構) 2019/9/5 KSC 2019 1 How computers started in Japan PREHISTORY 2019/9/5 KSC 2019 2 “Computers” before WWII • Many Powers/Hollerith Punch Card Systems have been introduced to Japan since 1923 • The first one in universities: IBM Punch Card Systems in Kobe Univ. in 1941 • Since no PCS could be imported during WWII, Japan tried to copy the machine. • The next slide shows computer history exhibit of Kobe Univ. RIEB (Res. Inst. for Economics and Business Administration) . 2019/9/5 KSC 2019 3 2019/9/5 KSC 2019 4 Universities in 1950’s and 1960’s • Big computers were too expensive to buy with ordinary budget (we were poor, then!) • Some universities introduced small computers • Some universities developed computers by themselves – TAC 1952-1959 Univ. of Tokyo (Eng.) (with Toshiba) V – (no name) 1953-unfinished Osaka Univ. V – PC-1 1956- 1958 Univ. of Tokyo (Sci.) P – KDC-1 1958-1960 Kyoto Univ. (with Hitachi) T – SENAC-1 1956-1958 Tohoku Univ. (with NEC) P – K-1 1958-1960 Keio Univ. T • Those computers were open to teachers and students in the campus and were heavily used 2019/9/5 KSC 2019 5 PC-1 in Univ. of Tokyo (hand made) 2019/9/5 KSC 2019 6 Authorized Computer Centers • 1963/5/13 Recommendation of Science Council of Japan • 1963/7 Budget Proposal from Univ. of Tokyo • 1964/3 Accepted by government • Finalist computers were: – Hitachi HITAC 5020 (under development) – IBM 7094 II (popular but out-of-date) – CDC 3600 (new in Japan) • 1964/5 Committee selected HITAC 5020 – Rejected American computers 2019/9/5 KSC 2019 7 Computer Center, Univ.
    [Show full text]
  • ANL-85-19.Pdf
    ANL-85-19 ANL.85-19 COMPARISON OF THE CRAY X-MP.4, FUJITSU VP-200, AND HITACHI S-810/20 AN ARGONNE PERSPECTIVE by Jack J. Dongarra and Alan Hinds •-v '^y Of ARGONNE NATIONAL LABORATORY, ARGONNE, ILLINOIS Operated by THE UNIVERSITY OF CHICAGO for the U. S. DEPARTMENT OF ENERGY under Contract W-31-109-Eng-38 Argonne National Laboratory, with facilities in the states of Illinois and Idaho, is owned by the United States government, and operated by The University of Chicago under the provisions of a contract with the Department of Energy. DISCLAIMER This report was prepared as an account of work sponsored by an agency of the United States Government. Neither the United States Government nor any agency thereof, nor any of their employees, makes any warranty, express or implied, or assumes any legal liability or responsibility for the accuracy, com­ pleteness, or usefulness of any information, apparatus, product, or process disclosed, or represents that its use would not infringe privately owned rights. Reference herein to any specific com­ mercial product, process, or service by trade name, trademark, manufacturer, or otherwise, does not necessarily constitute or imply its endorsement, recommendation, or favoring by the United States Government or any agency thereof. The views and opinions of authors expressed herein do not necessarily state or reflect those of the United States Government or any agency thereof. Printed in the United States of America Available from National Technical Information Service U. S. Department of Commerce 5285 Port Royal Road Springfield, VA 22161 NTIS price codes Printed copy: A03 Microfiche copy: AOl Distribution Category: Mathematics and Computers General (UC-32) ANL-85-19 ARGONNE NATIONAL LABORATORY 9700 South Cass Avenue Argonne, Illinois 60439 Comparison of the CRAY X-MP-4, Fujitsu VP.200, and Hitachi S-810/20: An Argonne Perspective Jack J.
    [Show full text]
  • Vector Microprocessors
    Vector Microprocessors by Krste AsanoviÂc B.A. (University of Cambridge) 1987 A dissertation submitted in partial satisfaction of the requirements for the degree of Doctor of Philosophy in Computer Science in the GRADUATE DIVISION of the UNIVERSITY of CALIFORNIA, BERKELEY Committee in charge: Professor John Wawrzynek, Chair Professor David A. Patterson Professor David Wessel Spring 1998 The dissertation of Krste AsanoviÂc is approved: Chair Date Date Date University of California, Berkeley Spring 1998 Vector Microprocessors Copyright 1998 by Krste AsanoviÂc 1 Abstract Vector Microprocessors by Krste AsanoviÂc Doctor of Philosophy in Computer Science University of California, Berkeley Professor John Wawrzynek, Chair Most previous research into vector architectures has concentrated on supercomputing applications and small enhancements to existing vector supercomputer implementations. This thesis expands the body of vector research by examining designs appropriate for single-chip full-custom vector microprocessor imple- mentations targeting a much broader range of applications. I present the design, implementation, and evaluation of T0 (Torrent-0): the ®rst single-chip vector microprocessor. T0 is a compact but highly parallel processor that can sustain over 24 operations per cycle while issuing only a single 32-bit instruction per cycle. T0 demonstrates that vector architectures are well suited to full-custom VLSI implementation and that they perform well on many multimedia and human-machine interface tasks. The remainder of the thesis contains proposals for future vector microprocessor designs. I show that the most area-ef®cient vector register ®le designs have several banks with several ports, rather than many banks with few ports as used by traditional vector supercomputers, or one bank with many ports as used by superscalar microprocessors.
    [Show full text]
  • Fujitsu Group Sustainability Report [Detailed Version] 2012
    Fujitsu Group Sustainability Report 2012 Report Sustainability Group Fujitsu Fujitsu Group Sustainability Report 2012 Detailed version The Power of ICT for sustainability and beyond CONTENTS Special Feature: The Power of ICT ............................................................................................................................................ 1 Message from Management ................................................................................................................................................... 5 Fujitsu Envisions Smart Cities .................................................................................................................................................. 8 The Fujitsu Group's CSR ......................................................................................................................................................... 12 [Priority 1] Providing Opportunities and Security Through ICT ............................................................................................... 24 [Priority 2] Protecting the Global Environment ..................................................................................................................... 32 Environmental Management at the Fujitsu Group ...................................................................................................... 33 Highlight - Contribution to Advanced Environmental Monitoring at an Industrial Estate in Thailand ......................... 52 Environmental Burden Reduction Project by Green ICT,
    [Show full text]
  • The Impact of Memory and Architecture on Computer Performance
    The Impact of Memory and Architecture on Computer Performance Nelson H. F. Beebe Center for Scienti®c Computing Department of Mathematics University of Utah Salt Lake City, UT 84112 USA Tel: +1 801 581 5254 FAX: +1 801 581 4148 Internet: [email protected] 28 March 1994 Version 1.03 CONTENTS i Contents 1 Introduction 1 2 Acronyms and units 3 3 Memory hierarchy 5 3.1 Complex and reduced instruction sets ............... 6 3.2 Registers ................................. 15 3.3 Cache memory .............................. 18 3.4 Main memory .............................. 19 3.4.1 Main memory technologies .................. 20 3.4.2 Cost of main memory ..................... 22 3.4.3 Main memory size ....................... 23 3.4.4 Segmented memory ...................... 27 3.4.5 Memory alignment ....................... 30 3.5 Virtual memory ............................. 31 4 Memory bottlenecks 33 4.1 Cache con¯icts ............................. 33 4.2 Memory bank con¯icts ......................... 35 4.3 Virtual memory page thrashing ................... 36 4.4 Registers and data ........................... 39 5 Conclusions 45 6 Further reading 45 References 48 Index 57 ii CONTENTS LIST OF FIGURES iii List of Figures 1 CPU and memory performance .................... 2 2 Rising clock rates of supercomputers and microcomputers ... 3 3 Computer memory capacity pre®xes ................ 4 4 Metric pre®xes for small quantities ................. 4 5 Memory hierarchy: size and performance ............. 6 6 Cost and access time of memory technologies .......... 6 7 Price and speed of computer disk storage ............. 7 8 Selected entries from the Datamation 100 ............. 10 9 Instruction set sizes .......................... 12 10 CPU instruction formats ........................ 15 11 Register counts for various architectures ..............17 12 Memory chip price and capacity ..................
    [Show full text]
  • The Performance of the Nec Sx-2 Supercomputer System Compated with That of the Cray X-Mp/4 and Fujitsu Vp-200
    View metadata, citation and similar papers at core.ac.uk brought to you by CORE provided by Calhoun, Institutional Archive of the Naval Postgraduate School NPS-53-86-011 NAVAL POSTGRADUATE SCHOOL Monterey, California THE PERFORMANCE OF THE NEC SX-2 SUPERCOMPUTER SYSTEM COMPATED WITH THAT OF THE CRAY X-MP/4 AND FUJITSU VP-200 by Raul H. Mendez September 1986 Technical Report For Period April - August 1986 Approved for public release; distribution unlimited Prepared for: Naval Postgraduate School Monterey, CA 93943-5000 PedDocs D 208.14/2 NPS-53-86-011 didx NAVAL POSTGRADUATE SCHOOL MONTEREY, CALIFORNIA 939^3 R. C. AUSTIN D. A. SCHRADY Rear Admiral, U. S. Navy Provost Superintendent Reproduction of all or part of this report is authorized This report was prepared by: UNCLASSIFIED SECURITY CLASSIFICATION OF THIS PAGE (Whan Dmim Zntered) READ INSTRUCTIONS REPORT DOCUMENTATION PAGE BEFORE COMPLETING FORM 1. REPORT NUMBER 2. GOVT ACCESSION NO. 3. RECIPIENT'S CATALOG NUMBER NPS-53-86-0H 4. TITLE (and Submit) 5. TYPE OF REPORT a PERIOD COVERED Technical Report April - August 1986 6. PERFORMING ORG. REPORT NUMBER 7. AUTHORr«J 9. CONTRACT OR GRANT NUMBERf»J Raul H. Mendez 9. PERFORMING ORGANIZATION NAME ANO ADDRESS 10. PROGRAM ELEMENT, PROJECT, TASK AREA a WORK UNIT NUMBERS Naval Postgraduate School Monterey, CA 93943 II. CONTROLLING OFFICE NAME AND ADDRESS 12. REPORT DATE September 1986 Naval Postgraduate School Monterey, CA 93943 13. NUMBER OF PAGES 14. MONITORING AGENCY NAME a ADDRESS*- */ dt Hatant from Controlling OII<c») IS. SECURITY CLASS, (ol thla report) Unclassified IS*. DECLASSIFICATION- OOWNGRAOlNG SCHEDULE 16.
    [Show full text]