Design of Data Transfer Unit (DTU) for Tactical Network
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International Journal of Electronics Engineering Research. ISSN 0975-6450 Volume 9, Number 9 (2017) pp. 1439-1445 © Research India Publications http://www.ripublication.com Design of Data transfer unit (DTU) for Tactical Network Bikrantakeshari jena 1 and Amaresh S K 2 and Dr. Siva S Yellampalli3 Department of Digital Electronics, VTU Extension Centre, UTL Technologies Ltd Bangalore, India. Abstract Real-time operating systems (RTOSs) are often used to develop applications for systems with complex time and resource constraints [1]. RTOSs are deterministic by design, which allows them to meet deadlines associated with external events using a limited set of resources. Data transfer Unit (DTU) is interface equipment in the integration of tactical system in Tactical network. It provides communication with Tactical system which delivers digital data over CNR radio / Line media to Launcher. It transfers customized Ethernet packets over wired or wireless media through serial/Ethernet port. DTU supports the radio media to interface with Digital Radio as well as line media. Keywords: RTOS;Tactical; CNR; baudrate; vXWorks;EPLD I. INTRODUCTION A real-time operating system (RTOS) is an operating system (OS) intended to serve real-time applications that process data as it comes in, typically without buffer delays[10]. The aim of proposed work to design and develop a Real time system which transfers customized Ethernet packets over wired or wireless media. The proposed system designs are developed using Vxworks real time operating system and Tornado Wind River tool. It provides an integrated development platform, thus simplifying the development process. Programs can be developed and simulated in the host system before downloading them to the target system. The functionality of the interface unit is verified through simulation software [7]. The DTU is built on Power PC based Single board computer (SBC) with PC 104 bus 1440 Bikrantakeshari jena and Amaresh S K and Dr. Siva S Yellampalli interface and add on card to facilitate interface with wired and wireless media. The Unit is designed using SBC, an Interface Card Fig 1. Functional Block Diagram DTU Single Board Computer (SBC) DTU is built on PC104 based Single Board Computer (SBC) with Processor IBM PC/104 – plus SBC with 40 MHz power PC 128 MB SDRAM. It provides two Serial ports, USB ports, IDE port. It interfaces to Digital radio through Data transfer interface card, which is stacked over its PC104 Bus. Fig 2- Functional Block Diagram SBC with PC104 Design of Data transfer unit (DTU) for Tactical Network 1441 Data transfer interface Card consists of all the hardware required to interface the SBC to the radio. It supports two channels of digital radio. This channel is configured for various baud rates. The Enhanced Serial Communication Controller ESCC2 (SAB 82532/SAF 82532) is a multiprotocol data communication controller with two symmetrical serial channels. It has been designed to implement high-speed communication links and to reduce hardware and software overhead needed for serial synchronous/asynchronous communications Each channel contains an independent clock generator, DPLL, encoder/decoder and program- mable protocol hardware. Data communication with asynchronous, synchronous character oriented, and HDLC based protocols with extend- ed support of X.25 LAPB, the ISDN LAPD, and SDLC protocols is implemented. Like the SAB 82525 (HSCX) which is a functional subset of the ESCC2, the ESCC2 is capable of handling a large set of layer-2 protocol functions independently of the host processor. Enhanced Serial Communication Controller (ESCC2)opens a wide area for applications which use time division multiplex methods (e.g. time-slot oriented PCM systems, systems designed for packet switching, ISDN applications) by its programmable telecom-specific features. In this special operating mode (clock mode 5), which is applicable to all serial modes (HDLC/SDLC, ASYNC,BISYNC), the ESCC2 can transmit or receive data packets in one of up to 64 time-slots of programmable width. The device is controlled via a parallel 16-bit wide interface. The internal FIFOs (64 bytes per direction and channel) with additional DMA capability provide a powerful interface to the higher layers implemented in a microcontroller. For interrupt controlled systems, the ESCC2 supports daisy chaining and interrupt vector generation. The ESCC2 (SAB 82532/SAF 82532) comprises two completely independent full- duplex serial interfaces (channel A and channel B) which support HDLC/SDLC,BISYNC and ASYNC protocols 1442 Bikrantakeshari jena and Amaresh S K and Dr. Siva S Yellampalli Fig 3- Functional Block Diagram SAB 82532 Layer-1 functions are performed by means of internal oscillator, Baud Rate Generator (BRG), Digital Phase Locked Loop (DPLL), and Time-Slot Assignment circuits (TSA, only available for versions SAB/SAF 82532 N-10 and SAB/SAF 82532 H-10). Encoding/decoding of serial data can be done by using NRZ, NRZI, FM0, FM1 and Manchester encoding schemes. An 8-bit universal bidirectional port is provided which can be used for additional modem control lines or for general I/O purposes. Each serial channel is a set of independent command and status registers and 64-byte deep FIFOs for transmit and receive direction. Access is done via the flexible 8/16-bit microprocessor interface. DMA capability has been added to the ESCC2 by means of a 4-channel DMA interface with one DMA request line for each transmitter and receiver of both channels. The interrupt structure of ESCC2 supports interrupt driven systems using interrupt polling, daisy chaining or interrupt vector control. The logic required to interface the System Bus (PC104 Bus) to various peripheral devices like ESCC (Enhanced Serial Communication Controller) and Media transmission and reception circuitry is developed in FPGA FLEX 10K30 . The FLEX 10K architecture is similar to that of embedded gate arrays, the fastest-growing segment of the gate array market. As with standard gate arrays, embedded gate arrays implement general logic in a conventional “sea-of-gates” architecture. In addition, embedded gate arrays have dedicated die areas for implementing large, specialized Design of Data transfer unit (DTU) for Tactical Network 1443 functions. By embedding functions in silicon, embedded gate arrays provide reduced die area and increased speed compared to standard gate arrays. However, embedded mega functions typically cannot be customized, limiting the designer’s options. In contrast, FLEX 10K devices are programmable, providing the designer with full control over embedded mega functions and general logic while facilitating iterative design changes during debugging. FLEX 10K devices are configured at system power-up with data stored in an Altera serial configuration device or provided by a system controller The EPC1441 devices store configuration data in its EPROM array and serially clock data out using an internal oscillator. The OE, nCS, and DCLK pins supply the control signals for the address counter. The configuration device sends a serial bitstream of configuration data to its DATA pin, which is routed to the DATA0 input of the FPGA. The control signals for configuration devices (OE, nCS, and DCLK) interface directly with the FPGA control signals (nSTATUS, CONF_DONE, and DCLK, respectively. The PTT signal for digital channel is realized through transistor, Relay. The Tx signal of channel is filtered through wave shape filters. Figure 4: Uboot for Power PC 1444 Bikrantakeshari jena and Amaresh S K and Dr. Siva S Yellampalli Figure 5: Boot application from memory The configuration data for radio canbe send from tactical system over Ethernet media. Figure 5: configuration message sent to radio IV. CONCLUSION Data transfer interface Unit (DTIU) transfers customized Ethernet packets over wired or wireless media at Command Post and provides interface with the Launcher through RS422 communication port / Ethernet port. The realtime Operating system runs (VxWorks5.5) on PPC400 processor and the customised Ethernet packet is send to digital radio through Enhanced serial communication controller. The different mode of communication as well as baud rate setting is controlled through interface unit which is verified through teraterm software. Design of Data transfer unit (DTU) for Tactical Network 1445 REFERENCES [1] A real time operating systems (RTOS) comparison RV Aroca, G Caurin, S Carlos–SP–Brasil - Sao Carlos–SP Brasil, 2009 - iitj.ac.in [2] An Overview of Real-Time Operating Systems Walter Cedeño, Ph.D.*, Phillip A. Laplante, Ph.D. [3] New Trends in Real Time Operating Systems - IOSRJEN [4] Real-Time CORBAVictor Fay-Wolfe, Lisa C. DiPippo, Gregory Cooper, Russell Johnston,Peter Kortmann, and Bhavani Thuraisingham,Senior Member,IEEE [5] Cognitive radio system using IEEE 802.11 a over UHF TVWSR Ahuja, R Corke, A Bok - … , 2008. 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