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Multi-Stage Amplifiers and Low Noise Amplifiers

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Multi-Stage Amplifiers and Low Noise Amplifiers HIGH PERFORMANCE BUILDING BLOCKS FOR WIRELESS RECEIVER: MULTI-STAGE AMPLIFIERS AND LOW NOISE AMPLIFIERS A Dissertation by XIAOHUA FAN Submitted to the Office of Graduate Studies of Texas A&M University in partial fulfillment of the requirements for the degree of DOCTOR OF PHILOSOPHY December 2007 Major Subject: Electrical Engineering HIGH PERFORMANCE BUILDING BLOCKS FOR WIRELESS RECEIVER: MULTI-STAGE AMPLIFIERS AND LOW NOISE AMPLIFIERS A Dissertation by XIAOHUA FAN Submitted to the Office of Graduate Studies of Texas A&M University in partial fulfillment of the requirements for the degree of DOCTOR OF PHILOSOPHY Approved by: Chair of Committee, Edgar Sánchez-Sinencio Committee Members, César O. Malavé Weiping Shi José Silva-Martínez Head of Department, Costas N. Georghiades December 2007 Major Subject: Electrical Engineering iii ABSTRACT High Performance Building Blocks for Wireless Receiver: Multi-Stage Amplifiers and Low Noise Amplifiers. (December 2007) Xiaohua Fan, B.S., Tsinghua University; M.S., Chinese Academy of Sciences Chair of Advisory Committee: Dr. Edgar Sánchez-Sinencio Different wireless communication systems utilizing different standards and for multiple applications have penetrated the normal people's life, such as Cell phone, Wireless LAN, Bluetooth, Ultra wideband (UWB) and WiMAX systems. The wireless receiver normally serves as the primary part of the system, which heavily influences the system performance. This research concentrates on the designs of several important blocks of the receiver; multi-stage amplifier and low noise amplifier. Two novel multi-stage amplifier typologies are proposed to improve the bandwidth and reduce the silicon area for the application where a large capacitive load exists. They were designed using AMI 0.5 µm CMOS technology. The simulation and measurement results show they have the best Figure-of-Merits (FOMs) in terms of small signal and large signal performances, with 4.6MHz and 9MHz bandwidth while consuming 0.38mW and 0.4mW power from a 2V power supply. iv Two Low Noise Amplifiers (LNAs) are proposed, with one designed for narrowband application and the other for UWB application. A noise reduction technique is proposed for the differential cascode Common Source LNA (CS-LNA), which reduces the LNA Noise Figure (NF), increases the LNA gain, and improves the LNA linearity. At the same time, a novel Common Gate LNA (CG-LNA) is proposed for UWB application, which has better linearity, lower power consumption, and reasonable noise performance. Finally a novel practical current injection built-in-test (BIT) technique is proposed for the RF Front-end circuits. If the off-chip component Lg and Rs values are well controlled, the proposed technique can estimate the voltage gain of the LNA with less than 1dB (8%) error. v To my parents, sister and beloved wife Xiaoyan. In memory of my grandfather. vi ACKNOWLEDGMENTS My experience in the Analog and Mixed Signal Center was both an important and enjoyable part of my life. At Texas A&M University (TAMU), I learned a great deal about analog circuit design, meeting many nice professors, while making many good friends. I will always remember the time that I experienced there, no matter where I will be in the future. I would like to express my special thanks and appreciations to my advisor, Dr. Edgar Sánchez-Sinencio. He guided me throughout my research. Whenever I met with difficulties, he was there to help and encourage me. When I achieved exciting results, he was there to enjoy them with me. I will always consider him as one of my best professors and best friends in my life. I am grateful to José Silva-Martínez. He is so knowledgeable that I always want to go to his office to ask questions. Special thanks to Dr. Weiping Shi. He is the one who gave me the chance to pursue the graduate study in Texas A&M University. I am also grateful to my dissertation committee member, Dr. César O. Malavé, for providing additional insight throughout this process. I can not forget the help from Ms. Ella. She is so generous and helpful a lady in our group. Without her help, I would not know how to use even the copy machine. I would like to thank Chinmaya Mishra, Marvin Onabajo, Heng Zhang and Felix Fernandez for their cooperation and contribution to my research work. I would also like to thank Dr. Bo Xia, Dr. Chunyu Xin, Dr. Hengsheng Liu, Dr. Yunchu Li, Dr. Ari. Y. Valero-Lopez, Dr. Jianhong Xiao, Dr. Shanfeng Cheng, Dr. Haitao Tong, Wenchang Huang, Xuemei Liu, Jianlong Chen and Lin Chen for their help in my personal life and valuable vii technical discussions concerning my research work. I am also thankful for the help and support from Mr. Bill Beckwith and Mr. Tom Shilitz during my summer internship at Linear Technology in 2007. My gratitude goes to all of the faculty and students at the Analog and Mixed Signal group, who have helped me in reaching my goals. Most of all, I would like to thank my parents and my sister for their support during my study. My beloved wife, Xiaoyan, always inspires me. Without her love and supports, I would never have reached this far, not even close. viii TABLE OF CONTENTS Page ABSTRACT………………… ..............................................................................................iii DEDICATION........................................................................................................................ v ACKNOWLEDGMENTS.....................................................................................................vi TABLE OF CONTENTS ....................................................................................................viii LIST OF FIGURES…………..............................................................................................xii LIST OF TABLES…………...............................................................................................xxi CHAPTER I INTRODUCTION………………. ................................................................................ 1 1.1 Motivation…………………………………………………………………..….. 2 1.2 Dissertation Organization ……………………………………………………..4 II LOW POWER MULTI-STAGE AMPLIFIER DESIGN............................................. 5 2.1 Motivation ………………………………………………………………………5 2.2 State of the Art Amplifiers…………………………………………………........6 2.2.1 Nested Miller Compensation Amplifier (NMC) …………………………7 2.2.2 Damping Factor Control Frequency Compensation Amplifier (DFCFC)..10 2.2.3 Active Feedback Frequency Compensation Amplifier (AFFC)…………12 2.2.4 Dual Loop Parallel Compensation Amplifier (DLPC)…………………..13 2.2.5 Recent Multi-Stage Amplifier Research…………………………………15 2.2.5.1 AC Boosting Compensation Amplifier (ACBC)…………………15 2.2.5.2 Transconductance with Capacitances Feedback Compensation Amplifier (TCFC)………………………………………………...17 2.2.5.3 Reversed Nested Miller Compensation with Nulling Resistor (RNMCNR) ……....……………………………………………...19 2.2.5.4 Reversed Active Feedback Frequency Compensation (RAFFC)…20 2.2.6 Summary of the Compensation Technique While Driving Large Capacitive Load…………………………………………………………22 ix CHAPTER Page 2.3 Proposed Single Miller Capacitor Compensation (SMC) and Single Miller Capacitor Feedforward Frequency Compensation (SMFFC) Amplifiers Design……………………………………………………………………….....24 2.3.1 Single Miller Capacitor Compensation Amplifier (SMC)……………….25 2.3.1.1 Structure….……………………………………………………… 25 2.3.1.2 Small Signal Analysis…………………………………………….26 2.3.1.3 Stability Analysis, Gain-Bandwidth Product, Phase Margin and Dimension Conditions……………………………………………27 2.3.1.4 Slew Rate and Settling Time……………………………………..29 2.3.2 Single Miller Capacitor Feedforward Frequency Compensation Amplifier (SMFFC)………………………………………………………30 2.3.2.1 Structure…………………………………………………………. 30 2.3.2.2 Small Signal Analysis…………………………………………….31 2.3.2.3 Stability Analysis, Gain-Bandwidth Product, Phase Margin and Dimension Conditions……………………………………………32 2.3.2.4 Slew Rate and Settling Time…………………………………….. 33 2.3.3 Design Considerations, Circuit Implementations and Design Procedure. 34 2.3.3.1 Design Procedure…………………………………………………36 2.3.4 Experiment Results, Testing Setup and Comparison…………………….39 2.3.5 Summaries of the SMC and SMFFC Amplifiers…………………………49 III LOW NOISE AMPLIFIER (LNA) OVERVIEW (NARROWBAND AND ULTRA-WIDEBAND LNA) ................................................................................... 50 3.1 Basic Metrics of LNA....……………………………………………………….50 3.1.1 S-Parameters of the LNA………………………………………………...50 3.1.2 Impedance Matching of the Low Noise Amplifier (LNA)………………53 3.1.2 Impedance Matching Network……………….…………………………..58 3.1.4 Noise Figure of the LNA…………………………………………………67 3.1.5 Linearity of the LNA…………………………………………………….77 3.2 LNA Topologies……..………………………………………………………...89 3.2.1 Narrowband LNA.……………………………………………………….89 3.2.1.1 Resistive Termination LNA………………………………………90 3.2.1.2 Common Source LNA (CS-LNA)………………………………..93 3.2.1.2.1 CS-LNA Design Procedure ............................................... 97 3.2.1.3 Common Gate LNA (CG-LNA) ................................................... 108 3.2.1.3.1 CG-LNA Design Procedure............................................. 113 3.2.1.4 Feedback LNA.............................................................................. 122 3.2.1.5 Table of Comparison ................................................................... 126 3.2.2 Wideband LNA.….................................................................................. 127 3.2.2.1 Distributed LNA .......................................................................... 129 3.2.2.1.1 Distributed LNA Design Procedure
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