Detection of Side-Channel Attacks Targeting Intel SGX Detektion Av Attacker Mot Intel SGX
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Linköping University | Department of Computer and Information Science Master’s thesis, 30 ECTS | Datateknik 2021 | LIU-IDA/LITH-EX-A--2021/057--SE Detection of side-channel attacks targeting Intel SGX Detektion av attacker mot Intel SGX David Lantz Supervisor : Felipe Boeira Examiner : Mikael Asplund Linköpings universitet SE–581 83 Linköping +46 13 28 10 00 , www.liu.se Upphovsrätt Detta dokument hålls tillgängligt på Internet - eller dess framtida ersättare - under 25 år från publicer- ingsdatum under förutsättning att inga extraordinära omständigheter uppstår. Tillgång till dokumentet innebär tillstånd för var och en att läsa, ladda ner, skriva ut enstaka ko- pior för enskilt bruk och att använda det oförändrat för ickekommersiell forskning och för undervis- ning. Överföring av upphovsrätten vid en senare tidpunkt kan inte upphäva detta tillstånd. All annan användning av dokumentet kräver upphovsmannens medgivande. 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For additional information about the Linköping University Electronic Press and its procedures for publication and for assurance of document integrity, please refer to its www home page: http://www.ep.liu.se/. © David Lantz Abstract In recent years, trusted execution environments like Intel SGX have allowed developers to protect sensitive code inside so called enclaves. These enclaves protect its code and data even in the cases of a compromised OS. However, SGX enclaves have been shown to be vulnerable to numerous side-channel attacks. Therefore, there is a need to investigate ways that such attacks against enclaves can be detected. This thesis investigates the viability of using performance counters to detect an SGX- targeting side-channel attack, specifically the recent Load Value Injection (LVI) class of at- tacks. A case study is thus presented where performance counters and a threshold-based detection method is used to detect variants of the LVI attack. The results show that certain attack variants could be reliably detected using this approach without false positives for a range of benign applications. The results also demonstrate reasonable levels of speed and overhead for the detection tool. Some of the practical limitations of using performance counters, particularly in an SGX-context, are also brought up and discussed. Acknowledgments I would like to thank my examiner Mikael Asplund for giving me the initial idea for this the- sis, as well as for providing useful guidance throughout the work. I would also like to thank my supervisor Felipe Boeira for helping me improve the thesis with his feedback. Finally I want to thank my parents and my sister for always being helpful and supportive. iv Contents Abstract iii Acknowledgments iv Contents v List of Figures vii List of Tables viii 1 Introduction 1 1.1 Motivation........................................ 1 1.2 Aim............................................ 2 1.3 Research questions ................................... 2 1.4 Delimitations ...................................... 2 1.5 Methodology overview................................. 2 2 Background and related work3 2.1 Trusted Execution Environments and SGX...................... 3 2.2 Side-channel attacks .................................. 4 2.3 SCAs targeting Intel SGX................................ 8 2.4 Performance counters.................................. 10 2.5 Existing SCA mitigations................................ 11 3 Method 14 3.1 Selecting and running attack.............................. 14 3.2 Reading performance counters ............................ 17 3.3 Measuring LVI impact on counters.......................... 18 3.4 Detection......................................... 21 3.5 Evaluation........................................ 24 4 Results 26 4.1 Attack impact on performance counters....................... 26 4.2 Detection thresholds .................................. 33 4.3 Evaluation of detection................................. 34 5 Discussion 37 5.1 Results .......................................... 37 5.2 Method.......................................... 38 5.3 Limitations of using performance counters to detect SCAs ............ 41 5.4 Other possible defenses against LVI ......................... 42 5.5 The work in a wider context.............................. 43 6 Conclusion 45 v 6.1 Research questions ................................... 45 6.2 Future work....................................... 46 Bibliography 47 A Performance counter measurements for additional scenarios 52 vi List of Figures 2.1 Pipelined processor..................................... 6 2.2 LVI classification ...................................... 10 3.1 Minimal enclave code, LVI-US-SB............................. 16 3.2 Minimal enclave code, LVI-PPN-L1D........................... 17 3.3 Pseudocode, first attack detector ............................. 23 3.4 Pseudocode, second attack detector............................ 24 4.1 Total and minor page faults, LVI-PPN-L1D ....................... 27 4.2 Fluctuations in total number of instructions. ...................... 32 vii List of Tables 2.1 Naming of some transient execution attacks....................... 8 3.1 LVI PoC variants ...................................... 15 3.2 Selected perf stat events .................................. 19 3.3 Selected events for per-process measurements ..................... 20 3.4 Scenario explanation.................................... 20 4.1 Averages of counters for different attack variants.................... 27 4.2 Averages of counter events for different scenarios ................... 29 4.3 Averages of counter events for different scenarios, normalized and scaled . 30 4.4 Chosen thresholds, DET_LVI_US............................. 33 4.5 Chosen thresholds, DET_LVI_PPN............................ 34 4.6 Detection results, 1 s sampling interval.......................... 34 4.7 Detection results, 100 ms sampling interval....................... 35 4.8 Detection overhead..................................... 36 A.1 Additional data for multi-process scenarios....................... 53 A.2 Additional data for multi-process scenarios, normalized and scaled......... 54 viii 1 Introduction The purpose of this chapter is to give an introduction to the thesis. Separate sections are therefore provided that give an overview over the motivation, aim, research questions, de- limitations as well as methodology overview of this work. 1.1 Motivation With the growing emergence of internet services and cloud computing, more and more po- tentially sensitive data is handled and stored by external services. The question of how users can trust these services is therefore an important one. One way to address this problem is through the concept of a Trusted Execution Environment, or TEE. A TEE basically provides a shielded execution environment separated from the Operating System (OS). This means that even if the OS itself is compromised and controlled by an attacker, a TEE can still guarantee confidentiality and integrity for the code and data contained in the TEE [9]. In the last few years companies like Intel and ARM have offered their own implementa- tions of TEEs. Intel’s solution is called Intel SGX, and works by reserving parts of system memory that are then encrypted and thus isolated from the rest of the system [11]. The en- crypted parts of memory are used to provide TEE instances called enclaves. This way, Intel guarantees the confidentiality and integrity of the data used by the enclaves. However, these enclaves have been shown to be vulnerable to numerous Side-Channel Attacks (SCAs) [36, 57], where architectural side effects of a program like cache behaviour, power consumption, etc., are used to infer secret data used by a program. While Intel SGX is by no means the only TEE implementation vulnerable to SCAs, a particularly large amount of research has been conducted regarding SCAs targeting Intel SGX, and several different SCAs have thus been discovered in recent years. Many of these attacks have been mitigated in different ways, but for several attacks the proposed mitigations can have a large impact on performance, etc. For example,