ECE 3110: Engineering Electronics II Fall 2008

Laboratory 1: Current Mirrors

To be performed during Week 3 (Sept. 8-12) Due Week 4 (Sept. 15-19)

1 Pre-Lab

This Pre-Lab should be completed before attending your regular lab section. The Lab TA will need to see your completed Pre-Lab and check it off at the start of the lab session before you can begin taking your measurements.

Read Sections 6.3.1 and 6.3.2 in the text, which cover the design and analysis of MOS- FET current mirrors. For this lab, we will build and take measurements on the current mirror circuit shown in Fig. 6.4 of the text. In the following calculations we will determine how we expect the current mirror to operate, based on the theory covered in the lectures and the text. For all calculations, use the MOSFET parameters given in Table 1 which are representative values for the 2N7000 transistors we will be using in this lab. You may ignore channel length modulation (VA) for these calculations.

1. For the current mirror in Fig. 6.4 of the text with a power supply of VDD = 10 V, calculate the value of VGS required to obtain IREF = 80 mA. 2. Calculate the value of R that is required for the circuit under these conditions.

3. Calculate the value of gm for transistor Q1 when it is biased under these conditions.

4. Calculate the lowest allowable value of VO for the current mirror when it is biased under these conditions.

2 Measurements

The parts that will be used to build the current mirror circuit are listed in Table 2, and can be obtained from the EE stores (along with bread boards and wiring equipment). We will

Parameter Value

Vt 2.1 V 2 µnCox(W/L) 180 mA/V VA 50 V Table 1: Approximate NMOS transistor parameters for hand calculations.

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Component Value/Part Number Quantity MOSFET 2N7000 2 Potentiometer 200 Ω 1 Resistor 20 Ω 1

Table 2: Parts list. use 2N7000 N-Channel field effect transistors during this lab (see data sheet at http://www. ece.utah.edu/~ccharles/ece3110/Labs/2N7000.pdf). The pinout diagrams of the TO- 92 package that we will be using are shown in Fig. 1. MOSFETs must be handled with care to avoid damaging them; try to avoid touching the gate terminal (middle pin) as the static charge on your fingers can be enough to blow the gate capacitor. When you place the MOSFETs in your bread board, take care to get the drain and source oriented properly as these discrete MOSFETs do not have interchangeable sources and drains. If your current mirror is not working correctly, double check that you have the correct orientations. Build the circuit shown in Fig. 2. The 200 Ω resistor is a potentiometer and the voltage source on the output is a variable DC source. Pay close attention to the proper orientation of the terminals for each transistor. Current measurements can be taken using the readout on the digital power supply, it is not necessary to use the multimeter.

1. Adjust the potentiometer until Iref = 80 mA, then measure and record VGS1 (the gate-source voltage of M1). 2. Power off the circuit, remove the potentiometer and measure the resistance using the multimeter. Record the total resistance (the measured potentiometer resistance plus the fixed 20 Ω resistor).

3. Replace the potentiometer, power the circuit back on, and adjust the potentiometer until Iref = 70 mA. Measure and record VGS1 (the gate-source voltage of M1).

(a) (b)

Figure 1: (a) TO-92 package pin-out, (b) N-Channel MOSFET.

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Figure 2: Current mirror schematic.

4. Repeat the previous step for Iref = 90 mA.

5. Adjust the potentiometer so that Iref = 80 mA again, and measure and record Iout while varying Vout from 0 to 10 volts in 500 mV increments.

6. Set Vout to the measured value of VGS (this gives both transistors exactly the same bias conditions), and measure and record Iout.

3 Analysis

Answer the following questions in the analysis section of your lab report:

1. How close to the measured values were your calculations of VGS and R for the Iref = 80 mA case?

2. Use your VGS measurements from the Iref = 70, 80, and 90 mA cases to calculate an approximate value for the gm of transistor M1 (Q1 in the text) at Iref = 80 mA. Remember that gm is defined as ∆iD/∆vGS.

3. How does the value of gm calculated in the previous step compare to the value from your hand calculations in the pre-lab? Assuming that the parameters in the hand calculations matched the actual device exactly, which value would you expect to be more accurate for small signal calculations, and why?

4. Using Matlab or equivalent software, plot your measured data points for Iout vs. Vout (as discrete points), and overlay this with a plot of ID vs. VDS based on the hand calculation parameters and the appropriate equation (use the equation that takes VA = 1/λ into account). Do the plots match up well?

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5. Use your measured data to extrapolate a value of VA. Does this match well with the parameter supplied for the hand calculations?

6. How closely does your final measurement of Iout (when Vout = VGS) match Iref ? What does this say about mismatch between the two transistors? Would you expect this to be better or worse for an integrated implementation of a current mirror?

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