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16 Megabit (2M X 8-Bit / 1M X 16-Bit) CMOS 3.0 Volt-Only Boot Sector Flash Memory

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16 Megabit (2M X 8-Bit / 1M X 16-Bit) CMOS 3.0 Volt-Only Boot Sector Flash Memory COTS PEM BOOT SECTOR FLASH AS29LV016 16 Megabit (2M x 8-Bit / 1M x 16-Bit) CMOS 3.0 Volt-Only Boot Sector Flash Memory DISTINCTIVE CHARACTERISTICS PERFORMANCE CHARACTERISTICS Commercial Off The Shelf, up-screened device High performance Single power supply operation — Access times as fast as 70 ns @ Enhanced — Full voltage range: 2.7 to 3.6 volt read and write Temp [/ET] operations for battery-powered applications — Extended temp range available [/XT] (-55°C to Manufactured on 200nm process technology +125°C) Flexible sector architecture Ultra low power consumption (typical values at 5 MHz) — One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and — 200 nA Automatic Sleep mode current thirty-one 64 Kbyte sectors (byte mode) — One 8 Kword, two 4 Kword, one 16 Kword, and — 200 nA standby mode current thirty-one 32 Kword sectors (word mode) — 9 mA read current Sector Protection features — 20 mA program/erase current — A hardware method of locking a sector to Cycling endurance: 1,000,000 cycles per sector prevent any program or erase operations within typical that sector Data retention: 20 years typical — Sectors can be locked in-system or via programming equipment — Temporary Sector Unprotect feature allows code SOFTWARE FEATURES changes in previously locked sectors CFI (Common Flash Interface) compliant Unlock Bypass Program Command — Provides device-specifi c information to the — Reduces overall programming time when issuing system, allowing host software to easily multiple program command sequences reconfi gure for different Flash devices Top or bottom boot block confi gurations Erase Suspend/Erase Resume available — Suspends an erase operation to read data from, Compatibility with JEDEC standards or program data to, a sector that is not being — Pinout and software compatible with single- erased, then resumes the erase operation power supply Flash Data# Polling and toggle bits — Superior inadvertent write protection — Provides a software method of detecting program or erase operation completion PACKAGE OPTIONS HARDWARE FEATURES 48-pin TSOP1 Ready/Busy# pin (RY/BY#) — Provides a hardware method of detecting program or erase cycle completion Hardware reset pin (RESET#) AS29LV016 Micross Components reserves the right to change products or specifi cations without notice. Rev. 2.2 01/10 1 COTS PEM BOOT SECTOR FLASH AS29LV016 GENERAL DESCRIPTION The AS29LV016 is a 16 Mbit, 3.0 Volt-only already programmed) before executing the erase Flash memory organized as 2,097,152 bytes operation. During erase, the device automatically or 1,048,576 words. The word-wide data (x16) times the erase pulse widths and verifi es proper appears on DQ15–DQ0; the byte-wide (x8) data cell margin. appears on DQ7–DQ0. This device is designed to be programmed in-system with the standard The host system can detect whether a program or system 3.0 volt VCC supply. A 12.0 V VPP or 5.0 erase operation is complete by observing the RY/ VCC are not required for write or erase operations. BY# pin, or by reading the DQ7 (Data# Polling) The device can also be programmed in standard and DQ6 (toggle) status bits. After a program EPROM programmers. or erase cycle has been completed, the device is ready to read array data or accept another The device offers access times of 70 ns, 90 ns command. and 100 ns allowing high speed microprocessors to operate without wait states. To eliminate bus The sector erase architecture allows memory contention the device has separate chip enable sectors to be erased and reprogrammed without (CE#), write enable (WE#) and output enable affecting the data contents of other sectors. The (OE#) controls. device is fully erased when shipped from the factory. The device requires only a single 3.0 volt power supply for both read and write functions. Hardware data protection measures include Internally generated and regulated voltages are a low VCC detector that automatically inhibits provided for the program and erase operations. write operations during power transitions. The hardware sector protection feature disables The AS29LV016 is entirely command set compatible both program and erase operations in any with the JEDEC single-power-supply Flash combination of the sectors of memory. This standard. Commands are written to the can be achieved in-system or via programming command register using standard microprocessor equipment. write timings. Register contents serve as input to an internal state-machine that controls the erase The Erase Suspend/Erase Resume feature and programming circuitry. Write cycles also enables the user to put erase on hold for any internally latch addresses and data needed for period of time to read data from, or program data the programming and erase operations. Reading to, any sector that is not selected for erasure. True data out of the device is similar to reading from background erase can thus be achieved. other Flash or EPROM devices. The hardware RESET# pin terminates any Device programming occurs by executing the operation in progress and resets the internal state program command sequence. This initiates the machine to reading array data. The RESET# pin Embedded Program algorithm—an internal may be tied to the system reset circuitry. A system algorithm that automatically times the program reset would thus also reset the device, enabling pulse widths and verifi es proper cell margin. the system microprocessor to read the boot-up The Unlock Bypass mode facilitates faster fi rmware from the Flash memory. programming times by requiring only two write cycles to program data instead of four. The device offers two power-saving features. When addresses have been stable for a specifi ed Device erasure occurs by executing the erase amount of time, the device enters the automatic command sequence. This initiates the Embedded sleep mode. The system can also place the device Erase algorithm—an internal algorithm that into the standby mode. Power consumption is automatically preprograms the array (if it is not AS29LV016 Micross Components reserves the right to change products or specifi cations without notice. Rev. 2.2 01/10 2 COTS PEM BOOT SECTOR FLASH AS29LV016 PRODUCT SELECTOR GUIDE Family Part Number AS29LV016 Speed Option Voltage Range: Vcc = 2.7-3.6V 70 90 100 Max access time, ns (tACC ) 70 90 100 Max CE# access time, ns (tCE ) 70 90 100 Max OE# access time, nc (tOE ) 30 35 40 Note: See AC Characteristics on page 29 for full specifications BLOCK DIAGRAMg RY/BY# DQ0–DQ15 (A-1) VCC Sector Switches VSS Erase Voltage Input/Output RESET# Generator Buffers WE# State Control BYTE# Command Register PGM Voltage Generator Chip Enable Data STB Latch CE# Output Enable Logic OE# Y-Decoder Y-Gating STB VCC Detector Timer X-Decoder Cell Matrix A0–A19 Latch Address AS29LV016 Micross Components reserves the right to change products or specifi cations without notice. Rev. 2.2 01/10 3 COTS PEM BOOT SECTOR FLASH AS29LV016 PIN CONFIGURATION LOGIC SYMBOL A0–A19 = 20 addresses DQ0–DQ14 = 15 data inputs/outputs 20 DQ15/A-1 = DQ15 (data input/output, word mode), A0–A19 16 or 8 A-1 (LSB address input, byte mode) DQ0–DQ15 BYTE# = Selects 8-bit or 16-bit mode (A-1) CE# = Chip enable OE# = Output enable CE# WE# = Write enable OE# RESET# = Hardware reset pin RY/BY# = Ready/Busy output WE# VCC = 3.0 volt-only single power supply (see RESET# Product Selector Guide for speed BYTE# RY/BY# options and voltage supply tolerances) VSS = Device ground NC = Pin not connected internally CONNECTION DIAGRAMS 44 WE# A15 1 48 A16 A14 2 47 BYTE# A13 3 46 VSS A12 4 45 DQ15/A-1 A11 5 44 DQ7 A10 6 43 DQ14 A9 7 42 DQ6 A8 8 41 DQ13 A19 9 40 DQ5 NC 10 39 DQ12 WE# 11 38 DQ4 RESET# 12 Standard TSOP 37 VCC NC 13 36 DQ11 NC 14 35 DQ3 RY/BY# 15 34 DQ10 A18 16 33 DQ2 A17 17 32 DQ9 A7 18 31 DQ1 A6 19 30 DQ8 A5 20 29 DQ0 A4 21 28 OE# A3 22 27 VSS A2 23 26 CE# A1 24 25 A0 AS29LV016 Micross Components reserves the right to change products or specifi cations without notice. Rev. 2.2 01/10 4 COTS PEM BOOT SECTOR FLASH AS29LV016 ORDERING INFORMATION AS29LV016TRG-70/ET TOP BOOT TSOP1-48 ENHANCED AS29LV016BRG-70/ET BOTTOM BOOT TSOP1-48 ENHANCED AS29LV016TRG-90/ET TOP BOOT TSOP1-48 ENHANCED AS29LV016BRG-90/ET BOTTOM BOOT TSOP1-48 ENHANCED AS29LV016TRG-90/XT TOP BOOT TSOP1-48 EXTENDED AS29LV016BRG-90/XT BOTTOM BOOT TSOP1-48 EXTENDED AS29LV016TRG-100/ET TOP BOOT TSOP1-48 ENHANCED AS29LV016BRG-100/ET BOTTOM BOOT TSOP1-48 ENHANCED AS29LV016TRG-100/XT TOP BOOT TSOP1-48 EXTENDED AS29LV016BRG-100/XT BOTTOM BOOT TSOP1-48 EXTENDED PB-FREE OPTION (WHERE AVAILABLE) AS29LV016TRGR-70/ET TOP BOOT TSOP1-48 ENHANCED AS29LV016TRGR-70/ET BOTTOM BOOT TSOP1-48 ENHANCED TAPE / REEL OPTION (WHERE AVAILABLE) .14-14” Reel (32mm TAPE) .7-7” Reel (32mm TAPE) AS29LV016 Micross Components reserves the right to change products or specifi cations without notice. Rev. 2.2 01/10 5 COTS PEM BOOT SECTOR FLASH AS29LV016 DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory location. The register is com-posed of latches that store the commands, along with the address and data information needed to execute the command. The contents of the register serve as inputs to the internal state machine. The state machine outputs dictate the function of the device. Table 1 lists the device bus operations, the inputs and control levels they require, and the resulting output.
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