Solder Material Solutions Pastes • Fluxes • Wires • Accessories Contents
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Sn95/Sb5 – Organic Acid 3% Core
Technical Data Sheet Sn95/Sb5 – Organic Acid 3% Core NOMINAL COMPOSITION Tin 94% Min Lead 0.1% Max Arsenic 0.01% Max Antimony 4.5% 5.5 Cadmium 0.005% Max Iron 0.04% Max Copper 0.08% Max Aluminum 0.005% Max Zinc 0.005% Max Silver 0.015% Max Bismuth 0.15% Max Flux – 3% Organic Acid Core by weight PHYSICAL PROPERTIES Solder Alloy Color White Melting Point (Solidus) 450°F (233°C) Flow Point (Liquidus) 464°F (240°C) Specific Gravity 7.26 Density (Lbs/in3) 0.263 Bulk Room Temperature Tensile Strength (PSI) 5,900 Flux Type Water Soluble Organic Acid Physical State Solid Melting Point 250°F (120°C) Chloride Content 4% SOLDERING CHARACTERISTICS Sn95/Sb5 is a general-purpose solder used in applications involving soldering of copper and copper alloys and/or ferrous base alloys where use of lead containing solder is not permitted. This soft solder may be used in applications involving higher service temperatures. Typical applications for this alloy include copper components in air conditioning industry. This alloy is also recommended in applications involving food handling or drinking water components where use of lead containing alloys is not permitted. Antimony bearing alloys are not recommended in soldering of brass parts due to formation of a brittle Sb-Zn inter-metallic. This flux-cored solder can be used on difficult to solder materials where rosin based fluxes and electronic grade organic fluxes are not strong enough. It has been used effectively in many non-electronic applications such as lamps, fuses, and jewelry. The flux is active on copper, brass, bronze, steel, nickel, and stainless steel. -
Low Melting Temperature Sn-Bi Solder
metals Review Low Melting Temperature Sn-Bi Solder: Effect of Alloying and Nanoparticle Addition on the Microstructural, Thermal, Interfacial Bonding, and Mechanical Characteristics Hyejun Kang, Sri Harini Rajendran and Jae Pil Jung * Department of Materials Science and Engineering, University of Seoul, 163, Seoulsiripdae-ro, Dongdaemun-gu, Seoul 02504, Korea; [email protected] (H.K.); [email protected] (S.H.R.) * Correspondence: [email protected] Abstract: Sn-based lead-free solders such as Sn-Ag-Cu, Sn-Cu, and Sn-Bi have been used extensively for a long time in the electronic packaging field. Recently, low-temperature Sn-Bi solder alloys attract much attention from industries for flexible printed circuit board (FPCB) applications. Low melting temperatures of Sn-Bi solders avoid warpage wherein printed circuit board and electronic parts deform or deviate from the initial state due to their thermal mismatch during soldering. However, the addition of alloying elements and nanoparticles Sn-Bi solders improves the melting temperature, wettability, microstructure, and mechanical properties. Improving the brittleness of the eutectic Sn-58wt%Bi solder alloy by grain refinement of the Bi-phase becomes a hot topic. In this paper, literature studies about melting temperature, microstructure, inter-metallic thickness, and mechanical properties of Sn-Bi solder alloys upon alloying and nanoparticle addition are reviewed. Keywords: low-temperature solder; Sn-58wt%Bi; melting temperature; microstructure; mechani- Citation: Kang, H.; Rajendran, S.H.; cal property Jung, J.P. Low Melting Temperature Sn-Bi Solder: Effect of Alloying and Nanoparticle Addition on the Microstructural, Thermal, Interfacial Bonding, and Mechanical 1. Introduction Characteristics. Metals 2021, 11, 364. -
Major Causes of Solder Cracks Applications and Boards That Specially Require Solder Crack Countermeasures Comparison of 2 Soluti
Solder Crack Countermeasures in MLCCs Outline This page introduces major causes and countermeasures of solder crack in MLCCs (Multilayer Fig. 1: Appearance of a solder crack Ceramic Chip Capacitors). (cross-section) Major causes of solder cracks Solder cracks on MLCCs developed from severe usage conditions after going on the market and during manufacturing processes such as soldering. Applications and boards that specially require solder crack countermeasures Solder cracks occur mainly because of thermal fatigue due to thermal shock or temperature cycles or the use of lead-free solder, which is hard and fragile. TDK offers following MLCC products as solder crack countermeasures. 1) Metal terminals “disperse” thermal shock : 2) Equipped with resin layers that absorb stress applied on solder MEGACAP joints and resistant to dropping: Soft termination Comparison of 2 solutions: Summary of “Solder Crack Countermeasures in MLCCs” Major causes of solder cracks Solder cracks on MLCCs developed from severe usage conditions Fig. 2: Major causes of solder cracks and their impact after going on the market and during manufacturing processes such as soldering. The following causes can be listed as the major cause of solder cracks. (1) Thermal shock (heat shock), heat fatigue caused by temperature cycle Solder cracks occur when heat stress is applied to a solder joint due to the difference in the thermal coefficients of the MLCC and PCB, in an environment in which changes between high temperatures and low temperatures are repeated. In addition, it can also occur when temperature control is insufficient during the process of soldering. (2) Lead-free solder Lead-free solder, which started to be used due to environmental considerations, has properties of being rigid and fragile, and has a higher risk of solder cracks compared to conventional eutectic solder; therefore, caution is required when using it. -
Case Study on the Validation of SAC305 and Sncu-Based Solders in SMT, Wave and Hand Soldering at the Contract Assembler Level
Case Study on the Validation of SAC305 and SnCu-based Solders in SMT, Wave and Hand Soldering at the Contract Assembler Level Peter Biocca, ITW Kester Itasca, Illinois Carlos Rivas, SMT Dynamics Anaheim, California Abstract: At the contractor level once a product is required to be soldered with lead-free solders all the processes must be assessed as to insure the same quality a customer has been accustomed to with a 63/37 process is achieved. The reflow, wave soldering and hand assembly processes must all be optimized carefully to insure good joint formation as per the appropriate class of electronics with new solder alloys and often new fluxes. The selection of soldering materials and fluxes are important as to insure high quality solder joints with lead-free solders which tend to wet slower than leaded solders but also the process equipment must be lead-free process compatible. Components must be lead-free and able to meet the thermal requirements of the process but also the MSL (moisture sensitivity limits) must be observed. Board finish must be lead- free and the PCB must be able to sustain higher process temperature cycles with no physical damage but also good solderability to enable subsequent soldering at the wave or hand assembly. Tin-silver-copper has received much publicity in recent years as the lead-free solder of choice. SAC305 was endorsed by the IPC Solder Value Product Council as the preferred option for SMT assembly and most assemblers have transitioned to this alloy for their solder paste requirements. The SAC305 alloy due to its 3.0% content of silver is expensive when compared to traditional 63/37 for this reason many contract manufacturers and PCBA assemblers are opting for less costly options such as tin-copper based solders for wave, selective, hand soldering, dip tinning operations. -
Soldering to Gold Films
Soldering to Gold Films THE IMPORTANCE OF LEAD-INDIUM ALLOYS Frederick G. Yost Sandia Laboratories, Albuquerque, New Mexico, U.S.A. Reliable solder joints can be made on gold metallised microcircuits using lead-indium solders providing certain important conditions are understood and carefully controlled. This paper reviews the three fundamental concepts of scavenging, wetting, and ageing, which are relevant when soldering to gold films. Alloys containing indium have been used for solder- sition and a body centred tetragonal space lattice. ing electronic components to thin gold films and wires Although considerable work has been addressed for at least 14 years. Braun (1, 2) investigated the to the question of clustering and phase separation potential of several multicomponent alloys based in the a field below 20°C (7, 8, 9) the practical signifi- upon the lead-tin-indium ternary alloy system. cance of this phenomenon has not yet materialised. More recently, work on lead-indium binary alloys The most commonly used alloy is the 50 weight has been reported by Jackson (3) and Yost, et al per cent indium composition which has a liquidus (4, 5, 6). In this paper we intend to define, to discuss, temperature of approximately 210°C and a solidus and to illustrate three fundamental concepts relevant temperature of approximately 185°C. Alloys in the to soldering to gold films using lead-indium solders. lead rich phase field, a, freeze dendritically by The lead-indium phase diagram, shown in Figure forming lead rich stalks. The formation of these 1, contains a wealth of useful solder alloys having dendrites causes a surface rumpling which gives the solidus temperatures which range from 156.6°C solder surface a somewhat frosty rather than a shiny (pure indium) to 327.5 °C (pure lead). -
Temperature Cycling and Fatigue in Electronics
Temperature Cycling and Fatigue in Electronics Gilad Sharon, Ph.D. [email protected] 9000 Virginia Manor Road, Suite 290, Beltsville, Maryland 20705 | Phone: (301) 474-0607 | Fax: (866) 247-9457 | www.dfrsolutions.com ABSTRACT The majority of electronic failures occur due to thermally induced stresses and strains caused by excessive differences in coefficients of thermal expansion (CTE) across materials. CTE mismatches occur in both 1st and 2nd level interconnects in electronics assemblies. 1st level interconnects connect the die to a substrate. This substrate can be underfilled so there are both global and local CTE mismatches to consider. 2nd level interconnects connect the substrate, or package, to the printed circuit board (PCB). This would be considered a “board level” CTE mismatch. Several stress and strain mitigation techniques exist including the use of conformal coating. Key words: temperature cycling, thermal cycling, fatigue, reliability, solder joint reliability. INTRODUCTION The excessive difference in coefficients of thermal expansion between the components and the printed board cause a large enough strain in solder and embedded copper structures to induce a fatigue failure mode. This paper discusses the solder fatigue failure mechanism and the associated PTH (plated through hole) fatigue failure. The solder fatigue failure is more complicated due to the many solder materials and different solder shapes. Figure 1 shows an example of a solder fatigue failure in a cross section of a ball grid array (BGA) solder ball with the corresponding finite element model. The predicted location of maximum strain corresponds to the same location of solder fatigue crack initiation. Discussion CTE Mismatch Any time two different materials are connected to one another in electronics assemblies, there is a potential for CTE mismatch to occur. -
'Pin in Paste' Reflow Process with Combination of Solder Preforms To
As originally published in the IPC Printed Circuit Expo, APEX & Designer Summit Proceedings. Investigation for Use of ‘Pin in Paste’ Reflow Process with Combination of Solder Preforms to Eliminate Wave Soldering Guhan Subbarayan, Scott Priore Assembly Sciences and Technology, Cisco Systems, Inc. San Jose, California [email protected] Paul Koep, Scott Lewin*, Rahul Raut Cookson Electronics - Assembly Materials South Plainfield, NJ; *Elgin, IL Sundar Sethuraman Jabil Circuits San Jose, California ABSTRACT The Pin in Paste (PiP) technology is the process of soldering Pin through hole (PTH) components using the Surface Mount Technology (SMT) reflow process. The use of PiP process offers several advantages compared to the traditional wave soldering process. One of the primary advantages is lowering of cost due to the elimination of the wave soldering process and its associated tooling cost and potential handling damage. Another advantage is that with the wave soldering process, it is extremely difficult to achieve adequate holefill on thermally challenging thick Printed Circuit Boards (PCBs). However, by using PiP process with combination of solder preforms, it is possible to achieve adequate holefill and reliable solder joints for soldering PTH components. The objective of this study is to investigate the use and limitations of machine-placed solid solder preforms during the top- side SMT reflow process for PTH components. An experiment was designed to investigate the following problems: 1) How much additional volume is provided by the combination -
Gold Embrittlement of Solder Joints 2018.Pages
Gold Embrittlement of Solder Joints Ed Hare, PhD - SEM Lab, Inc 425.335.4400 [email protected] Introduction Gold embrittlement of solder joints has been written about for at least four decades [1 – 3]. Nevertheless, gold embrittlement related solder joint failures have been analyzed in this laboratory as recently as July 2009. Gold embrittlement can be avoided by careful solder joint design and knowledge of the causes of this condition. The purpose of this paper is to provide a detailed account of material and process parameters that can lead to gold embrittlement in electronic assemblies. There are a variety of reasons that designers might want to solder to gold or gold plating. One reason is that some designs involve wire bonding and soldering operations on the same assembly. Another reason would be to include gold contact pads (e.g. for dome keypad contacts) or card edge contacts (e.g. PC cards). The wire bond pads or contact pads can be selectively gold plated, but the selective plating process can be expensive. The electronics industry currently recognizes a threshold level for gold that can be dissolved into eutectic tin-lead solder above which the solder is likely to become embrittled. This threshold is ~ 3 wt% gold. It will be shown in the paragraphs below that embrittlement of solder joints can develop at significantly lower bulk gold concentrations. Metallurgical Description of Gold Embrittlement The most important soldering alloy in the electronics industry is the eutectic tin-lead alloy, 63%Sn – 37%Pb. This may change in the near future as lead-free soldering takes its hold on the industry. -
Here's a Summary of How to Make the Perfect Solder Joint
Here's a summary of how to make the perfect solder joint. 1. All parts must be clean and free from dirt and grease. 2. Try to secure the work firmly. 3. "Tin" the iron tip with a small amount of solder. Do this immediately, with new tips being used for the first time. 4. Clean the tip of the hot soldering iron on a damp sponge. 5. Many people then add a tiny amount of fresh solder to the cleansed tip. 6. Heat all parts of the joint with the iron for under a second or so. 7. Continue heating, then apply sufficient solder only, to form an adequate joint. 8. Remove and return the iron safely to its stand. 9. It only takes two or three seconds at most, to solder the average p.c.b. joint. 10. Do not move parts until the solder has cooled. Troubleshooting Guide 11. Solder won't "take" - grease or dirt present - desolder and clean up the parts. Or, material may not be suitable for soldering with lead/tin solder (eg aluminium). 12. Joint is crystalline or grainy-looking - has been moved before being allowed to cool, or joint was not heated adequately - too small an iron/ too large a joint. 13. Solder joint forms a "spike" - probably overheated, burning away the flux. First Aid If you are unlucky enough to receive burns which require treatment, here's what to do :- 14. Immediately cool the affected area with cold running water for several minutes. 15. Remove any rings etc. before swelling starts. -
1.5 Repair and Re-Balling Stencils for SMD Components
Repair and Re-balling stencils 1.5 for SMD components Application Manufacturing in the laser cut and laser Stencil post-processing welding process With the introduction of SMD-technology All laser cut stencils from LaserJob are subjected and the constant drive toward miniaturization LaserJob stencils are produced in temperature- to an automated post-cut brushing process. of components, new procedures and repair controlled production rooms with a fiber laser. The CNC-controlled brushing system removes all processes are constantly being developed in Our custom fiber laser platform produces a exposed burrs on the laser exit side. The brush order to provide reliable repair materials and significantly better beam quality then commonly head travels across the entire stencil surface in safe repair procedures. Despite the low failure used laser systems. The distinct lower cutting horizontal and vertical directions. rates of many of the new integrated circuits, opening (20 µm instead of the commonplace the high cost of these devices, and the subse- 40 µm), with equal depth of focus sharpness, Advantages of this process quent cost of the populated PCB require a allows for reduced heat input into the material. – no enlargement of pad openings reliable repair solution. The high precision of the moderately conical – lowest material removal < 2 µm It is very rare for a new product to achieve a first- apertures increases the process window in the – consistent thickness of stainless steel pass yield of 100 %. Increased component pick and place operation and allows for more material geometries and component leads, particularly efficient solder paste release. with area array components, create the need As a standard feature, the repair stencils are for tighter tolerances and accuracy from rework offered in sizes from 10 mm x 10 mm to systems and rework stencils. -
Soldering Guidelines for Land Grid Array Packages Application Note 61
Soldering Guidelines for Land Grid Array Packages Application Note 61 Summary The objective of this application note is to provide Peregrine Semiconductor customers with general guidelines for the soldering and assembly of land grid array (LGA) packages. Precise process development and designed experimentation are needed to optimize specific appli- cation/performance. Introduction LGAs are grid array packages with terminal pads on the bottom surface. These are leadless packages with electrical connections made via lands on the bottom side of the component to the surface of the connecting substrate (PCB, ceramic, LTCC, etc.). The LGA is typically made with organic laminate or PC board as substrate with nickel-gold (NiAu)-plated termina- tions. Other component termination plating or substrate might be used based on application. The LGA solder interconnect is formed solely by solder paste applied at board assembly because there are no spheres attached to the LGA. This results in a lower standoff height of approximately 0.06 mm to 0.10 mm, which is favored for portable product applications. The lower standoff height also allows more space above the package for heatsink solution or for thin form factor application. LGA eliminates the risk that customers receive packages with damaged or missing solder spheres due to shipping and handling. Reflow soldering of LGA assemblies provides mechanical, thermal and electrical connections between the component leads or terminations and the substrate surface mount land pattern. Solder paste may be applied to the surface mount lands by various methods, such as screen printing and stencil printing. Peregrine Semiconductor LGA packages are categorized as surface mount components (SMCs). -
Medalist Bead Probe Technology
Keysight Technologies Medalist Bead Probe Technology Technical Overview An Ingenious, Yet Simple Method for Dramatically Improving Test Access The Keysight Technologies, Inc. Medalist Bead Probe Technology is the industry’s first, fully researched, documented and proven technology for placing test targets directly on printed circuit board (PCB) signal traces. These beads then serve as highly reliable test points for use during in-circuit testing. This new technique dramatically improves in-circuit test access on high density and gigabit-speed boards, resulting in excellent fault coverage. And best of all, plac- ing bead probes on a PCB requires no changes to your existing SMT process. Today’s Test Challenge: Smaller, Faster As PCB’s get increasingly smaller, the ability to provide test points for “Over 1.5 million in-circuit test becomes more difficult. Designs with high-speed buses also data points lead limit where test targets can be placed us to believe that on board layouts. Workarounds for these issues can often be time solder-bead consuming and costly, and sometimes simply not possible. probing is not only feasible in a high Unprecedented Access No access? No problem. Keysight volume production Bead probes are easily placed on has the solution. Test engineers can parallel traces with no re-routing environment, but now get the access they need for superior test coverage, even on the can be successfully most densely populated boards. In Use your current fact, numerous bead probes can be SMT processes implemented placed on multiple traces. Sit back and let your Keysight ICT tester select You can get started immediately without any the optimal bead locations for probing.