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BCM56070 Switch Programming Guide BCM56070 Switch Programming Guide Programming Guide Broadcom 56070-PG203-PUB August 12, 2020 BCM56070 Programming Guide Switch Programming Guide Broadcom, the pulse logo, Connecting everything, Avago Technologies, Avago, the A logo, BroadShield, BroadStack, BroadSync, ContentAware, Flexport, HiGig, HiGig+, HiGig2, HiGig-Lite, StrataXGS, and XGS are among the trademarks of Broadcom and/or its affiliates in the United States, certain other countries, and/or the EU. Copyright © 2019–2020 Broadcom. All Rights Reserved. The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. For more information, please visit www.broadcom.com. Broadcom reserves the right to make changes without further notice to any products or data herein to improve reliability, function, or design. Information furnished by Broadcom is believed to be accurate and reliable. However, Broadcom does not assume any liability arising out of the application or use of this information, nor the application or use of any product or circuit described herein, neither does it convey any license under its patent rights nor the rights of others. Broadcom 56070-PG203-PUB 2 BCM56070 Programming Guide Switch Programming Guide Table of Contents Chapter 1: Introduction ...................................................................................................................... 9 Chapter 2: Architectural Overview .................................................................................................. 10 2.1 Device Functional Overview ..................................................................................................................................10 2.2 System View ............................................................................................................................................................11 Chapter 3: Device Interfaces ........................................................................................................... 12 3.1 Port Configurations ................................................................................................................................................12 3.2 Port Numbering .......................................................................................................................................................12 3.2.1 Physical Port Number .....................................................................................................................................12 3.2.2 Physical Port to Logical Port ...........................................................................................................................12 3.2.3 EP Logical Port to Physical Port Number .......................................................................................................12 3.2.4 Port Numbering for Channelized Applications ................................................................................................13 3.3 PCIe ..........................................................................................................................................................................13 3.4 LED Interface ...........................................................................................................................................................13 3.5 Clock Sources .........................................................................................................................................................14 3.6 MDC and MDIO Information ...................................................................................................................................14 3.7 Network Time Synchronization..............................................................................................................................15 3.7.1 BroadSync Timing Interface............................................................................................................................15 3.7.2 Using the BroadSync Interface .......................................................................................................................15 3.7.3 Master Mode: Timing Input .............................................................................................................................16 3.7.3.1 Slave Mode: Timing Output ..................................................................................................................16 3.7.4 Device-Specific Support..................................................................................................................................16 3.7.4.1 Feature List...........................................................................................................................................16 3.7.4.2 1-Step ...................................................................................................................................................16 3.7.4.3 2-Step ...................................................................................................................................................17 3.7.5 Packet Formats...............................................................................................................................................18 3.7.5.1 Detecting IEEE 802.1AS Packets.........................................................................................................18 3.7.5.2 Detecting IEEE 1588v2 Packets...........................................................................................................18 3.7.6 Pdelay .............................................................................................................................................................18 3.7.6.1 Pdelay Timestamping ...........................................................................................................................18 3.7.6.2 Packet Flow – Responding to Pdelay_Req in the Clock B Role...........................................................19 3.8 Energy Efficient Ethernet .......................................................................................................................................20 Chapter 4: Forwarding ..................................................................................................................... 21 4.1 Virtual Local Area Network ....................................................................................................................................21 4.1.1 Virtual Route Forwarding ................................................................................................................................21 4.1.2 VLAN Resolution.............................................................................................................................................22 4.1.3 Shared VLAN Learning ...................................................................................................................................22 4.1.4 Private VLAN ..................................................................................................................................................22 Broadcom 56070-PG203-PUB 3 BCM56070 Programming Guide Switch Programming Guide 4.1.5 Double Tagging...............................................................................................................................................24 4.2 Packet Flow .............................................................................................................................................................26 4.2.1 L2 Ingress Packet on Ethernet Ports ..............................................................................................................26 4.2.2 L3 (IPv4 Unicast) Ingress Packet on Ethernet Ports.......................................................................................26 4.2.3 Ingress and Egress Packet CPU Port.............................................................................................................26 4.3 L2 Feature List and Operations .............................................................................................................................27 4.4 L3 Feature List and Operations .............................................................................................................................28 4.4.1 Layer 3 (IPv4 Routing) ....................................................................................................................................28 4.4.2 IP Multicast .....................................................................................................................................................28 4.4.2.1 Equal-Cost Multipath ............................................................................................................................28 4.5 Tunneling Features .................................................................................................................................................29 4.5.1 VXLAN ............................................................................................................................................................29 4.5.1.1 VXLAN Deployments ............................................................................................................................29 4.5.1.2 VXLAN Requirements...........................................................................................................................30 4.5.1.3 VXLAN Packet Format..........................................................................................................................31
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