DOCSLIB.ORG

Oracle Optimized Java SE for Embedded Platforms

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text

Load more

<Insert Picture Here> DOAG 2010, Nürnberg Oracle Optimized Java SE for Embedded Platforms Dr. Rainer Eschrich Principal Sales Consultant Java Embedded Business Unit The preceding is intended to outline our general product direction. It is intended for information purposes only, and may not be incorporated into any contract. It is not a commitment to deliver any material, code, or functionality, and should not be relied upon in making purchasing decisions. The development, release, and timing of any features or functionality described for Oracle’s products remains at the sole discretion of Oracle. © Oracle 2010 2 Topics Why Java Java SE Embedded Technical Details Use Cases Conclusions © Oracle 2010 3 ©2010 Oracle Corporation Java in Embedded – An Introduction Embedded Microprocessor Trends • Cortex A5 Dual Core • Atom Dual Core Processors • PowerPC QorIQ Family • Cortex A9 Dual/Quad Core • N550 1.5ghz 8.5w • P2020 Dual Core 1.2ghz • 250mw power 1ghz today • D525 1.8ghz 13w • P4080 Quad Core 1.5ghz •ARM Eagle Cortex A15 Coming • D510 1.66ghz 13w Embedded Communication • Quad 2.5 ghz! • Nvidia Tegra 2 – 1ghz Dual A9 • 330 1.6ghz 8w Processors • Marvell Quad-Core •TI OMAP4 Dual core Cortex-A9 Common Themes • Embedded Multi-Core is everywhere • ARM continuing low power legacy, Intel moving into that space with Atom • ARM setting sights on server market © Oracle 2010 5 Java Features • Proven & Stable • Huge Developer Base • Rapid Application Development • Fully Object Oriented • Run on a Virtual Machine – Memory Management, Portability, Cross Platform … • Multi-Thread, -Process and -CPU/Core support • Security • Networking • Deployment ©2010 Oracle Corporation The Java Embedded Continuum Java Card Java ME(CLDC) Java ME(CDC) Java SE What I will talk about! Embedded Space ©2010 Oracle Corporation Java in Embedded – Java SE Embedded What does “Embedded” mean? • Two definitions used: Legal and Technical • Legal definition of Embedded SE: Designates a Field Of Use (FOU) – Embedded FOU defined in the license file as anything that is not a “general purpose desktop computer or server” • e.g : “industrial control systems, wireless mobile telephones, wireless handheld devices, kiosks, TV/STB, Blu-ray Disc devices, ATM's etc...” – Applies to both embedded (footprint-reduced) SE implementations and “regular” SE implementations – Royalty bearing, affordable pricing • Dedicated, flexible, versatile pricing model applies: based on unit cost and volume. ©2010 Oracle Corporation Java SE Embedded Only Implementation ● Embedded Only Features: − Memory reductions/optimizations − Disk/Flash/ROM size reductions ● Headless Configuration ● Removal of optional files and Java classes − Low Power Handling − Additional Platforms (Linux/ARM, Linux/Power, WinXP Embedded) And of course all the good stuff Java SE brings out of the box and via third party libraries/apps … (like Java EE ...) © Oracle 2010 10 Targeted Configurations (Today) Processor Operating Headless or FPU Java SE System Headful Version ARMv5 Linux Headless Soft-Float 6U21 ARMv6/v7 Linux Headless & Hard-Float 6U21 Headfull (v7) PowerPC Linux Headless Classic 6U21 e600 core Hard-Float PowerPC Linux Headless Embedded 6U21 e500v2 core Hard-Float X86 Linux Headless X86 6U21 X86 XP Headful x86 5U10 Embedded © Oracle 2010 11 Java in Embedded – Tech Stuff Small Footprint for Embedded ●The standard release’s ROM/disk footprint is too big for many embedded devices − Memory getting cheaper, but cost remains a factor: Profit = Margin x Volume ●Small footprint optimizations − Additional Compression, File Removal − Footprint reduction of up to 56% ● e.g 6.0 for ARM around 32 MB ● e.g., for 5.0 on Linux/x86: from 68MB to 29.5MB ©2010 Oracle Corporation Java SE – Custom Embedded Builds • Technical definition of embedded SE: Custom – footprint-reduced – but still SE compatible SE specification “Regular” SE implementation Embedded SE implementation optional NOT an SE components implementation ©2010 Oracle Corporation Small Footprint for Embedded File removal includes ● Deployment: Java Web Start, Plug-in, Pack2000 and Unpack2000 ● IDL and RMI: rmiregistery, rmid, servertool,tnameserv ● Security: Policytool, keytool, ktab, klist, kinit ● Orbd ● Man pages ● Localization − Character convertors (charsets.jar) ● Remove either Client Compiler or Server Compiler ©2010 Oracle Corporation Headless Feature for SE Embedded ● Headless option − No support for keyboard, mouse, video − Otherwise full SE functionality, including printing ● Runtime and build implementation − Headless flag hard-wired on ● Djava.awt.headless=true − “Headful” files removed, including libmawt.so ©2010 Oracle Corporation Low Memory Support ● The Linux community has been searching for solutions to handle low memory conditions ● Killing processes is NOT the answer (SIGABORT, ouch!) ● We chose to support /dev/mem_notify − Linux kernel driver monitoring available memory Block Waiting / YES Create Open Monitoring /dev/mem for Input dev/me from Device m_notif Thread notify y avail? NO Full GC Feature Unavailable *Release Additional VM Memory (JIT Buffers, etc) ©2010 Oracle Corporation Java SE Embedded Feature Power Conservation • Goal – Reduce CPU usage to 0% when Java applications are idle in order to allow CPU clock to be reduced or suspended • Modifications Performed – Hotspot Virtual Machine • Eliminated all Polling Threads – Java SE AWT/Swing Changes • Eliminated Polling for X Events when idle ©2010 Oracle Corporation 18 Embedded Caffeine Mark Performance Improvements +29% +22% +21% © Oracle 2010 19 specJVM98 Performance Improvements +19% +17% © Oracle 2010 20 Performance Java SE 6 versus Android2.2 2.5X 1.53X 2.16X 2.15X © Oracle 2010 21 Tuning your Embedded Java Solution ● Default configuration ● Improving Startup Time ● Taking Advantage of Multi-core processors ● Picking the Right Garbage Collector Throughput/Response Time Disk/Flash Consumption Memory Consumption Clock Speed, Number of CPUs Heap Size ? JIT Strategy Startup Time Garbage Collection Policy © Oracle 2010 22 Java SE Embedded Design Focus • Assumptions leading to our default configuration of SE Embedded – Most embedded devices are resource constrained – Keeping per unit device cost low is high priority – Use lower clocked processors Option Java SE Embedded Default State Performance Monitoring Off by Default Compression of JAR Files All Jar File Compressed All JRE Files Included Optional Files Removed Class Data Sharing Off by Default JIT Compiler Only –client JIT available © Oracle 2010 23 Improving Startup Time ● Class Data Sharing (If classloading is bottleneck) − Enabling Class Data Sharing − Customizing Class Data Sharing Archive − Can improve Startup by 25%-30% ● Uncompressing jar files (If disk space is available) − Gain is dependent on disk access and CPU clock speed ● Lower Compilation Threshold (If MP device) -XX:CompilationThreshold=xxxx (default is 1500) ● Deferring Initialization or Class Loading in your application © Oracle 2010 24 Enabling and Configuring Class Data Sharing ● Enabling CDS with default classlist − java –Xshare:dump − Once complete, CDS is automatically enabled ● Use java –Xshare:on OR –Xshare:off to compare startup times. ● The default classlist is for GUI Swing Based Apps © Oracle 2010 25 Customizing Class Data Sharing for Embedded Java Applications 1. Create a list of classes loaded at the startup of your application java –Xshare:off –XX:+TraceClassLoadingPreorder {your app} >my_class_list *exit your app soon after startup 2. Extract only bootclass loaded classes. Outputs classlist.linux. java MakeClassList my_class_list >new_classlist 3. Add checksum to end of new_classlist java AddJsum new_classlist classlist 4. Copy classlist to {JRE}/lib directory 5. Create classes.jsa file java –Xshare:dump – You now have a customized classes.jsa file! Tools referenced on this page can be found in openjdk sources here: jdk/make/tools/src/build/tools © Oracle 2010 26 Taking Advantage of Multi-Core Processors with Java ● Built in VM Features that take advantage of SMP − Parallel Garbage Collection − Concurrent Garbage Collection − Background JIT Compilation ● Lower Compilation Threshold ● Parallelize your Java Application Code © Oracle 2010 27 Which Garbage Collector Should I Use? Java SE Embedded Contains all of the standard collectors Collector Option Pro Con MP Serial -XX:+UseSerialGC Best Choice for single N (default) CPU Concurrent -XX:+UseConcMarkSweepGC Better if response Uses processor Y -XX:+CMSIncrementalMode time is highest resources while priority embedded app is Shorter GC pauses running Parallel -XX:+UseParallelGC Better if throughput is GC must still pause Y (Young) highest priority. embedded app during -XX:+UseParallelOldGC Uses multiple collections. Parallel (Old) processors to speed up GC collection For more details on GC tuning options see: http://www.oracle.com/technetwork/java/javase/gc-tuning-6-140523.html © Oracle 2010 28 Reducing System Resource Requirements (Reducing Memory Consumption) ●Customizing Heap Sizes -Xms -Xmx ●Adjust Free Ratios -XX:MaxHeapFreeRatio=xx (control heap reduction, default 70) -XX:MinHeapFreeRatio=xx (controls heap expansion, default 40) ●Reducing JIT CodeBuffer -XX:ReservedCodeCacheSize=xxM ●Standard Java SE tools can be used to identify potential memory savings − Use jvisualvm with Linux x86 JDK ● Heapdump option © Oracle 2010 29 Java in Embedded – Use Cases Java SE for Embedded - Example devices • Routers & Switches • Smart Meters • • ATMs • Storage Appliances RFID Readers • Video Conferencing • • Parking Meters
Recommended publications
  • Anpassung Eines Netzwerkprozessor-Referenzsystems Im Rahmen Des MAMS-Forschungsprojektes

    Anpassung Eines Netzwerkprozessor-Referenzsystems Im Rahmen Des MAMS-Forschungsprojektes

    Anpassung eines Netzwerkprozessor-Referenzsystems im Rahmen des MAMS-Forschungsprojektes Diplomarbeit an der Fachhochschule Hof Fachbereich Informatik / Technik Studiengang: Angewandte Informatik Vorgelegt bei von Prof. Dr. Dieter Bauer Stefan Weber Fachhochschule Hof Pacellistr. 23 Alfons-Goppel-Platz 1 95119 Naila 95028 Hof Matrikelnr. 00041503 Abgabgetermin: Freitag, den 28. September 2007 Hof, den 27. September 2007 Diplomarbeit - ii - Inhaltsverzeichnis Titelseite i Inhaltsverzeichnis ii Abbildungsverzeichnis v Tabellenverzeichnis vii Quellcodeverzeichnis viii Funktionsverzeichnis x Abkurzungen¨ xi Definitionen / Worterkl¨arungen xiii 1 Vorwort 1 2 Einleitung 3 2.1 Abstract ......................................... 3 2.2 Zielsetzung der Arbeit ................................. 3 2.3 Aufbau der Arbeit .................................... 4 2.4 MAMS .......................................... 4 2.4.1 Anwendungsszenario .............................. 4 2.4.2 Einführung ................................... 5 2.4.3 NGN - Next Generation Networks ....................... 5 2.4.4 Abstrakte Darstellung und Begriffe ...................... 7 3 Hauptteil 8 3.1 BorderGateway Hardware ............................... 8 3.1.1 Control-Blade - Control-PC .......................... 9 3.1.2 ConverGate-D Evaluation Board: Modell easy4271 ............. 10 3.1.3 ConverGate-D Netzwerkprozessor ....................... 12 3.1.4 Motorola POWER Chip (MPC) Modul ..................... 12 3.1.5 Test- und Arbeitsumgebung .......................... 13 3.2 Vorhandene
  • Embedded Java with GCJ

    Embedded Java with GCJ

    Embedded Java with GCJ http://0-delivery.acm.org.innopac.lib.ryerson.ca/10.1145/1140000/11341... Embedded Java with GCJ Gene Sally Abstract You don't always need a Java Virtual Machine to run Java in an embedded system. This article discusses how to use GCJ, part of the GCC compiler suite, in an embedded Linux project. Like all tools, GCJ has benefits, namely the ability to code in a high-level language like Java, and its share of drawbacks as well. The notion of getting GCJ running on an embedded target may be daunting at first, but you'll see that doing so requires less effort than you may think. After reading the article, you should be inspired to try this out on a target to see whether GCJ can fit into your next project. The Java language has all sorts of nifty features, like automatic garbage collection, an extensive, robust run-time library and expressive object-oriented constructs that help you quickly develop reliable code. Why Use GCJ in the First Place? The native code compiler for Java does what is says: compiles your Java source down to the machine code for the target. This means you won't have to get a JVM (Java Virtual Machine) on your target. When you run the program's code, it won't start a VM, it will simply load and run like any other program. This doesn't necessarily mean your code will run faster. Sometimes you get better performance numbers for byte code running on a hot-spot VM versus GCJ-compiled code.
  • Qoriq: High End Industrial and Networking Processing

    Qoriq: High End Industrial and Networking Processing

    TM TechDays 2013 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Airfast, BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MagniV, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, Ready Play, Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, SafeAssure, the SafeAssure logo, SMARTMOS, TurboLink, VortiQa and Xtrinsic are PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Airfast, BeeKit, trademarks of Freescale Semiconductor, Inc. All other product or service names are the BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MagniV, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, TM property of their respective owners. © 2012 Freescale Semiconductor, Inc. 1 Ready Play, SafeAssure, the SafeAssure logo, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All . other product or service names are the property of their respective owners. © 2012 Freescale Semiconductor, Inc. 2013 2011 QorIQ Qonverge QorIQ next-generation platform launch platform based T series 28nm on Layerscape architecture 2008 QorIQ Multicore Platform launch (P series) Accelerating the P series 45nm Network’s IQ 2004 Dual-core
  • Java in Embedded Linux Systems

    Java in Embedded Linux Systems

    Java in Embedded Linux Systems Java in Embedded Linux Systems Thomas Petazzoni / Michael Opdenacker Free Electrons http://free-electrons.com/ Created with OpenOffice.org 2.x Java in Embedded Linux Systems © Copyright 2004-2007, Free Electrons, Creative Commons Attribution-ShareAlike 2.5 license http://free-electrons.com Sep 15, 2009 1 Rights to copy Attribution ± ShareAlike 2.5 © Copyright 2004-2008 You are free Free Electrons to copy, distribute, display, and perform the work [email protected] to make derivative works to make commercial use of the work Document sources, updates and translations: Under the following conditions http://free-electrons.com/articles/java Attribution. You must give the original author credit. Corrections, suggestions, contributions and Share Alike. If you alter, transform, or build upon this work, you may distribute the resulting work only under a license translations are welcome! identical to this one. For any reuse or distribution, you must make clear to others the license terms of this work. Any of these conditions can be waived if you get permission from the copyright holder. Your fair use and other rights are in no way affected by the above. License text: http://creativecommons.org/licenses/by-sa/2.5/legalcode Java in Embedded Linux Systems © Copyright 2004-2007, Free Electrons, Creative Commons Attribution-ShareAlike 2.5 license http://free-electrons.com Sep 15, 2009 2 Best viewed with... This document is best viewed with a recent PDF reader or with OpenOffice.org itself! Take advantage of internal
  • SEWIP Program Leverages COTS P 36 P 28 an Interview with Deon Viergutz, Vice President of Cyber Solutions at Lockheed Martin Information Systems & Global Solutions

    SEWIP Program Leverages COTS P 36 P 28 an Interview with Deon Viergutz, Vice President of Cyber Solutions at Lockheed Martin Information Systems & Global Solutions

    @military_cots John McHale Obsolescence trends 8 Special Report Shipboard displays 44 Mil Tech Trends Predictive analytics 52 Industry Spotlight Aging avionics software 56 MIL-EMBEDDED.COM September 2015 | Volume 11 | Number 6 RESOURCE GUIDE 2015 P 62 Navy SEWIP program leverages COTS P 36 P 28 An interview with Deon Viergutz, Vice President of Cyber Solutions at Lockheed Martin Information Systems & Global Solutions Military electronics market overview P 14 Volume 11 Number 6 www.mil-embedded.com September 2015 COLUMNS BONUS – MARKET OVERVIEW Editor’s Perspective 14 C4ISR funding a bright spot in military 8 Tech mergers & military electronics electronics market obsolescence By John McHale, Editorial Director By John McHale Q&A EXECUTIVE OUTLOOK Field Intelligence 10 Metadata: When target video 28 Defending DoD from cyberattacks, getting to data is not enough the left of the boom By Charlotte Adams 14 An interview with Deon Viergutz, Vice President of Cyber Solutions at Lockheed Martin Information Mil Tech Insider Systems & Global Solutions 12 Broadwell chip boosts GPU performance for COTS SBCs 32 RF and microwave innovation drives military By Aaron Frank radar and electronic warfare applications An interview with Bryan Goldstein, DEPARTMENTS General Manager of the Aerospace and Defense, Analog Devices 22 Defense Tech Wire By Mariana Iriarte SPECIAL REPORT 60 Editor’s Choice Products Shipboard Electronics 112 University Update 36 U.S. Navy’s electronic warfare modernization On DARPA’s cybersecurity radar: 36 effort centers on COTS Algorithmic and side-channel attacks By Sally Cole, Senior Editor By Sally Cole 114 Connecting with Mil Embedded 44 Key to military display technologies: Blog – The fascinating world of System integration By Tom Whinfrey, IEE Inc.
  • Dual-Core ARM Cortex-A7 • 2 X ARM Cortex A7 Cpus, up to 1.0Ghz

    Dual-Core ARM Cortex-A7 • 2 X ARM Cortex A7 Cpus, up to 1.0Ghz

    Технологии QNX и КПДА в России Москва, 13 апреля 2017 Микропроцессоры NXP c с поддержкой технологий QNX для промышленных, сетевых, автомобильных приложений. Семейства QorIQ, i.MX и S32V. Александр Акименко, Группа компаний Симметрон Программа презентации • i.MX 6QuadPlus/6DualPlus – флагман линейки i.MX • i.MX 7 – энергоэффективное решение для IoT • Анонс процессоров i.MX 8 – взгляд в будущее линейки i.MX • LS1012A – самый маленький и самый энергоэффективный 64- битный процессор • LS1020A/21A/22A – двухъядерные процессоры с широким набором периферии для IoT и промышленных приложений • LS1023A/43A – 64-разрядные процессоры с поддержкой 10Gbps Ethernet • S32V – процессоры для реализации функций ADAS в автомобильной электронике 1 i.MX 6QuadPlus/6DualPlus (upgraded i.MX 6Quad/6Dual) QNX SDP 7.0 Specifications: BSP available • CPU: i.MX 6QuadPlus: 4x Cortex-A9 @ 800MHz/852MHz/1GHz/1.2GHz i.MX 6DualPlus: 2x Cortex-A9 @ 800MHz/852MHz/1GHz/1.2GHz • Process: 40nm • Package: 21x21 0.8mm Flip-chip BGA • Temp Range (Tj): • Auto -40 to 125C • Industrial -40 to 105C • Extended Commercial -20 to 105C • Qual Tiers: Commercial, Automotive, Industrial • Pin compatible with i.MX 6Quad and i.MX 6Dual • Up to 10,000 DMIPS 2 i.MX Processor Roadmap 6QuadPlus i.MX 8 family 6Quad Advanced Graphics and Performance ARM ® v8-A (32-bit/ 64-bit) 6DualPlus i.MX 8M family pin Compatible pin 6Dual - Advanced Audio and Video to - ARM ® v8-A 6DualLite (32-bit/ 64-bit) Pin 6Solo i.MX 8X family Safety Critical & Efficient Performance 6SoloX ® ARM v8-A (32-bit/ 64-bit) Software Compatible Software 6SoloLite 6UltraLite i.MX 7 Power Efficiency & BOM Cost Optimizations ® 6ULL ARM v7-A (32-bit) ® ARM v7-A 3 i.MX 7Dual/7Solo QNX SDP 7.0 BSP Specifications: available .
  • Computer Architectures an Overview

    Computer Architectures an Overview

    Computer Architectures An Overview PDF generated using the open source mwlib toolkit. See http://code.pediapress.com/ for more information. PDF generated at: Sat, 25 Feb 2012 22:35:32 UTC Contents Articles Microarchitecture 1 x86 7 PowerPC 23 IBM POWER 33 MIPS architecture 39 SPARC 57 ARM architecture 65 DEC Alpha 80 AlphaStation 92 AlphaServer 95 Very long instruction word 103 Instruction-level parallelism 107 Explicitly parallel instruction computing 108 References Article Sources and Contributors 111 Image Sources, Licenses and Contributors 113 Article Licenses License 114 Microarchitecture 1 Microarchitecture In computer engineering, microarchitecture (sometimes abbreviated to µarch or uarch), also called computer organization, is the way a given instruction set architecture (ISA) is implemented on a processor. A given ISA may be implemented with different microarchitectures.[1] Implementations might vary due to different goals of a given design or due to shifts in technology.[2] Computer architecture is the combination of microarchitecture and instruction set design. Relation to instruction set architecture The ISA is roughly the same as the programming model of a processor as seen by an assembly language programmer or compiler writer. The ISA includes the execution model, processor registers, address and data formats among other things. The Intel Core microarchitecture microarchitecture includes the constituent parts of the processor and how these interconnect and interoperate to implement the ISA. The microarchitecture of a machine is usually represented as (more or less detailed) diagrams that describe the interconnections of the various microarchitectural elements of the machine, which may be everything from single gates and registers, to complete arithmetic logic units (ALU)s and even larger elements.
  • Freescale Qoriq P4080 DMA-DDR Performance Analysis

    Freescale Qoriq P4080 DMA-DDR Performance Analysis

    TM Wai Chee Wong Sr.Member of Technical Staff Freescale Semiconductor Raghu Binnamangalam Sr.Technical Marketing Engineer Cadence Design Systems Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, t he Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. DAC 2013, Austin, TX • Company Overview • Use of emulation at Freescale • Palladium usage for emulation model under test • Performance case studies • Experiences using Palladium system • Summary Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a TM 2 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Global leader in embedded
  • Vybrid Controllers Technical Overview

    Vybrid Controllers Technical Overview

    TM June 2013 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, ColdFire+, C- Ware, the Energy Efficient Solutions logo, Kinetis, mobileGT, PEG, PowerQUICC, Processor Expert, QorIQ, Qorivva, SafeAssure, the SafeAssure logo, StarCore, Symphony and VortiQa are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Airfast, BeeKit, BeeStack, CoreNet, Flexis, Layerscape, MagniV, MXC, Platform in a Package, QorIQ Qonverge, QUICC Engine, Ready Play, SMARTMOS, Tower, TurboLink, Vybrid and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2013 Freescale Semiconductor, Inc. • Overview of Vybrid Family • Vybrid Tower Board • Vybrid System Modules • QuadSPI Flash • Vybrid Clock System • Vybrid Power System • Vybrid Boot Operation • High Assurance Boot • Vybrid Trusted Execution • LinuxLink and MQX Embedded Software • DS-5 compiler TM Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, ColdFire+, C-Ware, the Energy Efficient Solutions logo, Kinetis, mobileGT, PEG, PowerQUICC, Processor Expert, QorIQ, Qorivva, SafeAssure, the SafeAssure logo, StarCore, Symphony and VortiQa are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. 2 Airfast, BeeKit, BeeStack, CoreNet, Flexis, Layerscape, MagniV, MXC, Platform in a Package, QorIQ Qonverge, QUICC Engine, Ready Play, SMARTMOS, Tower, TurboLink, Vybrid and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2013 Freescale Semiconductor, Inc. TM Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, ColdFire+, C- Ware, the Energy Efficient Solutions logo, Kinetis, mobileGT, PEG, PowerQUICC, Processor Expert, QorIQ, Qorivva, SafeAssure, the SafeAssure logo, StarCore, Symphony and VortiQa are trademarks of Freescale Semiconductor, Inc., Reg.
  • AN5079, Qoriq P1 Series to T1 Series Migration Guide

    AN5079, Qoriq P1 Series to T1 Series Migration Guide

    NXP Semiconductors Document Number: AN5079 Application Note Rev. 0, 07/2017 QorIQ P1 Series to T1 Series Migration Guide Contents 1 About this document 1 About this document............................................... 1 This document provides a summary of the significant 2 Introduction.............................. .............................. 1 differences between QorIQ P1 series and T1 series devices. 3 Feature-set comparison................... ........................2 The QorIQ P1 series devices discussed in this document are P1010, P1020, and P1022. These are compared with QorIQ T1 4 PowerPC e500v2 vs e5500 core..............................4 series devices including T1024, T1014, T1023, T1013, T1040, 5 Ethernet controller...................................................8 T1020, T1042, and T1022. Use this document as a recommended resource for migrating products from P1 series 6 POR sequence....................................................... 14 to T1 series devices. 7 DDR memory controller................ .......................17 8 Local bus - eLBC vs IFC...................................... 18 9 USB.......................................................................20 2 Introduction 10 eSDHC...................................................................21 QorIQ P1 series devices combine single or dual e500v2 Power 11 Related documentation..........................................22 Architecture® core offering excellent combinations of 12 Revision history.................................................... 22 protocol
  • Freescale Qoriq Product Family Roadmap

    Freescale Qoriq Product Family Roadmap

    TM April 2013 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, ColdFire+, C- Ware, the Energy Efficient Solutions logo, Kinetis, mobileGT, PEG, PowerQUICC, Processor Expert, QorIQ, Qorivva, StarCore, Symphony and VortiQa are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Airfast, BeeKit, BeeStack, CoreNet, Flexis, Layerscape, MagniV, MXC, Platform in a Package, QorIQ Qonverge, QUICC Engine, Ready Play, SafeAssure, the SafeAssure logo, SMARTMOS, Tower, TurboLink, Vybrid and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2013 Freescale Semiconductor, Inc. • Freescale Differentiation and Roadmap • Power Architecture and ARM® Technology Roadmap • Product Summaries • IP Deep Dive on DDRC, PEX, Ethernet • Application Example TM Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, ColdFire+, C-Ware, the Energy Efficient Solutions logo, Kinetis, mobileGT, PEG, PowerQUICC, Processor Expert, QorIQ, Qorivva, StarCore, Symphony and VortiQa are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Airfast, BeeKit, BeeStack, CoreNet, 2 Flexis, Layerscape, MagniV, MXC, Platform in a Package, QorIQ Qonverge, QUICC Engine, Ready Play, SafeAssure, the SafeAssure logo, SMARTMOS, Tower, TurboLink, Vybrid and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2013 Freescale Semiconductor,
  • Industrial Iot: from Embedded to the Cloud Using Java from Beginning to End

    Industrial Iot: from Embedded to the Cloud Using Java from Beginning to End

    Industrial IoT: from Embedded to the Cloud using Java from Beginning to End © Copyright Azul Systems 2015 Simon Ritter Deputy CTO, Azul Systems @speakjava © Copyright Azul Systems 2019 1 Industrial IoT © Copyright Azul Systems 2019 Industrial Revolutions Industry 1.0 Industry 2.0 Industry 3.0 Industry 4.0 st 1st mechanical loom 1st assembly line 1 programmable Industrial (1784) (1913) logic controller Internet (1969) End of Start of Start of Start of 18th Century 20th Century 1970s 21st Century © Copyright Azul Systems 2019 3 Industrial Automation The traditional segment drivers haven’t changed... Competitive edge Production throughput Enhanced quality Manufacturing visibility and control Energy and Government & Safety Business resource management standards compliance and security integration © Copyright Azul Systems 2019 5 Industrial Automation Smart devices are key Local intelligence and Flexible networking Performance and scalability decision-making Security Remote management Functions become services © Copyright Azul Systems 2019 6 Industrial IoT: Edge to Cloud Intelligent Gateways Cloud Edge Devices • Minimal compute power • Complex event filtering • Data collection • Raw event filtering • Basic analytics • Analytics • Programmable control • Offline/online control • Machine Learning • Mesh networking • Command & control © Copyright Azul Systems 2019 Why Java For Industrial IoT? © Copyright Azul Systems 2019 Java Embedded Platform ▪ Hardware and Operating System independence ▪ Local database, web-enabled, event aware ▪ Optimised for