ECE 136L Microelectronics Laboratory Winter Quarter Mar 28 – Jun 15 2018 class website: http://iebl.ucsd.edu/ECE136L

4/19/2018 Lecture 4

Thermal Oxidation of Si

1 Thermal Oxidation of Si • The rise of Si in the industry is owed to the high quality natural that can be grown on its surface. • Today, other surfaces have been ‘un-pinned’ and newer high performance materials are being utilized, but the overwhelming manufacturing advances in Si keeps Si the forerunner technology material and at least technology carrier (heterogeneous integration of other higher performance channel materials to Si).

• Uses of SiO2: • Two methods to oxidize Si: - High quality insulator - Diffusion/Implantation barrier - Dry oxidation - of surface Si +O2 → SiO2 - Wet Oxidation

Si + 2H2O → SiO2 + 2H2

• During Si oxidation, 46% of the grown film thickness is consumed from Si,

that is, 54% of the SiO2 grows above the original Si surface.

2 Modeling Thermal Oxidation of Si

• O2 must reach the Si interface in order for the SiO2 reaction to occur. Therefore, O2 needs to diffuse through preformed SiO2 to reach the Si surface. • Fick’ first law of diffusion: The particle’s flux is directly proportional to the concentration gradient of the particle: J = −D∂N (x,t) / ∂x

• But O2 does not accumulate in SiO2, therefore, we can write:

J = −D(Ni − N0 ) / X0

• At the oxide interface, we have a kinetic reaction that depletes Ni

J = ks Ni DN ⇒ J = 0 ks + D / ks How to Calculate Oxide Thickness • Similar to procedure in vapor phase epitaxy, growth rate is directly proportional to the oxidizing flux divided by the # of oxidizing molecules, M.

DN0 dX0 / dt = J / M = M (X0 + D / ks ) M M dt / dX0 = X0 + DN0 ks N0 2 MX0 M ⇒ t = + X0 −τ 2DN0 ks N0 X 2 X B = 2DN / M; ⇒ t = 0 + 0 −τ 0 B B / A A = 2D / ks 2 Xi Xi Boundary condition, t=0, X0=Xi ⇒ τ = + B B / A 2 X0 + AX0 − B(t +τ ) = 0 Short A(! 4B $ + B X0 (t) = *"1+ 2 (t +τ )% −1- = (t +τ ) 1/2 growth A(! 4B $ + 2 )# 2A & , A X0 (t) = *"1+ 2 (t +τ )% −1- time: 2 )*# A & ,- Long growth X t Bt time: 0 ( ) = Linear and Parabolic Regimes B = 2DN / M; Long growth time 0 B X0 (t) = Bt Linear regime: (parabolic regime): A = 2D / k X0 (t) = (t +τ ) s A

D = D0 exp(−EA / kT) Kinetic Coefficients B = 2DN / M; Long growth time 0 B X0 (t) = Bt Linear regime: (parabolic regime): A = 2D / k X0 (t) = (t +τ ) s A

D = D0 exp(−EA / kT)

• Rapid wet oxidation, slower higher quality dry oxidation • Dry oxidation model need to invoke initial oxide thickness Xi=25nm.

• Where is the O2 flow rate/partial pressure included? N0. Partial Pressure Depdence B = 2DN / M; Long growth time 0 B X0 (t) = Bt Linear regime: (parabolic regime): A = 2D / k X0 (t) = (t +τ ) s A

D = D0 exp(−EA / kT) • Where is the O2 flow rate/partial pressure included? In N0. Oxidation of <100> Substrates Oxidation of <111> Substrates Example

A <100> silicon wafer has a 2000-Å oxide on its surface

(a) How long did it take to grow this oxide at 1100o C in dry ? 2.8 hours (b)The wafer is put back in the furnace in wet oxygen at 1000o C. How long will it take to grow an additional 3000 Å of oxide?

Xo=5000 Å

Total time wet oxidation of 5000 Å: 1.5 hours

Time to oxidize additional 3000 Å =1.5-0.4=1.1 hours Example

A <100> silicon wafer has a 2000-Å oxide on its surface

(a) How long did it take to grow this oxide at 1100o C in dry oxygen?

(b)The wafer is put back in the furnace in wet oxygen at 1000o C. How long will it take to grow an additional 3000 Å of oxide? X 2 X X 2 X t = 0 + 0 −τ τ = i + i B B / A B B / A (a) From Table 3.1, 2 2 "−1.23% µm B 6 "−2.00 % µm B=7.72x10 exp$ ' = 3.71x10 exp$ ' Xi = 25nm # kT & hr A # kT & hr µm2 B µm For T=1373 K, B=0.0236 and = 0.169 hr A hr 2 0.025µm 0.025µm τ = ( ) + = 0.174 hr µm2 µm 0.0236 0.169 hr hr 2 0.2µm 0.2µm t= ( ) + − 0.174hr = 2.70 hr µm2 µm 0.0236 0.169 hr hr Example

A <100> silicon wafer has a 2000-Å oxide on its surface

(a) How long did it take to grow this oxide at 1100o C in dry oxygen?

(b)The wafer is put back in the furnace in wet oxygen at 1000o C. How long will it take to grow an additional 3000 Å of oxide? X 2 X X 2 X t = 0 + 0 −τ τ = i + i (b) From Table 3.1, B B / A B B / A # −0.78& µm2 B # −2.05& µm B = 3.86x102 exp% ( = 9.70x107 exp% ( X X=0.2μm= 0 $ kT ' hr A $ kT ' hr i i µm2 B µm For T =1273 K, B = 0.314 and = 0.742 hr A hr 2 (0.2µm) 0.2µm τ = + = 0.398 hr µm2 µm 0.314 0.742 hr hr 2 (0.5µm) 0.5µm t = + − 0.398hr =1.07 hr µm2 µm 0.314 0.742 hr hr

€ Dopant Redistribution During Oxidation

Boron (slow) Boron (fast in H2) • Impurities diffuse at high temperature and have different chemical affinities at interfaces. • Impurities either pile up or deplete depending on diffusion coefficient, D, and segregation coefficient, m, which is ratio of concentration phosphorous of dopant in Si to that in (slow) Gallium (fast) oxide. • m=0.3 for Boron at normal T.

• m=10 for Phosphorous, Arsenic, Antimony (rejected by oxide and have low D in oxide). • m=20 for Gallium but diffuses rapidly in the oxide, so the interface is Ga free. SiO2 as a Diffusion Mask

• Required oxide thickness depends upon dopant species and temperature.

• Typical mask thickness is 0.5-1μm. Background doping shouldn’t change by over 10%.

• Hydrogen greatly enhances diffusion of boron - wet oxidation release hydrogen.

• Si3N4 can be more effective as a diffusion mask for fast diffusion species (Ga and Al). Selective Oxidation and Shallow Trench Formation • Local Oxidation of Si (LOCOS). (10-20nm) To protect Si

Recess process

Minimize bird peak

• Isolation technology in MOS processes • Provides isolation between nearby devices • Fully recessed process attempts to minimize birds beak Shallow/Deep Trench Formation and Filling

• Si trench is etched by reactive etching.

• A thin SiO2 layer is grown to protect Si in the trench.

• Poly-Si is deposited and its excess is removed by a photolithography step.

• Si3N4 is removed where field oxide is to be grown.

• The polySi-oxide-Si is often used as capacitor structures in dynamic memory chips (DRAMS). Shallow/Deep Trench Isolation Chemical Mechanical Polishing

• Mechanical polishing is widely used to achieve highly planar surfaces.

• Used in multilevel metalization systems including both aluminum and copper. Example of Shallow and Deep Trench Isolation

Shallow trench isolation

CMP planarization

Deep trench isolation

Microphotograph of actual deep and shallow trench isolation applied to SiGE HBT technology. CMP for Multi-layer Metallization

6 5 4 3 2 1

Tungsten

Multilevel metallization fabricated with chemical mechanical polishing (a) SEM of 6- level thin-wire copper. First-level copper is connected with studs to tungsten local interconnect. (b) SEM of 6-level copper with low RC metallization on levels 5 and 6. Oxide Thickness Oxide Thickness

Oxide thickness for constructive interference kλ 2X = o n

n = index of refraction (1.46 for SiO2 )