micromachines

Article Surface Modification of Electroosmotic Microchannel Using Thermal Dry Oxidation

Tuan Norjihan Tuan Yaakub 1,2, Jumril Yunas 1,* ID , Rhonira Latif 1, Azrul Azlan Hamzah 1, Mohd Farhanulhakim Mohd Razip Wee 1 and Burhanuddin Yeop Majlis 1

1 Institute of Microengineering and Nanoelectronics (IMEN), Universiti Kebangsaan Malaysia (UKM), 43600 UKM Bangi, Selangor, Malaysia; [email protected] (T.N.T.Y.); [email protected] (R.L.), [email protected] (A.A.H.); [email protected] (M.F.M.R.W.); [email protected] (B.Y.M.) 2 Department of Electronics Engineering, Faculty of Engineering, Universiti Teknologi MARA, 40450 Shah Alam, Selangor, Malaysia * Correspondence: [email protected]; Tel.: +60-3-8911-8541

 Received: 30 March 2018; Accepted: 4 May 2018; Published: 7 May 2018 

Abstract: A simple fabrication method for the surface modification of an electroosmotic silicon microchannel using thermal dry oxidation is presented. The surface modification is done by coating the silicon surface with a (SiO2) layer using a thermal oxidation process. The process aims not only to improve the surface quality of the channel to be suitable for electroosmotic fluid transport but also to reduce the channel width using a simple technique. Initially, the parallel microchannel array with dimensions of 0.5 mm length and a width ranging from 1.8 µm to 2 µm are created using plasma etching on the 2 cm × 2 cm silicon substrate <100>. The oxidation of the silicon channel in a thermal chamber is then conducted to create the SiO2 layer. The layer properties and the quality of the surface are analyzed using scanning electron microscopy (SEM) and a surface profiler, respectively. The results show that the maximum oxidation growth rate occurs in the first 4 h of oxidation time and the rate decreases over time as the layer becomes thicker. It is also found that the surface roughness is reduced with the increase of the process temperature and the oxide thickness. The scallop effect on the vertical wall due to the plasma etching process also improved with the presence of the oxide layer. After oxidation, the channel width is reduced by ~40%. The demonstrated method is suggested for the fabrication of a uniform channel cross section with high aspect ratio in sub-micro and nanometer scale that will be useful for the electroosmotic (EO) manipulation of the biomedical fluid sample.

Keywords: surface modification; electroosmotic flow; microfluidic; silicon nanochannel; thermal oxidation

1. Introduction The past decade has seen the rapid advancement of microfluidic chip development. The main reason is because of the fluid flow characteristics in the micrometer structure that allows for an extremely slow fluid movement, less sample volume consumption and precision in fluid control. In microfluidic systems, the electroosmotic device (EO) becomes one of the most important parts in which the fluid can be manipulated by the electric potential between inlet and outlet. EO flow mechanism in a microchannel has been used for numerous microfluidic applications, including for fluids transport and manipulation [1], charge separation and ion transport [2] and fluids pumps [3]. As an example, the EO flow mechanism has been applied to transport fluids as in electroosmotic pump (EOP) [4]. The system was capable of generating a maximum flow rate of 15 µL/min, a significant amount of flow rate per device volume for a microfluidic system. The microchannel width in the fabricated pump is much greater than the

Micromachines 2018, 9, 222; doi:10.3390/mi9050222 www.mdpi.com/journal/micromachines Micromachines 2018, 9, 222 2 of 9 height, to ease the fabrication process. Such designs suffer from clogging due to structure collapsing after bonding process for microsystem integration. Therefore, a microchannel structure for EO device requires a sufficient high channel aspect ratio (H/W >> 1) to create a uniform electric field distribution along the channel that induces a stable electroosmotic flow. For ion separation purposes, a small channel cross section is necessary due to stronger ion interaction between the charged system (ionic solution and charged channel surface) [5]. Microfluidic channels are typically fabricated in glass, silicon and polymeric substrate. The fabrication procedures of polymeric material like Polydimethylsiloxane (PDMS) and Poly (methyl methacrylate) (PMMA) offer a significantly lower cost and ease fabrication procedures [6,7]. Despite this, the polymeric based materials have a lower wall zeta potential and heat dissipation rates as compared to glass because glass has superior chemical properties for surface electrostatics reactions. Furthermore, a few methods to modify the PDMS and PMMA based microchannel surface have been previously reported. For instance, the plasma-based technique to tune the wettability of the surface has been demonstrated [8,9], indicating that a surface modification is preferable for improving the quality of the channel surface. Glass also has an excellent dielectric property that is important for electroosmotic flow [10]. However, the glass fabricating technique is a major drawback due to its low etching rate, which must be considered when designing a glass based EO microfluidic device. On the other hand, silicon material has been, for many years, established as the material to employ for a wide range of microelectronics devices and applications. A silicon microchannel has similar electrical properties to a glass substrate and it can be fabricated using the well-established integrated circuit (IC) fabrication technology [11]. Reactive ion etching using SF6 plasma is widely used to create uniform micro-channels with a vertical wall for microfluidic devices but the wall quality is poor due to the scallop effect, resulting from the repetitive alternating phase of gas (C4F8) deposition and the etching gas (SF6) on the targeted wall. Some work on reducing the scallop effects by optimizing the deep reactive ion etching (DRIE) parameter has been reported. However, this complicated studies, due to the additional gas composition [12], an optimum etch and passivation cycle time [13] as well as the controlled flow rates of the etching/passivation ratio [14]. In this paper, we report the implementation of the dry oxidation process to grow an oxide layer on a prefabricated silicon based microfluidic channel in order to improve its surface quality [15] and at the same time to increase the channel aspect ratio by reducing the channel dimension down to the nanoscale for ion transport purposes. This method is also preferable because it is simple, compatible with the complementary -oxide- (CMOS) process and eliminates the complex nanolithography process.

2. Microchannel Electroosmotic System Design The principle of electroosmotic ion transport is based on the spontaneous reaction of a solid surface in contact with an ionic solution. For a negative surface charge, an accumulation of positive charge forms a stern layer in an electrical double layer (EDL) on the capillary wall. Therefore, the EO flow mechanism is produced by way of the induction principle of cations in the diffuse layer in the electric double layer (EDL), which move with the presence of the electric field. The cations migration will drag the bulk fluid in the capillary towards the negative potential in the flat flow profile. The microfluidic EO system consists of several surface–modified microfluidic channels in parallel array with an SiO2 coating with a length of 500 µm that is fabricated on a 390 µm thick silicon wafer <100>. The channel shape is rectangular with a width smaller than 1 µm and a depth of about 2 µm. A microchannel input (Inlet A—Outlet 1), having a channel geometry of 200 µm width and 20 mm length are integrated with the SiO2 coated silicon microchannel array. On the other end of the surface modified channel, the outlet channel (outlet 2 with similar dimensions to the inlet channel is integrated. The inlet port contains buffer and ionic solution that will be transported through the microchannel array towards the outlet reservoir by electroosmotic flow. For that purpose, a voltage potential V is applied across the microchannel array to create an electric field as shown in Figure1. MicromachinesMicromachines 2018 2018, ,,9 9, ,,x 222x 33 of of 9 9

FigureFigure 1. 1. The The microchannel microchannel electroosmotic electroosmotic system. system.

InIn this this work, work,work, the thethe SiO SiOSiO22 2 coatedcoated silicon silicon microchannel microchannel reduces reduces not not only only the the channel channelchannel cross-section cross-sectioncross-section dimensiondimension butbut alsoalso improvesimproves thethe surfacesurface quality.quality. ToTo create create micron micron size size rectangular rectangular microchannels,microchannels, wewe utilized utilized standard standard photolithography photolithography and andand the the reac reactivereactivetive ion ion etching etching technique. technique. The The thermal thermal oxidation oxidation waswas performed performed under underunder atmospheric atmosphericatmospheric pressure pressure with with a a constant constant O O2 2stream streamstream flow flowflow of of 2000 20002000 mL/min mL/minmL/min at at various various processprocess temperatures. temperatures. Through Through the the conducted conducted proced proced procedures,ures,ures, a a uniform uniform oxide oxide growth growth on on both both vertical vertical andand horizontal horizontal surfaces surfaces and and SiO SiO22 rectangular rectangular channels channels of of a a uniform uniform size size and and shape shape in in parallel parallel array array areare produced. produced. AsAs shown shown in in Figure Figure 22, 2,, thethe oxidationoxidation processprocess shouldshould produceproduce anan approximatelyapprapproximatelyoximately uniformuniform oxideoxide growthgrowth rate rate on on both both both the the the horizontal horizontal horizontal and and and vertical vertical vertical silic silic silicononon walls. walls. walls. Hence, Hence, Hence, accurate accurate accurate control control control of of the ofthe thedepth depth depth to to widthtowidth width ratioratio ratio (H/W)(H/W) (H/W) ofof the ofthe the microchannelsmicrochannels microchannels cancan can bebe be achievedachieved achieved afterafter after thethe the oxidationoxidation oxidation process.process. The The final finalfinal dimensiondimension width width of of the the electroosmoti electroosmoticelectroosmoticc channel channel is is in in the the range range below below 1 1 µm µmµm with with a a higher higher aspect aspect ratio. ratio.

HH

WW

FigureFigure 2. 2. Mechanism Mechanism of of dry dry oxidation oxidation on on silicon silicon microchannel. microchannel. Figure 2. Mechanism of dry oxidation on silicon microchannel.

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3. Fabrication Process of Electroosmotic Device (EO) Channel SystemSystem

3.1. Fabrication of Silicon MicrochannelMicrochannel Using Plasma Etching ProcedureProcedure Figure3 3 shows shows thethe processprocess flowflow toto createcreate thethe Si-microchannel.Si-microchannel. Initially,Initially, aa setset ofof electroosmoticelectroosmotic microchannel arraysarrays was was fabricated fabricated using using the standardthe standard photolithography photolithography and deep and reactivedeep reactive ion etching ion (DRIE)etching on (DRIE) the silicon on the wafer silicon <100>. wafer The <100>. parallel The microchannels parallel microchannels were designed were todesigned have a lengthto have of a 0.5 length mm andof 0.5 a variationmm and a of variation widths from of widths 1.8 µm from to 2 1.8µm. µm The to microchannel 2 µm. The microchannel was formed was in a formed straight in line a straight and the distanceline and betweenthe distance each between channel waseachset channel to 5 µ m.was set to 5 µm. The microchannelmicrochannel design design was was transferred transferred onto onto a cleaned a cleaned silicon silicon surface surface by exposing by exposing the substrate the coatedsubstrate with coated a positive with photoresist a positive under photoresist UV-light un exposure.der UV-light To pattern exposure. a vertical To microchannel pattern a vertical on the siliconmicrochannel substrate, on wethe employedsilicon substrate, the high-density we employed reactive the ionhigh-density SF6 etching, reactive with passivationion SF6 etching, gas C with4H8 andpassivation O2 at cryogenic gas C4H temperature8 and O2 at cryogenic with an approximate temperature etch with rate an ofapproximate 1 µm per minute. etch rate After of 1 the µm DRIE per process,minute. theAfter mask the resist DRIE was process, removed the and mask the geometries resist was of theremoved microchannels and the array geometries were observed of the usingmicrochannels a scanning array electron were microscope observed using (SEM). a scanning electron microscope (SEM).

(a) (c)

(b) (d)

Figure 3.3. The diagram of silicon microchannel fabrication process (a) Photoresist as etchingetching mask coating; (b) Transfer patternpattern usingusing photolithography; (c) Pattern development using resist developer; ((d)) SiSi DRIEDRIE alongalong thethe unprotectedunprotected microchannelmicrochannel lineslines && photoresistphotoresist removal.removal.

3.2. Surface ModificationModification of Fabricated SiliconSilicon MicrochannelMicrochannel UsingUsing ThermalThermal OxidationOxidation The surface modification of the prefabricated silicon microchannel was done using an oxidation The surface modification of the prefabricated silicon microchannel was done using an oxidation process in a high thermal ambience. Basically, the oxide was grown on the heated silicon surface at a process in a high thermal ambience. Basically, the oxide was grown on the heated silicon surface at very high temperature between 800–1200 °C with the presence of gas flow or water vapor, a very high temperature between 800–1200 ◦C with the presence of oxygen gas flow or water vapor, referring to dry and wet oxidation respectively. In this work, we created the SiO2 microchannel based referring to dry and wet oxidation respectively. In this work, we created the SiO2 microchannel based on the oxidation of silicon in dry flowing oxygen at atmospheric pressure in three different process on the oxidation of silicon in dry flowing oxygen at atmospheric pressure in three different process temperatures, 990 °C, 1020 °C and 1040 °C. The formation of silicon dioxide layer on silicon channels temperatures, 990 ◦C, 1020 ◦C and 1040 ◦C. The formation of silicon dioxide layer on silicon channels was described by the chemical reaction below: was described by the chemical reaction below:

Si + O2 = SiO2 (1) Si + O2 = SiO2 (1) In dry thermal oxidation, O2 molecules diffuse through the surface oxide layer and react with

the siliconIn dry thermalatom at oxidation,the Si-SiO O2 2interface.molecules The diffuse resulting through SiO the2 surface surface layer oxide islayer not coplanar and react with with the siliconoriginal atom silicon at thesurface, Si-SiO which2 interface. means The 0.44 resultingd of silicon SiO2 issurface consumed layer isfor not a thickness coplanar withof d theoxide original layer silicongrowth surface, in the thermal which means dry oxidation 0.44 d of process. silicon is consumed for a thickness of d oxide layer growth in the thermalBefore dry oxidationstarting the process. oxidation procedure, the etched sample was cleaned in acetone and a methanolBefore ultrasonic starting the bath oxidation for five procedure, minutes theeach etched followed sample by wasrinsing cleaned the insubstrate acetone in and DI a water methanol for ultrasonic1 min. The bath sample for five was minutes then soaked each followed in 10% byHF rinsing solution the for substrate 60 s to in eliminate DI water forthe 1undesired min. The samplenative oxide layer before it was rinsed again in DI water and dried with nitrogen. Then, the samples were placed in the ceramic boat and were put at the mouth of the oxidation glass tube furnace that had previously been filled up with nitrogen (N2) gas at a 2000 mL/min stream

Micromachines 2018, 9, 222 5 of 9 was then soaked in 10% HF solution for 60 s to eliminate the undesired native oxide layer before it was rinsedMicromachines again 2018 in DI, 9, waterx and dried with nitrogen. 5 of 9 MicromachinesThen, the 2018 samples, 9, x were placed in the ceramic boat and were put at the mouth of the oxidation5 of 9 rate. The resistance heater on the tube furnace was then heated up according to the targeted process glass tube furnace that had previously been filled up with nitrogen (N2) gas at a 2000 mL/min stream temperature.rate. The resistance After the heater furnace on the temperature tube furnace reached was then the heatedrequired up temperature, according to the the sample targeted boat process was rate. The resistance heater on the tube furnace was then heated up according to the targeted process pushedtemperature. to the After heated the zone, furnace which temperature is at the center reached of the requiredfurnace tube. temperature, The oxidation the sample process boat began was temperature. After the furnace temperature reached the required temperature, the sample boat was afterpushed we tostopped the heated the supplied zone, which N2 gas is atand the started center to of flow the furnacethe dried tube. oxygen The gas oxidation into the process tube furnace began pushed to the heated zone, which is at the center of the furnace tube. The oxidation process began after underafter we a constant stopped flowthe supplied rate of 2000 N2 gasmL/min. and started The oxidation to flow the process dried was oxygen maintained gas into under the tube a constant furnace we stopped the supplied N2 gas and started to flow the dried oxygen gas into the tube furnace under oxygenunder a flowconstant rate flowat atmospheric rate of 2000 pressuremL/min. fromThe oxidation 4 to 12 h.process Figure was 4 shows maintained the oxidation under a constantfurnace a constant flow rate of 2000 mL/min. The oxidation process was maintained under a constant oxygen apparatusoxygen flow for thermalrate at atmospheric dry oxidation. pressure A uniform from colo 4 rto scheme 12 h. Figurewith no 4 surfaceshows abnormalitythe oxidation appeared furnace flow rate at atmospheric pressure from 4 to 12 h. Figure4 shows the oxidation furnace apparatus for onapparatus the oxidized for thermal sample’s dry oxidation.surface at Aall uniform experiment color conditions.scheme with The no surfacemorphology abnormality of SiO appeared2 growth thermal dry oxidation. A uniform color scheme with no surface abnormality appeared on the oxidized surfaceon the oxidizedon the sample sample’s was surface scanned at usingall experiment F50 Thin Filmconditions. Metrics The at 20morphology different points of SiO while2 growth the sample’s surface at all experiment conditions. The morphology of SiO2 growth surface on the sample cross-sectionsurface on the of samplethe SiO 2 wasmicrochannel scanned using was verifi F50 edThin using Film the Metrics scanning at 20electron different microscope. points while the was scanned using F50 Thin Film Metrics at 20 different points while the cross-section of the SiO2 cross-section of the SiO2 microchannel was verified using the scanning electron microscope. microchannel was verified using the scanning electron microscope.

Figure 4. Schematic diagram of oxidation furnace. FigureFigure 4.4. SchematicSchematic diagramdiagram ofof oxidationoxidation furnace.furnace. 4. Results and Discussion 4.4. ResultsResults andand DiscussionDiscussion 4.1. SiO2 Layer Thickness and Oxidation Growth Rate 4.1.4.1. SiOSiO2 Layer Thickness andand OxidationOxidation GrowthGrowth RateRate The2 average thickness of the oxide layer on the silicon microchannel was highly controlled by the processTheThe averageaverage temperature thickness thickness and of of thethe theoxide oxidation oxide layer layer time. on on the theA silicon plot silicon of microchannel average microchannel oxide was thicknesswas highly highly controlled against controlled time by the byat processvariousthe process temperatureprocess temperature temperatures andthe and oxidation theis shown oxidation time. in Figure Atime. plot A5. of plotIn average the of timeaverage oxide range thickness oxide of 4 thicknessto against 12 h for timeagainst all atoxidation varioustime at processtemperatures,various temperatures process the temperatures oxidation is shown layer inis Figureshown thickness5 .in In Figure the was time 5.found rangeIn the ofto time 4increase to range 12 h for withof all 4 oxidationtothe 12 oxidation h for temperatures, all oxidationtime. In theaddition,temperatures, oxidation the layer higherthe thicknessoxidation the process was layer found temperature, thickness to increase was the with found thicker the oxidationto theincrease oxide time. with layer In addition,the will oxidation be thegrown. higher time. This the In processrelationshipaddition, temperature, the of higher temperature thethe thicker process and the time temperature, oxide for layer the willox theide be thickerthickness grown. the This was oxide relationship well layer agreed will of with temperaturebe grown.the finding andThis timereportedrelationship for the in oxideReference of temperature thickness [16]. wasFrom and well thetime agreed plot, for withwethe perceivedox theide finding thickness the reported maximum was in well Reference thickness agreed [16 withof]. 520 From the nm thefinding oxide plot, wegrownreported perceived at 1040in Reference the °C maximumfor 12 [16]. h of thicknessFromoxidation the of plot,time. 520 we nm perceived oxide grown the atmaximum 1040 ◦C for thickness 12 h of oxidationof 520 nm time. oxide grown at 1040 °C for 12 h of oxidation time.

FigureFigure 5.5. OxideOxide thicknessthickness againstagainst oxidationoxidation timetime ofof thermalthermal drydry oxidationoxidation forfor siliconsilicon <100>.<100>. Figure 5. Oxide thickness against oxidation time of thermal dry oxidation for silicon <100>. The oxide thickness was measured at intervals after 4, 6, 8, 10 and 12 h of the oxidation process. The highestThe oxide growth thickness rate was was observed measured for at the intervals first 4 hafter of oxidation 4, 6, 8, 10 timeand 12for h all of processthe oxidation temperatures. process. TheThe growthhighest rategrowth at all rate conducted was observed process for temperatures the first 4 h of is oxidation presented time in Figure for all process6. It is shown temperatures. that for theThe first growth 4 h ofrate oxidation, at all conducted the maximum process growth temperatures rate was is up presented to 72 nm/h in Figureat 1040 6. °C. It isAs shown the oxidation that for the first 4 h of oxidation, the maximum growth rate was up to 72 nm/h at 1040 °C. As the oxidation

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The oxide thickness was measured at intervals after 4, 6, 8, 10 and 12 h of the oxidation process. The highest growth rate was observed for the first 4 h of oxidation time for all process temperatures. Micromachines 2018, 9, x 6 of 9 TheMicromachines growth rate2018, at9, x all conducted process temperatures is presented in Figure6. It is shown that for6 the of 9 first 4 h of oxidation, the maximum growth rate was up to 72 nm/h at 1040 ◦C. As the oxidation time time increased, we observed a consistent decrease of growth rate. The same trend was observed for increased,time increased, we observed we observed a consistent a consistent decrease decrease of growth of growth rate. The rate. same The trendsame wastrend observed was observed for other for other process temperatures of 1020 °C and 990 °C. The decreasing growth rate by time can be processother process temperatures temperatures of 1020 ◦ofC and1020 990 °C◦ C.and The 990 decreasing °C. The growthdecreasing rate bygrowth time canrate be by explained time can due be explained due to a lower supply of oxygen atoms at the silicon interface as the thickness of the oxide toexplained a lower supplydue to a of lower oxygen supply atoms of at oxygen the silicon atoms interface at the silicon as the interface thickness as of the the thickness oxide layer of increases.the oxide layer increases. We also found that the maximum oxide growth rate was 33% higher with an increase Welayer also increases. foundthat We also the maximumfound that oxidethe maximum growth rateoxide was growth 33% rate higher was with 33% anhigher increase with ofan 50increase◦C in of 50 °C in the process temperature for 12 h of oxidation time. This finding proved the strong relation theof 50 process °C in the temperature process temperature for 12 h of for oxidation 12 h of time.oxidation This time. finding This proved finding the pr strongoved the relation strong between relation between the temperature and the oxide growth rate as the oxidant diffusivity increased with the thebetween temperature the temperature and the oxide and the growth oxide rate growth as the rate oxidant as the diffusivity oxidant diffusivity increased withincreased the increasing with the increasing temperature [11,16,17]. temperatureincreasing temperature [11,16,17]. [11,16,17].

Figure 6. Oxide growth rate of thermal dry oxidation for silicon <100>. FigureFigure 6.6. OxideOxide growthgrowth raterate ofof thermalthermal drydry oxidationoxidation forforsilicon silicon<100>. <100>. 4.2. Surface Uniformity 4.2.4.2. SurfaceSurface UniformityUniformity The thickness of the oxide layer on the sample surface at all oxidation durations was found to TheThe thickness thickness of of the the oxide oxide layer layer on the on sample the sample surface surface at all oxidation at all oxidation durations durations was found was to be found uniform to be uniform across a 2 cm × 2 cm sample area. The thickness measurements were characterized using acrossbe uniform a 2 cm across× 2 cm a sample2 cm × 2 area. cm Thesample thickness area. The measurements thickness measurements were characterized were using characterized F50 Filmetrics using at F50 Filmetrics at 20 random scanned points across the samples. The measurement principle was 20F50 random Filmetrics scanned at 20 points random across scanned the samples. points The across measurement the samples. principle The was measurement based on the lightprinciple scattering was based on the light scattering effect of the incident light normal to the thin film surface. effectbased of on the the incident light scattering light normal effect to the of thinthe inci filmdent surface. light normal to the thin film surface. Figure 7 shows the surface roughness, indicating the uniformity of the oxide layer thickness that FigureFigure7 7 shows shows thethe surface roughness, roughness, indicating indicating th thee uniformity uniformity of ofthe the oxide oxide layer layer thickness thickness that is calculated as the difference between the maximum and minimum thickness of the grown oxide thatis calculated is calculated as the as difference the difference between between the ma theximum maximum and minimum and minimum thickness thickness of the ofgrown the grown oxide layer divided by the average thickness at every oxidation temperature. In general, the oxide thickness oxidelayer divided layer divided by the byaverage the average thickness thickness at every at oxid everyation oxidation temperature. temperature. In general, In the general, oxide thethickness oxide measurement showed that the oxide layer was grown with the lowest roughness as the oxidation thicknessmeasurement measurement showed that showed the oxide that thelayer oxide was layergrown was with grown the lowest with the roughness lowest roughness as the oxidation as the temperature increased. The surface roughness of 2.03% was observed for the oxidation temperature oxidationtemperature temperature increased. increased.The surface The roughness surface of roughness 2.03% was of observed 2.03% was for observed the oxidation for the temperature oxidation of 1040 °C. The oxide surface roughness also improved when we prolong the oxidation time to 12 h. temperatureof 1040 °C. The of 1040oxide◦C. surface The oxide roughness surface also roughness improved also when improved we prolong when the we oxidation prolong the time oxidation to 12 h. The longer oxidation time allows for a thicker oxide layer growth with better uniformity of the timeThe tolonger 12 h. oxidation The longer time oxidation allows time for allowsa thicker for aoxide thicker layer oxide growth layer growthwith better with uniformity better uniformity of the microchannel surface. ofmicrochannel the microchannel surface. surface.

FigureFigure 7.7.Surface Surface roughnessroughnessof ofoxide oxidelayer layer for for various various process process temperature. temperature. Figure 7. Surface roughness of oxide layer for various process temperature. Figure 8 shows the SEM observations on the EO channel before and after oxidation process. The Figure 8 shows the SEM observations on the EO channel before and after oxidation process. The scallop effect becomes a major challenge for high aspect ratio microchannel fabrication using DRIE scallop effect becomes a major challenge for high aspect ratio microchannel fabrication using DRIE [18]. The scallop roughness, as shown in Figure 8a, was not desirable especially for an electroosmotic [18]. The scallop roughness, as shown in Figure 8a, was not desirable especially for an electroosmotic microfluidic system because it can create unnecessary flow characteristics and induce unwanted microfluidic system because it can create unnecessary flow characteristics and induce unwanted

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Figure8 shows the SEM observations on the EO channel before and after oxidation process. The scallop effect becomes a major challenge for high aspect ratio microchannel fabrication using DRIE [18]. The scallop Micromachinesroughness, as2018 shown, 9, x in Figure8a, was not desirable especially for an electroosmotic microfluidic system7 of 9 Micromachinesbecause it can 2018 create, 9, x unnecessary flow characteristics and induce unwanted pressure inside the microchannel.7 of 9 pressureOn top of that,inside the the surface microchannel. roughness can On change top of the that, EDL the properties surface near roughness the surface can wall, change hence reducethe EDL the pressure inside the microchannel. On top of that, the surface roughness can change the EDL propertieselectroosmotic near flow the inside surface the microchannelwall, hence [reduce19,20]. Figurethe electroosmotic8b shows the effect flow of inside oxidation the on microchannel the side wall properties near the surface wall, hence reduce the electroosmotic flow inside the microchannel [19,20].smoothness. Figure It can8b beshows seen the that effect the scallop of oxidation roughness on on the the side vertical wall wallsmoothness. of the microchannel It can be seen resulted that from the [19,20]. Figure 8b shows the effect of oxidation on the side wall smoothness. It can be seen that the scallopthe plasma roughness etching on process the vertical was improved wall of bythe the microchannel oxide layer growthresulted on from the siliconthe plasma vertical etching wall after process 12 h scallop roughness on the vertical wall of the microchannel resulted from the plasma etching process wasof oxidation. improved by the oxide layer growth on the silicon vertical wall after 12 h of oxidation. was improved by the oxide layer growth on the silicon vertical wall after 12 h of oxidation.

(a) (b) (a) (b) Figure 8. Scallop effect on the silicon vertical wall (a) before and (b) after oxidation. Figure 8. ScallopScallop effect effect on the silicon vertical wall ( a) before and (b) after oxidation. 4.3. Microchannel Structure Improvement after Thermal Oxidation 4.3. Microchannel Structure Improvement after Thermal Oxidation A high aspect ratio SiO2 microchannel was successfully created by using dry thermal oxidation A high aspect ratio SiO2 microchannel was successfully create createdd by using dry thermal oxidation that is suitable for an electroosmotic flow application. The shape and cross section of the that isis suitable suitable for for an electroosmotican electroosmotic flow application.flow application. The shape The and shape cross sectionand cross of the section microchannel of the microchannel was uniform, as demonstrated by Figure 9a,b. The width of the microchannel was wasmicrochannel uniform, aswas demonstrated uniform, as bydemo Figurenstrated9a,b. by The Figure width 9a,b. of the The microchannel width of the was microchannel reduced to 42%was reduced to 42% with an oxide layer of 520 nm on the channel wall. The color scheme on the top withreduced an oxide to 42% layer with of 520an oxide nm on layer the channel of 520 wall.nm on The the color channel scheme wall. on theThe top color surface scheme of the on substrate the top surface of the substrate was seen consistently without any abnormal spots. wassurface seen of consistently the substrate without was seen any cons abnormalistently spots. without any abnormal spots.

(a) (b) (a) (b) Figure 9. (a) Silicon microchannel before oxidation process; (b) SiO2 microchannel after 12 h thermal Figure 9. (a) Silicon microchannel before oxidation process; (b) SiO2 microchannel after 12 h thermal dryFigure oxidation 9. (a) Silicon at 1040 microchannel °C. before oxidation process; (b) SiO2 microchannel after 12 h thermal dry oxidation at 1040 ◦°C.C. 5. Conclusions 5. Conclusions In conclusion, we presented a simple technique for fabricating a silicon electroosmotic (EO) In conclusion, we presented a simple technique for fabricating a silicon electroosmotic (EO) channel with surface modification. The microchannel arrays were initially realized by reactive ion channel with surface modification. The microchannel arrays were initially realized by reactive ion etching coupled with post processed thermal dry oxidation to produce high aspect ratio etching coupled with post processed thermal dry oxidation to produce high aspect ratio microchannels with an improved cross section and surface morphology. The strong relation between microchannels with an improved cross section and surface morphology. The strong relation between oxide thickness and the temperature was presented by performing the thermal dry oxidation at oxide thickness and the temperature was presented by performing the thermal dry oxidation at 990 °C, 1020 °C and 1040 °C. The oxide growth rate was found to increase at higher process 990 °C, 1020 °C and 1040 °C. The oxide growth rate was found to increase at higher process temperatures. By using this method, the microchannel width was reduced by ~40% with the temperatures. By using this method, the microchannel width was reduced by ~40% with the minimum aspect ratio (H/W) of 2. The surface quality was also improved as the scallop effect from minimum aspect ratio (H/W) of 2. The surface quality was also improved as the scallop effect from

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5. Conclusions In conclusion, we presented a simple technique for fabricating a silicon electroosmotic (EO) channel with surface modification. The microchannel arrays were initially realized by reactive ion etching coupled with post processed thermal dry oxidation to produce high aspect ratio microchannels with an improved cross section and surface morphology. The strong relation between oxide thickness and the temperature was presented by performing the thermal dry oxidation at 990 ◦C, 1020 ◦C and 1040 ◦C. The oxide growth rate was found to increase at higher process temperatures. By using this method, the microchannel width was reduced by ~40% with the minimum aspect ratio (H/W) of 2. The surface quality was also improved as the scallop effect from the plasma etching process was reduced by adding an adequate amount of oxide layer. A uniform cross section with a good quality of surface roughness was essential for demonstrating a steady electroosmotic flow inside the microchannel. The final structure of the SiO2 microchannels array will be integrated with a PDMS structure to work as a complete electroosmotic microfluidic device. This process was foreseen to be able to produce a high aspect ratio sub-microchannel and nanochannels without implementing the nanolithography procedure that will be beneficiary for ion transport purposes.

Author Contributions: J.Y., T.N.T.Y. and B.Y.M. conceived and designed the experiments; J.Y., and T.N.T.Y. performed the experiments and analyzed the data; A.A.H. and M.F.M.R.W. contributed reagents/materials, T.N.T.Y., J.Y. and R.L. wrote the paper. Acknowledgments: This work is supported by Ministry of Higher Education under LRGS Project Grant No. LRGS/2015/UKM-UKM/NANOMITE/04/01 and FRGS Project Grant No. FRGS/1/2016/TK05/UKM/02/2 and partly supported by the French RENATECH Network and its FEMTO-ST Technology facilities. Conflicts of Interest: The authors declare no conflict of interest.

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