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MSP432E401Y Simplelink™ Ethernet Microcontroller Datasheet

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MSP432E401Y Simplelink™ Ethernet Microcontroller Datasheet Product Order Technical Tools & Support & Folder Now Documents Software Community MSP432E401Y SLASEN5 –OCTOBER 2017 MSP432E401Y SimpleLink™ Ethernet Microcontroller 1 Device Overview 1.1 Features 1 • Core • Security – 120-MHz Arm® Cortex®-M4F Processor Core – Advanced Encryption Standard (AES): With Floating-Point Unit (FPU) Hardware Accelerated Data Encryption and • Connectivity Decryption Based on 128-, 192-, and 256-Bit – Ethernet MAC: 10/100 Ethernet MAC With Keys Integrated Ethernet PHY – Data Encryption Standard (DES): Hardware – Ethernet PHY: PHY With IEEE 1588 PTP Accelerated Data Encryption and Decryption Hardware Support Supported by Block Cipher Implementation With 168-Bit Effective Key Length – Universal Serial Bus (USB): USB 2.0 OTG, Host, or Device With ULPI Interface Option and – Secure Hash Algorithm/Message Digest Link Power Management (LPM) Algorithm (SHA/MD5): Advanced Hash Engine That Supports SHA-1, SHA-2, and MD5 Hash – Eight Universal Asynchronous Computation Receivers/Transmitters (UARTs), Each With Independently Clocked Transmitter and – Cyclical Redundancy Check (CRC) Hardware Receiver – Tamper: Support for Four Tamper Inputs and – Four Quad Synchronous Serial Interface (QSSI): Configurable Tamper Event Response With Bi-, Quad-, and Advanced-SSI Support • Analog – Ten Inter-Integrated Circuit (I2C) Modules With – Two 12-Bit SAR-Based ADC Modules, Each High-Speed Mode Support Supports Up to 2 Million Samples per Second – Two CAN 2.0 A and B Controllers: Multicast (2 Msps) Shared Serial-Bus Standard – Three Independent Analog Comparator • Memories Controllers – 1024KB of Flash Memory With 4-Bank – 16 Digital Comparators Configuration Supports an Independent Code • System Management Protection for Each Bank – JTAG and Serial Wire Debug (SWD): One JTAG – 256KB of SRAM With Single-Cycle Access, Module With Integrated Arm SWD Provides a Provides Nearly 2-GB/s Memory Bandwidth at Means of Accessing and Controlling Design-for- 120-MHz Clock Frequency Test Features Such as I/O Pin Observation and – 6KB EEPROM: 500-kwrite per 2 Page Block, Control, Scan Testing, and Debugging. Leveling, Lock Protection • Development Kits and Software (See Tools and – Internal ROM: Loaded With SimpleLink™ SDK Software) Software – SimpleLink™ MSP-EXP432E401Y – Peripheral Driver Library LaunchPad™ Development Kit – Bootloader – SimpleLink MSP432E4 Software Development Kit (SDK) – External Peripheral Interface (EPI): 8-, 16-, or 32-Bit Dedicated Parallel Interface to Access • Package Information External Devices and Memory (SDRAM, Flash, – Package: 128-Pin TQFP (PDT) or SRAM) – Extended Operating Temperature (Ambient) Range: –40°C to 105°C 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. MSP432E401Y SLASEN5 –OCTOBER 2017 www.ti.com 1.2 Applications • Industrial Ethernet Gateway • Industrial Smart Gateway • Zone Controllers for Building Automation • Factory Automation Data Collectors and Gateway • Data Concentrators for Grid Infrastructure • Wireless to Ethernet Gateway 1.3 Description The SimpleLink MSP432E401Y Arm® Cortex®-M4F microcontrollers provide top performance and advanced integration. The product family is positioned for cost-effective applications requiring significant control processing and connectivity capabilities. The MSP432E401Y microcontrollers integrate a large variety of rich communication features to enable a new class of highly connected designs with the ability to allow critical real-time control between performance and power. The microcontrollers feature integrated communication peripherals along with other high-performance analog and digital functions to offer a strong foundation for many different target uses, spanning from human-machine interface (HMI) to networked system management controllers. In addition, the MSP432E401Y microcontrollers offer the advantages of widely available development tools, system-on-chip (SoC) infrastructure, and a large user community for Arm-based microcontrollers. Additionally, these microcontrollers use the Arm Thumb®-compatible Thumb-2® instruction set to reduce memory requirements and, thereby, cost. When using the SimpleLink MSP432™ SDK, the MSP432E401Y microcontroller is code compatible with all members of the extensive SimpleLink family, providing flexibility to fit precise needs. The MSP432E401Y device is part of the SimpleLink microcontroller (MCU) platform, which consists of Wi- Fi®, Bluetooth® low energy, Sub-1 GHz, Ethernet, Zigbee, Thread, and host MCUs, which all share a common, easy-to-use development environment with a single core software development kit (SDK) and rich tool set. A one-time integration of the SimpleLink platform enables you to add any combination of the portfolio's devices into your design, allowing 100 percent code reuse when your design requirements change. For more information, visit www.ti.com/simplelink. Device Information(1) PART NUMBER PACKAGE BODY SIZE MSP432E401YTPDT TQFP (128) 14 mm × 14 mm (1) For more information, see Section 9, Mechanical, Packaging, and Orderable Information. 2 Device Overview Copyright © 2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: MSP432E401Y MSP432E401Y www.ti.com SLASEN5 –OCTOBER 2017 1.4 Functional Block Diagram Figure 1-1 shows the functional block diagram. JTAG, SWD Arm Cortex-M4F Bootloader ROM DriverLib (120 MHz) AES and CRC System Ethernet Bootloater Control and ETM FPU Flash Clocks DCode bus (with Precision (1024KB) Oscillator) NVIC MPU ICode bus System Bus SRAM Bus Matrix (256KB) SYSTEM PERIPHERALS Watchdog DMA Timer (2 Units) EEPROM Hibernation (6K) Module Tamper GPIOs General- (90) Purpose Timer (8 Units) External CRC Peripheral Module Interface DES AES Module Module SHA/MD5 Module Bus (AHB) SERIAL PERIPHERALS Bus (APB) USB OTG UART (FS PHY (8 Units) or ULPI) Peripheral SSI High-Performance I2C (4 Units) (10 Units) Advanced CAN Ethernet Advanced Controller MAC, PHY, MII (2 Units) ANALOG PERIPHERALS Analog 12-Bit ADC Comparator (2 Units, (3 Units) 20 Channels) MOTION CONTROL PERIPHERALS PWM (1 Unit, QEI 8 Signals) (1 Unit) Copyright © 2017, Texas Instruments Incorporated Figure 1-1. MSP432E401Y Functional Block Diagram Copyright © 2017, Texas Instruments Incorporated Device Overview 3 Submit Documentation Feedback Product Folder Links: MSP432E401Y MSP432E401Y SLASEN5 –OCTOBER 2017 www.ti.com Table of Contents 1 Device Overview ......................................... 1 5.11 Peripheral Current Consumption.................... 41 1.1 Features .............................................. 1 5.12 LDO Regulator Characteristics...................... 41 1.2 Applications........................................... 2 5.13 Power Dissipation ................................... 42 1.3 Description............................................ 2 5.14 Thermal Resistance Characteristics, 128-Pin PDT 1.4 Functional Block Diagram ............................ 3 (TQFP) Package .................................... 42 2 Revision History ......................................... 5 5.15 Timing and Switching Characteristics ............... 43 3 Device Characteristics.................................. 6 6 Detailed Description ................................... 94 3.1 Related Products ..................................... 7 6.1 Overview ............................................ 94 4 Terminal Configuration and Functions.............. 8 6.2 Functional Block Diagram........................... 95 4.1 Pin Diagram .......................................... 8 6.3 Arm Cortex-M4F Processor Core ................... 96 4.2 Pin Attributes ......................................... 9 6.4 On-Chip Memory................................... 100 4.3 Signal Descriptions.................................. 19 6.5 Peripherals ......................................... 102 4.4 GPIO Pin Multiplexing............................... 30 6.6 Identification........................................ 144 4.5 Buffer Type.......................................... 33 6.7 Boot Modes ........................................ 144 4.6 Connections for Unused Pins ....................... 33 7 Applications, Implementation, and Layout ...... 146 5 Specifications ........................................... 35 7.1 System Design Guidelines......................... 146 5.1 Absolute Maximum Ratings ......................... 35 8 Device and Documentation Support.............. 147 5.2 ESD Ratings ........................................ 35 8.1 Getting Started and Next Steps ................... 147 5.3 Recommended Operating Conditions............... 35 8.2 Device Nomenclature .............................. 147 5.4 Recommended DC Operating Conditions .......... 35 8.3 Tools and Software ................................ 149 5.5 Recommended GPIO Operating Characteristics ... 35 8.4 Documentation Support............................ 150 5.6 Recommended Fast GPIO Pad Operating 8.5 Community Resources............................. 151 Conditions ........................................... 36 8.6 Trademarks ........................................ 151 5.7 Recommended Slow GPIO Pad Operating 8.7 Electrostatic Discharge Caution ................... 151 Conditions ........................................... 36 8.8 Export Control Notice .............................. 151 5.8 GPIO Current Restrictions .......................... 37 8.9 Glossary...........................................
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