Computer Architecture 10

Serial Communication Buses

Made wi th OpenOffi ce.org 1

SendingSending datadata oneone bitbit atat oneone time,time, sequentiallysequentially SerialSerial vsvs parallelparallel communicationcommunication cable cost (or PCB space), synchronization, distance ! speed ? ImprovedImproved serialserial communicationcommunication technologytechnology allowsallows forfor transfertransfer atat higherhigher speedsspeeds andand isis dominatingdominating thethe modernmodern digitaldigital technology:technology: RS232, RS-485, I2C, SPI, 1-Wire, USB, FireWire, , , MIDI, Serial Attached SCSI, Serial ATA, PCI Express, etc.

Made wi th OpenOffi ce.org 2 RS232, EIA232

TheThe ElectronicElectronic IndustriesIndustries AllianceAlliance (EIA)(EIA) standardstandard RS-232-CRS-232-C (1969)(1969) definition of (electrical signal characteristics: voltage levels, signaling rate, timing, short-circuit behavior, cable length, etc.) 25 or (more often) 9-pin connector serial transmission (bit-by-bit) asynchronous operation (no clock signal) truly bi-directional transfer (full-duplex) only limited power can be supplied to another device numerous handshake lines (seldom used) many protocols use RS232 (e.g. ) Made wi th OpenOffi ce.org 3 Voltage Levels

RS-232RS-232 standardstandard convertconvert TTL/CMOS-levelTTL/CMOS-level signalssignals intointo bipolarbipolar voltagevoltage levelslevels toto improveimprove noisenoise immunityimmunity andand supportsupport longlong cablecable lengthslengths

TTL/CMOS → RS232: 0V = logic zero → +3V…+12V (SPACE) +5V (+3.3V) = logic one → −3V…−12V (MARK)

Some equipment ignores the negative level and accepts a zero voltage level as the "OFF" state The "dead area" between +3V and -3V may vary, many receivers are sensitive to differentials of 1V or less Made wi th OpenOffi ce.org 4 frame

CompleteComplete one-byteone- frameframe consistsconsists of:of: start-bit (SPACE), data bits (7, 8), stop-bits (MARK) e.g. 9600, 8N1, 19200, 7E1

TTL (5V) RS-232 byte transfer (ASCII 'b'=0x61 hex)

Voltage converter

Typical RS-232 byte transfer (ASCII 'b'=0x61 hex) Made wi th OpenOffi ce.org 5 Data Rates

PurePure EIAEIA RS-232CRS-232C standardstandard permitspermits datadata ratesrates upup toto 1920019200 bpsbps andand cablecable lengthslengths upup toto 400400 metersmeters (but(but notnot both)both) DataData ratesrates asas highhigh asas 256kbps256kbps (over(over lessless thanthan 22 m)m) areare possiblepossible UniversalUniversal AsynchronousAsynchronous Receiver/TransmitterReceiver/Transmitter (UART)(UART) –– componentcomponent responsibleresponsible forfor fastfast communicationcommunication viavia RS-232RS-232 CommonCommon 1655016550 UARTUART incorporatesincorporates aa 16-byte16-byte FIFOFIFO andand isis mandatorymandatory forfor communicationscommunications atat speedsspeeds aboveabove 96009600 bpsbps

Made wi th OpenOffi ce.org 6 DTE and DCE

TheThe RS-232RS-232 definesdefines twotwo classesclasses ofof devices:devices: male chauvinism? (DTE) – (male) equipment (DCE) – (female)

e.g. TD is output line on DTE, but input line on DCE distinction between DTE&DCE allows to avoid confusion

Made wi th OpenOffi ce.org 7 Signals

Complete RS232 standard define a lot of signals and is fairly complex Many communications options exist, but only very few are used in practice

CTS Clear To Send [DCE --> DTE] DCD Data Carrier Detected (Tone from a modem) [DCE --> DTE] DCE Data Communications Equipment eg. modem DSR Data Set Ready [DCE --> DTE] DSRS Data Signal Rate Selector [DCE --> DTE] (Not common) DTE Data Terminal Equipment eg. computer, printer DTR Data Terminal Ready [DTE --> DCE] FG Frame Ground (screen or chassis) NC No Connection RCk Receiver (external) Clock input RI Ring Indicator (ringing tone detected) RTS Request To Send [DTE --> DCE] RxD Received Data [DCE --> DTE] SG Signal Ground SCTS Secondary Clear To Send [DCE --> DTE] SDCD Secondary Data Carrier Detected (Tone)[DCE -> DTE] SRTS Secondary Ready To Send [DTE --> DCE] SRxD Secondary Received Data [DCE --> DTE] STxD Secondary Transmitted Data [DTE --> DTE] TxD Transmitted Data [DTE --> DTE]

Made wi th OpenOffi ce.org 8 Handshaking

HardwareHardware handshakinghandshaking RTS/CTS ● DTE asserts the "request to send" (RTS) signal when it is ready to receive data and deasserts it when it cannot accept data; a DCE asserts "clear to send" (CTS) when it is ready to receive data DTR/DTE ● DTE asserts the "data terminal ready" (DTR) signal, and DCE asserts the "data set ready" (DSR) signal SoftwareSoftware handshakinghandshaking XON/XOFF ● requires that the receiver send a character (Control-S, ASCII 19) to halt data transfer and another character (Control-Q, ASCII 17) to resume transfer Made wi th OpenOffi ce.org 9 Seldom used features

SignalSignal raterate selectionselection The DTE or DCE can specify use of a "high" or "low" signaling rate TimingTiming signalssignals Some synchronous devices provide a clock signal to synchronize data transmission SecondarySecondary channelchannel Data can be sent over a secondary channel, which is equivalent to the primary channel

Made wi th OpenOffi ce.org 10

Sub-DSub-D 25,25, Sub-DSub-D 9,9, RJ45RJ45 andand othersothers

DTEDTE↔D↔DCECE –– StraightStraight connectionconnection DTEDTE↔↔DTEDTE –– Null-modemNull-modem (cross-over(cross-over cable)cable) DTEDTE –– LoopbackLoopback wiringwiring

VariousVarious DB25DB25 toto DB9DB9 adaptersadapters

Made wi th OpenOffi ce.org 11 Null-modem Wirings

Made wi th OpenOffi ce.org 12 Loopback Wirings

Made wi th OpenOffi ce.org 13 Weaknesses

CommonCommon groundground RequirementRequirement forfor positivepositive andand negativenegative suppliessupplies LowLow transfertransfer raterate Point-to-pointPoint-to-point onlyonly communicationcommunication AsymmetricalAsymmetrical definitionsdefinitions ofof DTEDTE andand DCEDCE ManyMany unnecessaryunnecessary communicationcommunication optionsoptions NoNo methodmethod forfor sendingsending powerpower toto aa devicedevice RecommendedRecommended connectorconnector isis largelarge byby currentcurrent standardsstandards

Made wi th OpenOffi ce.org 14 Strengths

RS-232RS-232 isis graduallygradually beingbeing supersededsuperseded byby USBUSB forfor locallocal communicationscommunications butbut ...... USB is more complex (physical layer + protocol + driver) and has no direct analog to the terminal programs for 'raw' communication RS232 control lines of the interface can be easily manipulated by software to control various simple hardware devices (lamps, relays, etc.) Lots of communication protocols can be easily implemented over RS232 (by software or hardware) Simplicity makes it good for all applications where speed is not critical but distance may be quite long It is available in most of Made wi th OpenOffi ce.org 15 RS232 Forever ...

PCI-Express Card with 1 RS232C Port

Made wi th OpenOffi ce.org 16 Related Standards

RS-422RS-422 similar to RS-232 but with differential signaling RS-485RS-485 a two-wire differential signaling (U+, U-) half-duplex multipoint serial connection (inexpensive local networks) speeds up to 35 Mbit/s (10 m) and 100 kbit/s (1200 m)

Made wi th OpenOffi ce.org 17 Differential Signaling

ToleranceTolerance ofof groundground offsetsoffsets SuitabilitySuitability forfor useuse withwith low-voltagelow-voltage electronicselectronics ResistanceResistance toto electromagneticelectromagnetic interferenceinterference RS-485,RS-485, PCIPCI Express,Express, USB,USB, ......

Made wi th OpenOffi ce.org 18 USB

UniversalUniversal SerialSerial BusBus (USB)(USB) waswas intendedintended toto helphelp retireretire allall legacylegacy varietiesvarieties ofof serialserial andand parallelparallel portsports (1995)(1995) single standardized interface socket plug-and-play + hot swapping providing power to low-consumption devices allowing many standard devices to be used without requiring manufacturer specific NoNo directdirect accessaccess toto physicalphysical layerlayer ComplexComplex software+hardwaresoftware+hardware error correction, protocols, device classes, etc. Made wi th OpenOffi ce.org 19 USB Topology

USBUSB system:system: host+interconnect+deviceshost+interconnect+devices USBUSB alwaysalways connectsconnects devicesdevices withwith hosthost InterconnectInterconnect topologytopology isis aa tieredtiered starstar

Made wi th OpenOffi ce.org 20 Speed

ThereThere areare 33 datadata rates:rates: USB high-speed 480 Mb/s USB full-speed 12 Mb/s USB low-speed 1.5 Mb/s Experimental USB 3.0 Super-Speed ● 4.8 Gbit/s (600 MB/s)

TheThe actualactual throughputthroughput attainedattained withwith realreal devicesdevices isis aboutabout ⅔⅔ ofof thethe maximummaximum theoreticaltheoretical bulkbulk datadata transfertransfer raterate

Made wi th OpenOffi ce.org 21 Electrical Interface

Four-wireFour-wire cable,cable, differentialdifferential signaling,signaling, half-duplex,half-duplex, TwistedTwisted pairpair datadata cablecable withwith 90Ω90Ω ±15%±15% impedanceimpedance

0.0–0.3V0.0–0.3V LowLow andand 2.8–3.6V2.8–3.6V HighHigh (Low/Full(Low/Full Speed)Speed) ±±400mV400mV inin HighHigh SpeedSpeed (+(+ protocolprotocol toto negotiatenegotiate HS)HS) ClockClock tolerance:tolerance: 480.00 Mbit/s ±0.05% 12.000 Mbit/s ±0.25% 1.50 Mbit/s ±1.5% Made wi th OpenOffi ce.org 22 Data Signaling (Low/Full)

DataData transmissiontransmission isis organizedorganized inin packetspackets NRZINRZI (non-return-to-zero(non-return-to-zero inverted)inverted) encodingencoding

Made wi th OpenOffi ce.org 23 NRZI Encoding

BinaryBinary codecode inin whichwhich "1s""1s" andand "0s""0s" areare representedrepresented withwith nono otherother neutralneutral oror restrest conditioncondition NotNot aa self-synchronizingself-synchronizing code,code, synchronizationsynchronization techniquetechnique mustmust bebe usedused toto avoidavoid bitbit slipslip "1""1" isis representedrepresented byby aa transitiontransition "0""0" hashas nono transitiontransition

Made wi th OpenOffi ce.org 24 I²C - Inter-Integrated Circuit

I²CI²C ((I-squared-CI-squared-C)) –– PhilipsPhilips (NXP),(NXP), earlyearly 80's80's (XX)(XX) communication between integrated circuits only two wires (+ common ground) → small PCB's multi-master/multi-slave, bidirectional, 8-bit no strict rate requirements (master sends the clock) 7bit or 10bit unique device addressing simple – hardware or (easy) software implementation

Made wi th OpenOffi ce.org 25 Highly-integrated TV set

Made wi th OpenOffi ce.org 26 Characteristics Speed:Speed: 100 kbps (standard mode) 400 kbps (fast mode) 3.4 Mbps (high-speed mode) Two-wiredTwo-wired busbus serial data line (SDA) serial clock line (SCL) VoltageVoltage levelslevels not fixed, depends on supply level of voltage HIGH → 1 LOW → 0 Made wi th OpenOffi ce.org 27 Bit Transfer

BitBit transfertransfer isis levellevel triggeredtriggered SCL = 0↑1 → SDA = valid data one clock pulse per data bit stable data during high clocks data change during low clocks

Made wi th OpenOffi ce.org 28 Start and Stop

SCLSCL && SDASDA areare highhigh whenwhen idleidle open-drain + pull-up resistor StartStart conditioncondition (S)(S) SDA 1↓0 transition when SCL = 1 StopStop conditioncondition (P)(P) SDA 0↑1 transition when SCL = 1

Made wi th OpenOffi ce.org 29 Acknowledge

AllAll transferstransfers areare initiatedinitiated byby mastermaster SlaveSlave mustmust respondrespond withwith acknowledgeacknowledge

Made wi th OpenOffi ce.org 30 Data Frame

StartStart ++ SlaveSlave addressaddress ++ DirectionDirection CommandCommand AcknowledgeAcknowledge fromfrom slaveslave DataData (master(master→→slaveslave oror slaveslave→→mastermaster)) ++ Ack.Ack. StopStop

Made wi th OpenOffi ce.org 31 Frame Formats

MasterMaster transmittertransmitter

MasterMaster receiverreceiver

CombinedCombined

Made wi th OpenOffi ce.org 32 Addressing

7-bit7-bit addressingaddressing . 112 slaves 7 addresses reserved ● e.g. broadcast, start-byte, 10-bit extension 10-bit10-bit addressingaddressing 11110 prefix + 10 address bit (R/W in the middle) 1024 new addresses

Made wi th OpenOffi ce.org 33 Closing Remarks

EleganceElegance ofof I²C:I²C: simplicitysimplicity && effectivenesseffectiveness shared bus, reasonable speed, two wires (pins), hotplug flexible timing: no strict baud rate, clock stretching arbitration & collision detection in multi-master mode OneOne ofof mostmost commoncommon communicationcommunication standardstandard forfor microcontrollersmicrocontrollers && integratedintegrated circuitscircuits NoNo licensinglicensing feesfees forfor I²CI²C implementation,implementation, butbut requiredrequired toto obtainobtain I²CI²C slaveslave addressesaddresses LimitedLimited AddressAddress Space:Space: devices with configurable address ● higher bits indicate model, lower bits - type

Made wi th OpenOffi ce.org 34 Derivatives

SystemSystem ManagementManagement BusBus (SMBus)(SMBus) low-bandwidth devices on a PC motherboard ● laptop's battery, temperature, fan, or voltage sensors, configuration data of DDR2, ... VESAVESA DisplayDisplay DataData ChannelChannel (DDC)(DDC) connection between monitor graphics card ● with VGA, DVI, HDMI connectors TwoTwo WireWire InterfaceInterface (TWI)(TWI) I2C implemented on chips from Atmel ......

Made wi th OpenOffi ce.org 35 1-Wire®

RegisteredRegistered trademarktrademark ofof DallasDallas SemiconductorSemiconductor Corp.Corp. (now(now Maxim-Dallas)Maxim-Dallas) Signaling and power using 1 wire (+ ground) Low-speed ( < 1 kbps) Long range (up tp 500m) Low cost Easy implementation

TypicallyTypically usedused toto communicatecommunicate withwith smallsmall inexpensiveinexpensive devicesdevices suchsuch asas digitaldigital thermometersthermometers andand weatherweather instrumentsinstruments

Made wi th OpenOffi ce.org 36 Available Devices

Memory:Memory: EPROM,EPROM, SRAM,SRAM, EEPROM,EEPROM, ROM,ROM, NVNV TemperatureTemperature SensorsSensors andand SwitchesSwitches 1-Wire1-Wire InterfacesInterfaces A-to-DA-to-D ConvertersConverters TimekeepingTimekeeping andand Real-TimeReal-Time ClocksClocks BatteryBattery Protectors,Protectors, Selectors,Selectors, andand MonitorsMonitors ......

Made wi th OpenOffi ce.org 37 Powering 1-Wire Devices

DS18B20 - Programmable Resolution 1-Wire Digital WithWith externalexternal supplysupply Thermometer, –55°C to +125°C, ±0.5°C accuracy and user-definable nonvolatile alarm settings

Parasite-poweredParasite-powered

Made wi th OpenOffi ce.org 38 Device Addressing

ThereThere isis alwaysalways oneone busbus mastermaster ManyMany slaveslave devicesdevices cancan shareshare thethe samesame busbus EachEach devicedevice hashas aa uniqueunique 64-bit64-bit serialserial numbernumber

ThereThere areare broadcastbroadcast commandscommands andand commandscommands addressedaddressed toto particularparticular devicesdevices TheThe busbus alsoalso hashas anan algorithmalgorithm toto recoverrecover thethe addressaddress ofof everyevery devicedevice onon thethe busbus

Made wi th OpenOffi ce.org 39 Transaction Sequence

StepStep 1.1. InitializationInitialization reset pulse StepStep 2.2. ROMROM CommandCommand (followed(followed byby anyany requiredrequired datadata exchange)exchange) Search, Read, Match, Skip, Alarm, ... StepStep 3.3. FunctionFunction CommandCommand (followed(followed byby anyany requiredrequired datadata exchange)exchange) Read, Write, ReadPowerSupply, ...

Made wi th OpenOffi ce.org 40 Initialization

ResetReset pulsepulse transmittedtransmitted byby thethe busbus mastermaster followedfollowed byby presencepresence pulse(s)pulse(s) transmittedtransmitted byby thethe slave(s)slave(s) TheThe presencepresence pulsepulse letslets thethe busbus mastermaster knowknow thatthat slaveslave devicesdevices areare onon thethe busbus

Made wi th OpenOffi ce.org 41 Master Write Bit

WriteWrite timetime slotsslots areare initiatedinitiated byby thethe mastermaster pullingpulling thethe 1-Wire1-Wire busbus lowlow Write 0 time slot: after pulling the bus low, the bus master continues to hold the bus low for the time slot Write 1 time slot: after pulling the bus low, the bus master releases the bus (pullup will pull the bus high)

Made wi th OpenOffi ce.org 42 Master Read Bit

SlavesSlaves cancan onlyonly transmittransmit datadata toto thethe mastermaster afterafter thethe mastermaster issuesissues read-relatedread-related commandscommands After the master initiates the read time slot, the slave begins transmitting a 1 or 0 on bus 1 is transmitted by leaving the bus high and 0 by pulling the bus low

Made wi th OpenOffi ce.org 43 SPI

SerialSerial PeripheralPeripheral InterfaceInterface BusBus (SPI)(SPI) -- MotorolaMotorola four wire" serial bus synchronous serial data link (clock signal) full duplex mode multiple slaves are allowed with individual slave select (chip select)

SCLK — Serial Clock (output from master) MOSI/SIMO — Master Output, Slave Input (output from master) MISO/SOMI — Master Input, Slave Output (output from slave) SS — Slave Select (active low; output from master)

Made wi th OpenOffi ce.org 44 Data Transmission

DuringDuring eacheach SPISPI clockclock cycle,cycle, aa fullfull duplexduplex datadata transmissiontransmission occurs:occurs: the master sends a bit on the MOSI line; the slave reads it from that same line (rising SCLK) the slave sends a bit on the MISO line; the master reads it from that same line (falling SCLK)

Made wi th OpenOffi ce.org 45 Closing Remarks

AdvantagesAdvantages ● Full duplex communication ● Very fast - higher throughput than I²C ● Arbitrary choice of message size and content ● Extremely simple hardware interfacing ● No arbitration or associated failure modes ● No synchronization problems DisadvantagesDisadvantages ● more lines/pins than I²C ● No hardware flow control, no slave acknowledgment ● limited to a single slave ● short distances

Made wi th OpenOffi ce.org 46